NXP Semiconductors PTN3460BS/F2,518
- Part No.:
- PTN3460BS/F2,518
- Manufacturer:
- NXP Semiconductors
- Category:
- Specialized
- Package:
- 56-VFQFN Exposed Pad
- Datasheet:
-
PTN3460BS/F2,518.pdf
- Description:
- IC INTFACE SPECIALIZED 56HVQFN
- Quantity:
- Payment:

- Shipping:

Inventory:6,001
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Product details
Overview
PTN3460BS/F2,518 from NXP Semiconductors is an embedded DisplayPort (eDP) to LVDS bridge IC that converts high-speed eDP video streams into LVDS signals for driving TFT-LCD panels. It supports 1- or 2-lane eDP input at 1.62 Gbit/s or 2.7 Gbit/s, dual-bus LVDS output up to 112 MHz pixel clock, 24 bpp color depth, and on-chip EDID ROM emulation - enabling direct integration in notebook and AIO display subsystems.
For engineers reviewing the PTN3460BS/F2,518 datasheet, PTN3460BS/F2,518 pinout, PTN3460BS/F2,518 application, or PTN3460BS/F2,518 equivalent, key selection considerations include eDP v1.2 compliance, programmable LVDS bus configuration (VESA/JEIDA), firmware-controlled panel power sequencing, I²C- and AUX-based register access, and HVQFN56 thermal-enhanced packaging for space-constrained laptop mainboards.
Technical Context
The PTN3460BS/F2,518 implements a full eDP v1.2 receiver with Auto Receive Equalization, Fast/Full Link training, and support for ASSR and Enhanced Framing authentication. Its integrated CDR and Manchester codec recover timing from DP Main Link and convert stream data into parallel RGB+sync for LVDS transmission.
On the LVDS side, it delivers dual-bus operation with independent even/odd channel outputs, programmable swing (250–400 mV), center-spread clock modulation (32.9 kHz), and configurable data packing per VESA or JEIDA standards - all managed via DPCD registers, I²C-bus, or multi-level configuration pins.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| eDP Compliance | Compliant with DisplayPort v1.2 and embedded DisplayPort v1.2 - enables secure, authenticated video link with CPU/GPU sources. |
| Main Link Rate | 1.62 Gbit/s (RBR) or 2.7 Gbit/s (HBR); supports 1- or 2-lane operation - matches common mobile GPU output capabilities. |
| LVDS Pixel Clock | 25 MHz to 112 MHz - supports resolutions up to 1920×1200 @ 60 Hz in dual-bus mode. |
| Color Depth | 18 bpp or 24 bpp - selectable per JEIDA or VESA data packing - ensures compatibility with mainstream LCD timing controllers. |
| Power Supply | Single 3.3 V supply (with internal 1.8 V regulator) or dual 3.3 V/1.8 V supplies - simplifies power design across platform variants. |
| Operating Temp | 0 °C to +70 °C - validated for commercial notebook and AIO thermal environments. |
| Package | HVQFN56, 7 mm × 7 mm, 0.4 mm pitch, exposed thermal pad - provides low-inductance grounding and efficient heat dissipation. |
Pinout & Package
HVQFN56 package (SOT949-2), 7 mm × 7 mm body, 0.4 mm pitch, 0.85 mm max height, with exposed center pad connected to PCB ground for thermal relief and electrical reference.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| DP0_P / DP0_N DP1_P / DP1_N |
eDP Main Link differential inputs | AC-coupled 100 Ω differential pairs supporting 1- or 2-lane operation; integrated 50 Ω termination enables direct connection to source without external resistors. |
| AUX_P / AUX_N | eDP AUX channel differential I/O | Supports Native AUX and I²C-over-AUX transactions for DPCD register access and EDID-DDC communication with display panels. |
| LVSAE_P/N through LVSDO_P/N | Dual-bus LVDS data and clock outputs | Eight differential LVDS channels (4 even + 4 odd) plus two clock pairs - configurable for VESA/JEIDA, 18/24 bpp, and bus swapping to simplify PCB routing. |
| PVCCEN / BKLTEN / PWMO | Panel control outputs | CMOS outputs drive panel VCC enable, backlight enable, and PWM dimming - synchronized to video stream and controllable via DPCD or I²C. |
| RST_N / PD_N / DEV_CFG | System control inputs | Active-low reset and deep power-down enable; DEV_CFG selects I²C slave address (0x40h/0xC0h) or master mode for EEPROM read. |
Key Features
| Feature | Design Value |
|---|---|
| On-chip NVM + embedded microcontroller | Enables field-upgradable firmware for protocol updates, timing tuning, and new panel compatibility without hardware change. |
| EDID ROM emulation (7 structures) | Eliminates need for external EDID EEPROM on LVDS panels - reduces BOM cost and avoids BIOS modifications for non-standard displays. |
| Programmable LVDS signal swing | 250 mV / 300 mV / 400 mV options compensate for trace loss or reduce EMI/power - configured via CFG4 pin or register. |
| Firmware-controlled panel sequencing | Configurable timing for PVCCEN, BKLTEN, and PWMO ensures safe power-up/down order - prevents LCD damage during hot-plug or suspend/resume. |
| LVDS bus/channel/pair swapping | Permits flexible PCB layout by reordering differential pairs in software - avoids costly board respins due to routing constraints. |
Applications
| Notebook Display Interface | All-in-One PC Video Bridge |
|---|---|
|
Use Scenario: Integrating high-resolution LVDS panels into thin-and-light notebooks with Intel Core or AMD Ryzen processors. IC Role / Device Role / Timing Role: eDP-to-LVDS protocol converter and timing controller - bridges GPU's native eDP output to legacy LVDS panel TCON. Use Value: Enables use of cost-effective LVDS panels while retaining modern eDP source architecture; eliminates need for discrete level shifters or timing re-synchronization logic. |
Use Scenario: Driving large-format 1920×1200 LVDS displays in compact AIO desktop systems with space-limited motherboard layouts. IC Role / Device Role / Timing Role: Dual-bus LVDS transmitter with programmable clock spreading - delivers full bandwidth at 112 MHz while meeting Class B EMI limits. Use Value: Supports 1920×1200 @ 60 Hz resolution in dual-bus mode with center-spread clock (32.9 kHz), reducing peak spectral energy without degrading image quality. |
| Netbook Panel Adapter | Industrial Embedded Display |
|
Use Scenario: Retrofitting older LVDS-based netbooks with newer eDP-capable SoCs during platform refresh cycles. IC Role / Device Role / Timing Role: Firmware-configurable bridge with multi-level pin setup - allows boot-time configuration without I²C host intervention. Use Value: Simplifies migration path via pin-strapped defaults (CFG1–CFG4), avoiding firmware changes in resource-constrained netbook BIOS. |
Use Scenario: Connecting ruggedized LVDS displays in industrial HMIs where panel EDID is missing or unreliable. IC Role / Device Role / Timing Role: On-chip EDID emulator with seven preloaded structures - presents valid VESA-compliant EDID v1.3 to GPU regardless of panel EEPROM presence. Use Value: Guarantees plug-and-play video initialization without manual EDID programming or external memory - critical for unattended deployment. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar eDP-to-LVDS bridge applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CH7511B-DE | Supports only single-bus LVDS; no EDID emulation; requires external 1.2 V supply; no ASSR authentication. | Limited to ≤1366×768 panels; lacks firmware update capability; not suitable for eDP 1.2-secured platforms. | Choose CH7511B-DE only for cost-sensitive, low-resolution designs where EDID and security are not required. |
| PS8622-A0-SP | Supports eDP 1.3, higher 3.24 Gbit/s HBR2 rate; includes MIPI DSI output option; larger QFN64 package. | Targets next-gen ultrabooks with dual-output (LVDS + DSI); requires more PCB area and updated layout. | Choose PS8622-A0-SP when future-proofing for HBR2 or adding secondary display interface - not drop-in compatible with PTN3460BS/F2,518. |
Compared with CH7511B-DE and PS8622-A0-SP, the PTN3460BS/F2,518 uniquely balances eDP 1.2 security, dual-bus LVDS scalability, on-chip EDID flexibility, and HVQFN56 footprint - making it optimal for mid-tier notebook and AIO platforms requiring proven reliability and firmware adaptability.
Availability
PTN3460BS/F2,518 is available at Aetrix Electronics and suitable for notebook platforms, AIO systems, and netbook display interfaces requiring stable component supply, long-term lifecycle support, and firmware-upgradable bridge functionality.
Supply support for PTN3460BS/F2,518 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company specializing in secure connectivity solutions for automotive, industrial, and consumer electronics - with leadership in interface, analog, and embedded processing technologies.
The PTN3460 series belongs to NXP's display interface product line, designed specifically to bridge evolving high-speed serial video interfaces (eDP, HDMI) to legacy parallel display technologies (LVDS, TTL) in space- and power-constrained portable platforms.
FAQ
What display resolutions does the PTN3460BS/F2,518 support?
The PTN3460BS/F2,518 supports resolutions up to 1920×1200 @ 60 Hz in dual LVDS bus mode with 112 MHz pixel clock and 24 bpp. In single-bus mode, it supports up to 1366×768 @ 60 Hz. Resolution capability depends on configured lane count (1 or 2), color depth (18/24 bpp), and LVDS bus mode - all programmable via DPCD registers or configuration pins.
Does the PTN3460BS/F2,518 require an external crystal or clock source?
No, the PTN3460BS/F2,518 requires no external timing reference. It recovers pixel clock and timing directly from the incoming eDP Main Link using its integrated Clock Data Recovery (CDR) circuitry - eliminating BOM cost and board space for crystals, oscillators, or PLL components.
How does EDID emulation work on the PTN3460BS/F2,518?
The PTN3460BS/F2,518 contains on-chip non-volatile memory storing up to seven VESA EDID v1.3 structures. When an LVDS panel lacks an EDID ROM, the device responds to DDC read requests over AUX or I²C with preloaded EDID data - enabling GPU driver initialization without BIOS modification or external EEPROM.
Can the PTN3460BS/F2,518 operate with only a 3.3 V supply?
Yes, the PTN3460BS/F2,518 can operate with a single 3.3 V supply. Its integrated regulator generates the required 1.8 V core voltage. To use single-supply mode, leave EPS_N pin open or pull it HIGH; for dual-supply operation (3.3 V + 1.8 V), pull EPS_N LOW to disable the internal regulator.
What is the function of the HPDRX pin on the PTN3460BS/F2,518?
The HPDRX pin is a Hot Plug Detect output that signals readiness to the eDP source. It remains LOW during power-up and internal initialization, then transitions HIGH to indicate the PTN3460BS/F2,518 is ready to receive video - preventing false hot-plug events and ensuring synchronized link training with the GPU or chipset.
PTN3460BS/F2,518 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 56-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- LVDS
- Interface:
- -
- Voltage - Supply:
- 3.3V
- Supplier Device Package:
- 56-HVQFN (7x7)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
PTN3460BS/F2,518 FAQ
1.How can I place an order for PTN3460BS/F2,518 through Aetrix?
Please submit a Request for Quotation (RFQ) for PTN3460BS/F2,518 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PTN3460BS/F2,518 reliable?
The price and inventory of PTN3460BS/F2,518 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PTN3460BS/F2,518 is usually 5 days.
3.What payment methods are accepted for PTN3460BS/F2,518?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PTN3460BS/F2,518 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PTN3460BS/F2,518?
PTN3460BS/F2,518 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PTN3460BS/F2,518 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PTN3460BS/F2,518?
For technical support, including PTN3460BS/F2,518 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PTN3460BS/F2,518 requirements.
6.How does Aetrix verify that PTN3460BS/F2,518 is sourced from the original manufacturer or authorized distributors?
All PTN3460BS/F2,518 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PTN3460BS/F2,518 meets industry standards.
7.What is the process for return or replacement of PTN3460BS/F2,518?
All PTN3460BS/F2,518 units undergo pre-shipment inspection (PSI). If there is an issue with PTN3460BS/F2,518, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PTN3460BS/F2,518 part is unused and in its original packaging.
Return procedure for PTN3460BS/F2,518:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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