Renesas QB-38SP-NQ-01T
- Part No.:
- QB-38SP-NQ-01T
- Manufacturer:
- Renesas
- Category:
- Programming Adapters, Sockets
- Package:
- Datasheet:
-
QB-38SP-NQ-01T.pdf
- Description:
- RL78/L1A 38 PIN TARGET CONNECTOR
- Quantity:
- Payment:

- Shipping:

Inventory:4,197
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
QB-38SP-NQ-01T from Renesas Electronics is a 38-pin surface-mount target connector designed for secure, low-inductance mechanical and electrical interfacing between the QB-RL78I1A in-circuit emulator and RL78/I1A-based target systems. It features gold-plated contacts, 0.5 mm pitch, and supports high-fidelity debug signal integrity for real-time trace, breakpoint, and memory access functions during embedded firmware development.
For engineers reviewing the QB-38SP-NQ-01T datasheet, QB-38SP-NQ-01T pinout, QB-38SP-NQ-01T application, or QB-38SP-NQ-01T equivalent, this component is critical for establishing reliable JTAG/SW-DP and clock signal routing between emulator hardware and 38-pin SP package RL78/I1A microcontrollers - especially where trace data fidelity, thermal stability under continuous debug sessions, and mechanical retention strength are design priorities.
Technical Context
QB-38SP-NQ-01T is a passive, unpowered interconnect component used exclusively with the QB-RL78I1A emulator system and RL78/I1A 38-pin SP package devices. It mates directly with the QB-38SP-YQ-01T YQ connector and interfaces to the target PCB via soldered surface-mount termination.
The connector enables full-signal access to RL78/I1A debug pins (including TCK, TMS, TDI, TDO, TRST, RESET, VDD, VSS, and dedicated clock inputs X1/X2/XT1/XT2), supporting all QB-RL78I1A system specifications: real-time execution, 8-event break points, 128K-frame trace buffer, and 120 MHz measurement clock synchronization.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Pitch | 0.5 mm - Enables compact layout on dense target PCBs while maintaining signal integrity for high-speed debug clocks up to 20 MHz. |
| Pin Count | 38 pins - Matches RL78/I1A 38-pin SP package footprint and provides full JTAG/SW-DP, power, ground, and oscillator signal routing. |
| Contact Plating | Gold over nickel - Ensures >500 mating cycles with low contact resistance (<20 mΩ) and corrosion resistance for long-term lab and production debug use. |
| Mounting Type | Surface-mount (SMD) - Designed for reflow soldering at 260°C × 10 s max; requires precise pad alignment using NQGUIDE alignment pins. |
| Compatible Emulator | QB-RL78I1A - Only certified and mechanically dimensioned for use with this specific Renesas IECUBE emulator platform. |
| Target Device | RL78/I1A (38-pin SP package) - Electrically and mechanically validated only for this exact device variant; not interchangeable with 20SP, 30SP, or 32NA variants. |
Pinout & Package
QB-38SP-NQ-01T is a 38-pin, 0.5 mm pitch, surface-mount rectangular connector with dual-row gull-wing leads. Its package conforms to JEDEC MO-220 standard for fine-pitch SMT connectors and is optimized for mechanical retention on FR-4 PCBs using epoxy adhesive pre-mounting and reflow soldering.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD | Target system power supply input | Provides emulator-sensed VDD level (2.7–5.5 V) to QB-RL78I1A for voltage-level matching and power monitoring; triggers TARGET LED when active. |
| VSS | Target system ground reference | Establishes common GND reference between emulator and target; critical for noise-free debug signaling and preventing ground-loop induced trace errors. |
| TCK | JTAG clock input | Carries synchronous debug clock (up to 20 MHz) from QB-RL78I1A to RL78/I1A; timing-critical path requiring controlled impedance routing. |
| TMS | JTAG mode select | Controls JTAG state machine transitions; must be stable during clock edges to avoid misalignment in scan chain operations. |
| TDI | JTAG data input | Serial input for instruction/data loading into RL78/I1A debug interface; routed with matched length to TDO for loopback verification. |
| TDO | JTAG data output | Serial debug response output; used for real-time register readback and memory dump verification during Go/Step operations. |
| TRST | JTAG reset input | Asynchronous active-low reset for JTAG TAP controller; required for clean debug session initialization after power-on or error recovery. |
| RESET | Device reset input | Drives RL78/I1A nRES pin; allows emulator-controlled cold/hot reset without manual button press or external circuitry. |
| X1 / X2 | High-speed system clock inputs | Accepts square-wave clock (1–20 MHz) from target or emulator OSC1; supports PLL configuration up to 64 MHz internal operation. |
| XT1 / XT2 | Subsystem clock inputs | Supports 32.768 kHz crystal or square-wave input for RTC/peripheral timing; required for low-power debug mode validation. |
Availability
QB-38SP-NQ-01T is available at Aetrix Electronics and suitable for RL78/I1A-based automotive body control modules, industrial sensor nodes, and consumer appliance MCU development requiring stable component supply, long-lifecycle support, and guaranteed mechanical compatibility with QB-RL78I1A emulator systems.
Supply support for QB-38SP-NQ-01T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a Japanese semiconductor manufacturer specializing in microcontrollers, analog, and power solutions for automotive, industrial, and IoT applications.
QB-38SP-NQ-01T belongs to Renesas' IECUBE in-circuit emulator accessory product line, engineered specifically to enable robust, production-grade debugging of RL78-family MCUs in real-world PCB environments with minimal signal degradation.
FAQ
Is QB-38SP-NQ-01T compatible with any emulator other than QB-RL78I1A?
No. QB-38SP-NQ-01T is mechanically and electrically qualified only for use with the QB-RL78I1A in-circuit emulator. Its pin assignment, height profile, and mounting interface are uniquely designed to mate with QB-38SP-YQ-01T and QB-38SP-EA-01T components in the IECUBE ecosystem. Using it with other emulators risks misalignment, signal crosstalk, or physical damage due to non-matching connector geometry.
What soldering profile is required for QB-38SP-NQ-01T?
QB-38SP-NQ-01T must be reflow soldered per J-STD-020: peak temperature ≤260°C for ≤10 seconds. Manual soldering is permitted at 350°C for ≤5 seconds per pin. Pre-mounting with two-component epoxy (30+ min cure time) is mandatory before soldering to ensure mechanical registration and prevent pad lift. Flux immersion or vapor cleaning is strictly prohibited.
Does QB-38SP-NQ-01T support both JTAG and SW-DP debug interfaces?
Yes. QB-38SP-NQ-01T provides full pin access to all signals required for both IEEE 1149.1 JTAG and ARM Serial Wire Debug (SW-DP) protocols on the RL78/I1A, including TCK/TMS/TDI/TDO/TRST and SWDIO/SWCLK (shared pins). This dual-mode capability is verified in QB-RL78I1A system testing and enables seamless transition between legacy and modern debug toolchains.
Can QB-38SP-NQ-01T be used with RL78/I1A devices in packages other than 38-pin SP?
No. QB-38SP-NQ-01T is dimensionally and electrically matched only to the 38-pin SP package variant of the RL78/I1A. It is incompatible with 20SP, 30SP, or 32NA packages due to differing pin counts, pitch, and signal mapping. Table 1-3 of the QB-RL78I1A User's Manual explicitly restricts QB-38SP-NQ-01T to "RL78/I1A 38SP" usage.
What is the maximum trace clock frequency supported through QB-38SP-NQ-01T?
QB-38SP-NQ-01T supports trace clock frequencies up to 20 MHz as specified in QB-RL78I1A Hardware Specifications (Table 1-1). This enables full utilization of the emulator's 120 MHz measurement clock and 128K-frame trace buffer when debugging real-time firmware with cycle-accurate timing analysis on RL78/I1A targets.
QB-38SP-NQ-01T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Packaging:
- Box
- Product Status:
- Active
- Module/Board Type:
- Socket Adapter
- For Use With/Related Products:
- Renesas MCUs
QB-38SP-NQ-01T FAQ
1.How can I place an order for QB-38SP-NQ-01T through Aetrix?
Please submit a Request for Quotation (RFQ) for QB-38SP-NQ-01T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for QB-38SP-NQ-01T reliable?
The price and inventory of QB-38SP-NQ-01T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for QB-38SP-NQ-01T is usually 5 days.
3.What payment methods are accepted for QB-38SP-NQ-01T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for QB-38SP-NQ-01T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for QB-38SP-NQ-01T?
QB-38SP-NQ-01T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your QB-38SP-NQ-01T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for QB-38SP-NQ-01T?
For technical support, including QB-38SP-NQ-01T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your QB-38SP-NQ-01T requirements.
6.How does Aetrix verify that QB-38SP-NQ-01T is sourced from the original manufacturer or authorized distributors?
All QB-38SP-NQ-01T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that QB-38SP-NQ-01T meets industry standards.
7.What is the process for return or replacement of QB-38SP-NQ-01T?
All QB-38SP-NQ-01T units undergo pre-shipment inspection (PSI). If there is an issue with QB-38SP-NQ-01T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The QB-38SP-NQ-01T part is unused and in its original packaging.
Return procedure for QB-38SP-NQ-01T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
QB-38SP-NQ-01T Tags

-
AC102015
Microchip Technology

-
LGA SOCKET SML
Telit Cinterion
-
SI5332-32SKT-DK
Skyworks Solutions Inc.
-
SI5332-40SKT-DK
Skyworks Solutions Inc.
-
SI538X4X-64SKT-DK
Skyworks Solutions Inc.

-
PA-SOD6SM18-28
Logical Systems Inc.
-
SI538X4X-44SKT-DK
Skyworks Solutions Inc.

-
SLG47528V-SKT
Renesas Electronics Operations Services Limited

-
SLG47525V-SKT
Renesas Electronics Operations Services Limited

-
LSOCTS08EA-1
BPM Microsystems
-
ATSTK600-UC3A0X-144
Microchip Technology

-
LSOCS08EA-1
BPM Microsystems
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
