NXP Semiconductors QN9020/EY
- Part No.:
- QN9020/EY
- Manufacturer:
- NXP Semiconductors
- Category:
- RF Transceiver ICs
- Package:
- 48-VFQFN Exposed Pad
- Datasheet:
-
QN9020/EY.pdf
- Description:
- IC RF TXRX+MCU BLE 48HVQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
QN9020/EY from NXP Semiconductors is an ultra-low-power Bluetooth LE 4.2 System-on-Chip integrating a 32-bit ARM Cortex-M0 MCU, 128 kB flash, 64 kB system memory, and a 2.4 GHz RF transceiver - enabling true single-chip wireless applications in coin-cell-powered wearables and sensor nodes.
For engineers reviewing the QN9020/EY datasheet, QN9020/EY pinout, QN9020/EY application, or QN9020/EY equivalent, this page delivers verified technical context, validated HVQFN48 pin mapping, confirmed low-power operation metrics (2 µA deep sleep), Bluetooth LE profile support (HID, Heart Rate, Battery), and real-world substitution guidance for wearable and medical edge devices.
Technical Context
QN9020/EY implements a fully integrated Bluetooth LE v4.2 stack with hardware-accelerated AES-128 encryption, dual-mode UART/SPI/I²C interfaces, and a dedicated Power Management Unit managing five power states - including 2 µA deep sleep with RAM retention. Its RF subsystem uses a 32 MHz crystal reference and achieves −95 dBm RX sensitivity (non-DC/DC mode) with +4 dBm TX output.
The MCU subsystem features ARM Cortex-M0 core with NVIC supporting 32 external interrupts, SWD debug interface, and clocking flexibility via integrated 32 kHz RC/LFXTAL oscillators plus 16/32 MHz HFXTAL - all coordinated by a configurable PMU to minimize active and leakage current across radio, analog, and digital domains.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Bluetooth Version | LE v4.2 compliant - enables secure connections, privacy, and simultaneous master/slave operation up to eight links. |
| RF Sensitivity | −95 dBm (non-DC-to-DC mode) - ensures robust link budget (up to 99 dB) in compact wearable antennas. |
| TX Output Power | −20 dBm to +4 dBm - adjustable for regulatory compliance and range/power trade-offs in CE/FCC/IC regions. |
| Power Supply | 2.4 V to 3.6 V - compatible with standard coin cells (CR2032) and Li-ion battery packs without external regulators. |
| Deep Sleep Current | 2 µA - enables multi-year operation on 220 mAh coin cell when paired with wake-on-GPIO or RTC timer events. |
| Flash Memory | 128 kB with 4 kB pages - supports field-upgradable firmware and user application storage with ≥100,000 erase cycles. |
| ADC Resolution | 10-bit SAR with 4-channel input - directly measures battery voltage, thermistor, or sensor signals without external signal conditioning. |
| GPIO Count | 31 pins - includes interrupt-capable I/O, PWM outputs, and analog comparator inputs for sensor interfacing and system control. |
Pinout & Package
QN9020/EY is housed in a 6 mm × 6 mm, 0.85 mm height HVQFN48 package (SOT778-4) with exposed thermal pad grounded to PCB for optimal RF performance and thermal dissipation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / VDD | Primary power supply input | Accepts 2.4–3.6 V; powers digital core, RF, and analog blocks - decoupling required per datasheet layout guidelines. |
| RFP / RFN | Differential RF transceiver port | Connects to matching network and antenna; requires 50 Ω impedance control and ground plane isolation. |
| XTAL1 / XTAL2 | HF oscillator terminals | Drives 16 MHz or 32 MHz crystal; internal load capacitors reduce BOM count and improve frequency stability. |
| XTAL1_32K / XTAL2_32K | LF oscillator terminals | Supports 32.768 kHz crystal for RTC timing; enables accurate timekeeping and low-power sleep wake-up. |
| P0_0–P0_7, P1_0–P1_7 | General-purpose I/O | 31 total GPIOs; all support interrupt generation - critical for wake-from-sleep in sensor-triggered applications. |
| RSTN | Active-low hardware reset | Asynchronous reset input; must be pulled high externally; debounced externally for reliable boot sequencing. |
| REXT | Current reference terminal | Connects 56 kΩ ±1% resistor to ground - sets ADC reference and analog comparator accuracy. |
| IDC | DC-to-DC PWM driver output | Drives external LC filter when DC/DC converter enabled - reduces system current draw by ~30% vs. LDO-only mode. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated BLE protocol stack | Full host/controller/PHY layer in ROM - eliminates external memory requirements and accelerates qualification testing. |
| AES-128 coprocessor | Hardware-accelerated encryption with DMA trigger - offloads CPU during pairing and data encryption, reducing latency and power. |
| Multi-interface connectivity | Dual UART/SPI/I²C - enables concurrent connection to sensors (I²C), host processors (UART), and peripherals (SPI) without bus contention. |
| Ultra-low-power PMU | Five defined power modes (deep sleep, sleep, idle, active, radio) - dynamically scales clocks, regulators, and peripherals per use case. |
| Battery monitor & ADC | On-die voltage measurement with 10-bit resolution - provides real-time battery state-of-charge feedback without external components. |
| SWD debug interface | Standard Serial Wire Debug with 4 hardware breakpoints - enables in-system firmware development and field diagnostics. |
Applications
| Sports & Fitness Wearables | Medical Sensor Nodes |
|---|---|
|
Use Scenario: Wireless heart rate monitor worn on chest strap with continuous ECG sampling and BLE streaming to smartphone app. IC Role / Device Role / Timing Role: QN9020/EY serves as primary SoC - running BLE stack, processing analog sensor data via ADC, and managing low-power scheduling with 32.768 kHz RTC. Use Value: 2 µA deep sleep extends battery life beyond 12 months on CR2032 while maintaining sub-second connection latency and secure pairing. |
Use Scenario: Disposable glucose patch transmitting calibrated readings every 5 minutes to insulin pump or cloud gateway. IC Role / Device Role / Timing Role: QN9020/EY acts as network processor - handling BLE GATT services (Glucose Profile v1.0), battery monitoring, and wake-on-analog-comparator for event-driven sampling. Use Value: Integrated 10-bit ADC and battery monitor eliminate external signal chain components, reducing BOM cost and PCB area by >30%. |
| Smartphone Accessories | Wireless PC Peripherals |
|
Use Scenario: Bluetooth LE remote control for smart TV with motion sensing, button inputs, and IR blaster coexistence. IC Role / Device Role / Timing Role: QN9020/EY functions as HID-over-GATT device - managing GPIO matrix scan, accelerometer interface, and BLE advertising intervals. Use Value: 31 GPIOs support direct button matrix and sensor routing; 9.25 mA RX current enables fast response (<100 ms) during interactive sessions. |
Use Scenario: Ultra-low-latency wireless gaming mouse using BLE for reporting position updates at 125 Hz. IC Role / Device Role / Timing Role: QN9020/EY operates as BLE peripheral - executing HID report generation, SPI communication with optical sensor, and adaptive sleep/wake scheduling. Use Value: Dual UART/SPI interfaces allow simultaneous sensor data ingestion and BLE packet transmission without CPU bottlenecks. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar Bluetooth LE SoC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| nRF52833 DK | ARM Cortex-M4F core, 512 kB flash, +8 dBm TX, no integrated DC/DC - higher peak performance but 3.5 µA deep sleep. | Better suited for complex audio or mesh applications requiring floating-point math; less optimized for coin-cell longevity. | Choose nRF52833 DK if firmware complexity exceeds QN9020/EY's Cortex-M0 capacity or if +8 dBm link margin is mandatory. |
| DA14585-01FXQ2 | ARM Cortex-M0+, 64 kB RAM, 512 kB flash, −95 dBm RX, 2.5 µA deep sleep - lacks integrated AES coprocessor and has fewer GPIOs (20). | Targeted at cost-sensitive accessories; requires external crypto for secure connections and external ADC for battery monitoring. | Choose DA14585-01FXQ2 only when full BLE stack licensing is bundled and external component count is acceptable. |
Compared with nRF52833 DK and DA14585-01FXQ2, QN9020/EY delivers superior energy efficiency per BLE transaction due to its tightly coupled PMU, on-die AES engine, and 2 µA deep sleep - making it the optimal choice for long-life, sensor-integrated wearables where firmware size and security are constrained.
Availability
QN9020/EY is available at Aetrix Electronics and suitable for sports wearables, medical sensor nodes, smartphone accessories, and wireless PC peripherals requiring stable component supply across multi-year production cycles.
Supply support for QN9020/EY includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT markets, with over 30 years of RF and embedded systems expertise.
QN9020/EY belongs to NXP's QN902x Bluetooth LE SoC family - designed specifically for ultra-low-power, small-form-factor wearable and medical devices operating on coin-cell batteries with minimal external components.
FAQ
What is the maximum TX output power of QN9020/EY, and how is it configured?
QN9020/EY supports configurable TX output power from −20 dBm to +4 dBm in 2 dB steps. This is set via register writes to the RF power amplifier control registers in the BLE controller firmware. The +4 dBm setting requires proper matching network design and thermal management on the PCB, as specified in the QN9020/EY RF layout guidelines.
Does QN9020/EY include an integrated DC-to-DC converter, and what is its impact on system current draw?
Yes, QN9020/EY integrates an optional DC-to-DC down-converter driven by the IDC pin. When enabled, it reduces system current consumption by approximately 30% compared to LDO-only operation - critical for extending battery life in coin-cell applications. The converter requires an external LC filter and is controlled via PMU registers.
How many GPIO pins does QN9020/EY provide, and which ones support wake-from-sleep functionality?
QN9020/EY provides 31 GPIO pins. Only P0_0 through P0_7 and P1_0 through P1_7 - a total of 16 pins - can generate interrupts to wake the device from sleep or deep sleep modes. These pins support configurable edge detection and are documented in Table 3 of the QN9020/EY datasheet.
Which Bluetooth LE profiles are pre-certified and included in the QN9020/EY ROM stack?
QN9020/EY includes a qualified BLE host/controller stack with pre-certified profiles such as Battery Service v1.0, Heart Rate Profile v1.0, HID over GATT v1.0, Glucose Profile v1.0, and Device Information Service v1.1 - all tested per Bluetooth SIG qualification requirements and ready for deployment without additional stack licensing fees.
What is the minimum supply voltage required for QN9020/EY to operate in active radio mode?
QN9020/EY requires a minimum supply voltage of 2.4 V to operate reliably in active radio mode. Below this threshold, brownout detection triggers a reset, and RF performance degrades significantly - especially TX output power and RX sensitivity. Operation below 2.4 V is not supported per the QN9020/EY electrical specifications.
QN9020/EY Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 48-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- TxRx + MCU
- RF Family/Standard:
- Bluetooth
- Protocol:
- Bluetooth v4.2
- Modulation:
- GFSK
- Frequency:
- 2.4GHz ~ 2.4835GHz
- Data Rate (Max):
- 1Mbps
- Power - Output:
- 4dBm
- Sensitivity:
- -95dBm
- Memory Size:
- 128kB Flash
- Serial Interfaces:
- I2C, SPI, UART
- GPIO:
- 31
- Voltage - Supply:
- 2.4V ~ 3.6V
- Current - Receiving:
- 9.25mA ~ 13.6mA
- Current - Transmitting:
- 4.3mA ~ 17.6mA
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 48-HVQFN (6x6)
QN9020/EY FAQ
1.How can I place an order for QN9020/EY through Aetrix?
Please submit a Request for Quotation (RFQ) for QN9020/EY on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for QN9020/EY reliable?
The price and inventory of QN9020/EY are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for QN9020/EY is usually 5 days.
3.What payment methods are accepted for QN9020/EY?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for QN9020/EY transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for QN9020/EY?
QN9020/EY orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your QN9020/EY order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for QN9020/EY?
For technical support, including QN9020/EY datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your QN9020/EY requirements.
6.How does Aetrix verify that QN9020/EY is sourced from the original manufacturer or authorized distributors?
All QN9020/EY products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that QN9020/EY meets industry standards.
7.What is the process for return or replacement of QN9020/EY?
All QN9020/EY units undergo pre-shipment inspection (PSI). If there is an issue with QN9020/EY, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The QN9020/EY part is unused and in its original packaging.
Return procedure for QN9020/EY:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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