My Inquiry
My Account
NXP Semiconductors QN9021/DY
.jpg)
- Part No.:
- QN9021/DY
- Manufacturer:
- NXP Semiconductors
- Category:
- RF Transceiver ICs
- Package:
- 32-VFQFN Exposed Pad
- Datasheet:
-
QN9021/DY.pdf
- Description:
- IC RF TXRX BLE 32HVQFN
- Quantity:
- Payment:
- Shipping:
Inventory:145,585
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
QN9021/DY from NXP Semiconductors is an ultra-low-power Bluetooth Low Energy (BLE) System-on-Chip integrating a 32-bit ARM Cortex-M0 MCU, 128 kB on-chip flash, 64 kB system memory, and a BLE v4.2-compliant RF transceiver operating at 2.4 GHz–2.4835 GHz. It delivers −93 dBm RX sensitivity (DC-DC mode), +4 dBm TX output power, and supports both master and slave roles in wearable sensor nodes powered by coin-cell batteries.
For engineers reviewing the QN9021/DY datasheet, QN9021/DY pinout, QN9021/DY application, or QN9021/DY equivalent, this SoC enables rapid development of battery-constrained BLE peripherals requiring integrated protocol stack, secure connections, low-latency UART/SPI/I²C host interfaces, and sub-3 µA sleep current - with no external RF matching components required.
Technical Context
QN9021/DY implements a tightly coupled BLE subsystem with integrated link controller, host stack, and qualified profiles (e.g., Heart Rate, Battery Service, HID over GATT), eliminating need for external protocol firmware. Its Power Management Unit dynamically manages five power states - including 2 µA deep sleep and 3 µA sleep (32 kHz RC oscillator active) - while maintaining full RAM retention and wake-up via GPIO or sleep timer.
The SoC integrates dual oscillators (16/32 MHz HFXO + 32.768 kHz LFXO), AES-128 coprocessor for hardware-accelerated encryption, 4-channel 10-bit ADC with battery monitoring, and two configurable SPI/UART interfaces - enabling direct connection to sensors or host processors without level-shifting or external clock sources.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| BLE Standard | Bluetooth LE v4.2 compliant radio, controller, and host stack - enables certified single-chip BLE operation without external protocol software. |
| RF Performance | −93 dBm RX sensitivity (DC-DC mode); +4 dBm max TX power; 99 dB link budget - ensures robust connectivity in compact wearable enclosures. |
| Power Supply | 2.4 V to 3.6 V single supply - compatible with standard CR2032 coin cells and eliminates need for external voltage regulation. |
| Low-Power Modes | 2 µA deep sleep (RAM retained); 3 µA sleep (32 kHz RC active); 9.25 mA RX current - extends battery life to multi-year operation in intermittent-sensing applications. |
| Memory | 128 kB on-chip flash (4 kB pages); 64 kB system memory; 96 kB ROM - sufficient for BLE stack + user application in standalone mode. |
| MCU Core | 32-bit ARM Cortex-M0 running at 32 MHz - provides deterministic interrupt handling (24 external IRQs) and efficient signal processing for sensor fusion. |
| Peripherals | 4-channel 10-bit ADC; two SPI/UART interfaces; I²C-bus master/slave; AES-128 coprocessor; 31 GPIOs (15 usable on QN9021) - reduces BOM count in space-constrained designs. |
Pinout & Package
QN9021/DY is housed in a 5 mm × 5 mm HVQFN32 package (SOT617-13) with 0.85 mm height and thermally enhanced exposed pad. The back plate must be grounded to PCB for optimal RF performance and thermal dissipation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / VDD | Power supply input | Primary 2.4–3.6 V supply for digital and analog domains; decoupling required per datasheet layout guidelines. |
| VSS | Ground reference | Digital/analog ground return; must connect to exposed thermal pad for RF stability and thermal management. |
| RSTN | Hardware reset input | Active-low asynchronous reset; assertion forces full system initialization and clears all registers and memory state. |
| XTAL1 / XTAL2 | High-frequency crystal interface | Connects to 16 MHz or 32 MHz crystal; internal load capacitance eliminates external caps - reduces BOM and layout complexity. |
| XTAL1_32K / XTAL2_32K | Low-frequency crystal interface | Connects to 32.768 kHz crystal for RTC and BLE timing accuracy; optional use of internal RC oscillator saves component count. |
| RFN / RFP | Differential RF port | Direct connection to antenna matching network; requires 50 Ω impedance control and minimal trace length for <−93 dBm sensitivity. |
| P0_0–P0_7, P1_0–P1_7 | GPIO / peripheral multiplexing | 15 total GPIOs on QN9021; support UART0/1, SPI0/1, I²C, PWM, ADC inputs, comparator I/O, and interrupt wake-up capability. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated BLE v4.2 stack | Full link layer, host stack, and 16+ qualified profiles (Heart Rate, Battery, HID) pre-certified - eliminates BLE qualification effort and firmware development time. |
| AES-128 coprocessor | Hardware-accelerated encryption with DMA trigger - offloads CPU during secure connection establishment and encrypted data transfer, reducing active time and power. |
| DC-to-DC converter | Integrated buck regulator reducing system current by ~30% vs. LDO-only operation - extends coin-cell lifetime in periodic advertising scenarios. |
| Battery monitor | On-die VDD/4 measurement circuit - enables accurate remaining capacity estimation without external resistive dividers or ADC channel allocation. |
| 32 kHz RC oscillator | Calibrated ±250 ppm accuracy - provides low-cost, low-power timing source for sleep timer and BLE advertising intervals when 32.768 kHz crystal is omitted. |
Applications
| Sports & Fitness Wearables | Medical Sensor Nodes |
|---|---|
|
Use Scenario: Compact wrist-worn heart rate monitor with optical PPG sensing and real-time BLE streaming to smartphone. IC Role / Device Role / Timing Role: Primary BLE SoC executing HR profile, ADC sampling, and secure connection management; maintains precise 32.768 kHz timing for BLE advertising intervals. Use Value: 2 µA deep sleep between measurements enables >12-month CR2032 operation; integrated ADC and AES eliminate external signal chain components. |
Use Scenario: Disposable glucose patch transmitting calibrated readings every 5 minutes to insulin pump or mobile app. IC Role / Device Role / Timing Role: Standalone BLE network processor interfacing with electrochemical sensor via ADC and UART; handles secure pairing and OTA firmware updates. Use Value: −93 dBm RX sensitivity ensures reliable link through body tissue; battery monitor enables end-of-life alert before clinical data loss. |
| Smartphone Accessories | PC Peripherals |
|
Use Scenario: Bluetooth LE remote control for smart TV with motion gesture detection and button press reporting. IC Role / Device Role / Timing Role: Dual-role BLE device acting as slave for HID reports and master for accelerometer data polling; uses SPI to interface with IMU. Use Value: 15 GPIOs support matrix keypad + motion sensor + LED indicators; 8.8 mA TX @ 0 dBm ensures strong link margin in RF-noisy living rooms. |
Use Scenario: Wireless mechanical keyboard with per-key RGB lighting and low-latency key reporting. IC Role / Device Role / Timing Role: BLE HID-over-GATT endpoint managing keyboard scan matrix, RGB PWM outputs, and encrypted keystroke transmission. Use Value: Two-channel programmable PWM drives RGB LEDs without MCU overhead; 3 µA sleep current enables multi-year operation on AA batteries. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar Bluetooth LE SoC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| nRF52833 DK | ARM Cortex-M4F core; 512 kB flash; higher peak current (10.5 mA RX); supports Bluetooth 5.1 and Thread | Better suited for complex mesh networks or audio streaming; requires larger battery due to higher active power | Select when advanced protocol features (long range, coded PHY) or computational headroom for local DSP are required. |
| CC2642R1F | ARM Cortex-M4F; 352 kB flash; integrated DC/DC; −103 dBm RX sensitivity; supports concurrent BLE + IEEE 802.15.4 | Targeted at industrial gateways needing dual-protocol coexistence; larger 7 mm × 7 mm QFN package | Choose for applications requiring simultaneous BLE and Sub-1 GHz operation or extended temperature range (−40°C to +125°C). |
Compared with nRF52833 DK and CC2642R1F, QN9021/DY offers the lowest active and sleep currents among these three, smallest HVQFN32 footprint, and fully integrated BLE v4.2 stack - making it optimal for ultra-long-life, size-constrained wearables where protocol simplicity and power efficiency outweigh feature expansion needs.
Availability
QN9021/DY is available at Aetrix Electronics and suitable for sports wearables, medical sensor nodes, smartphone accessories, and PC peripherals requiring stable component supply across high-mix, low-volume production runs.
Supply support for QN9021/DY includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT markets, with headquarters in Eindhoven, Netherlands.
QN9021/DY belongs to NXP's QN902x ultra-low-power BLE SoC family, designed specifically for battery-operated wearable electronics requiring certified Bluetooth functionality, minimal bill-of-materials, and multi-year operational lifetime on coin-cell power.
FAQ
What is the maximum TX output power of QN9021/DY and how is it configured?
QN9021/DY supports TX output power from −20 dBm to +4 dBm in 4 dB steps, configured via register writes to the RF power amplifier control registers. The +4 dBm setting achieves best link budget in compact antennas, while lower settings reduce current consumption and regulatory compliance risk. All levels maintain GFSK modulation fidelity and BLE v4.2 spectral mask compliance.
Does QN9021/DY require external RF matching components?
No, QN9021/DY does not require external RF matching components. Its integrated RF front-end is optimized for direct connection to a 50 Ω antenna feed point. Layout guidelines specify controlled-impedance 50 Ω traces from RFP/RFN pins to antenna, with strict grounding of the exposed thermal pad - eliminating baluns, matching networks, or external filters needed in discrete RF designs.
How many GPIOs are available on QN9021/DY and what alternate functions do they support?
QN9021/DY provides 15 GPIO pins (P0_0–P0_7, P1_0–P1_7), each configurable as general-purpose I/O or multiplexed to UART0/1, SPI0/1, I²C, PWM, ADC input, analog comparator I/O, or timer capture/compare functions. All 15 support interrupt generation and can wake the device from sleep modes - enabling flexible peripheral interfacing in space-constrained layouts.
What power supply voltage range does QN9021/DY support and is DC-DC conversion mandatory?
QN9021/DY operates from 2.4 V to 3.6 V - ideal for CR2032 (3 V nominal) and AAA/AA battery configurations. Integrated DC-DC conversion is optional: enabled via register control to reduce system current by ~30%, but LDO-only operation is fully supported for simpler designs or when DC-DC noise sensitivity is a concern.
Which Bluetooth LE profiles are pre-integrated and qualified in QN9021/DY?
QN9021/DY includes a fully qualified, pre-certified Bluetooth LE stack with 16+ profiles: Heart Rate, Battery Service, HID over GATT, Glucose, Blood Pressure, Proximity, Alert Notification, Time Profile, and Find Me. These are implemented in ROM and flash-resident firmware - requiring no additional licensing, stack porting, or Bluetooth SIG qualification for end-product certification.
QN9021/DY Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 32-VFQFN Exposed Pad
- Packaging:
- Bulk
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- TxRx Only
- RF Family/Standard:
- Bluetooth
- Protocol:
- Bluetooth v4.0
- Modulation:
- -
- Frequency:
- 2.4GHz
- Data Rate (Max):
- -
- Power - Output:
- 4dBm
- Sensitivity:
- -95dBm
- Memory Size:
- 128kB Flash
- Serial Interfaces:
- I2C, SPI, UART
- GPIO:
- 31
- Voltage - Supply:
- 2.4V ~ 3.6V
- Current - Receiving:
- 9.2mA
- Current - Transmitting:
- 8.8mA
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 32-HVQFN (5x5)
QN9021/DY FAQ
1.How can I place an order for QN9021/DY through Aetrix?
Please submit a Request for Quotation (RFQ) for QN9021/DY on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for QN9021/DY reliable?
The price and inventory of QN9021/DY are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for QN9021/DY is usually 5 days.
3.What payment methods are accepted for QN9021/DY?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for QN9021/DY transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for QN9021/DY?
QN9021/DY orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your QN9021/DY order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for QN9021/DY?
For technical support, including QN9021/DY datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your QN9021/DY requirements.
6.How does Aetrix verify that QN9021/DY is sourced from the original manufacturer or authorized distributors?
All QN9021/DY products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that QN9021/DY meets industry standards.
7.What is the process for return or replacement of QN9021/DY?
All QN9021/DY units undergo pre-shipment inspection (PSI). If there is an issue with QN9021/DY, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The QN9021/DY part is unused and in its original packaging.
Return procedure for QN9021/DY:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
QN9021/DY Tags
-
ESP32-D0WD-V3
Espressif Systems
-
ESP8266EX
Espressif Systems
-
ESP32-S3
Espressif Systems
-
NRF24L01P-R7
Nordic Semiconductor ASA
-
NRF24L01P-R
Nordic Semiconductor ASA
-
ESP32-U4WDH
Espressif Systems
-
DA14531-00000OG2
Renesas
-
ESP32-C6FH4
Espressif Systems
-
DA14531-00000FX2
Renesas
-
NRF24L01P-T
Nordic Semiconductor ASA
-
NRF52810-QCAA-R
Nordic Semiconductor ASA
-
ESP32-S3FN8
Espressif Systems
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
