Renesas R5F100GLDNA#20
- Part No.:
- R5F100GLDNA#20
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 48-WFQFN Exposed Pad
- Datasheet:
-
R5F100GLDNA#20.pdf
- Description:
- IC MCU 16BIT 512KB FLASH 48HWQFN
- Quantity:
- Payment:

- Shipping:

Inventory:475
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Product details
Overview
R5F100GLDNA#20 from Renesas is a 48-pin LFQFP-packaged 16-bit RL78/G13 microcontroller with 128 KB flash, 8 KB data flash, and 12 KB RAM, operating from 1.6 V to 5.5 V. It delivers 41 DMIPS at 32 MHz, features ultra-low power consumption (66 μA/MHz active, 0.57 μA RTC+LVD mode), and integrates 16-bit timers, 10-bit ADC (26 channels), UART/LIN, I²C, CSI, RTC, and DMA - deployed in industrial motor control and sensor interface modules.
For engineers reviewing the R5F100GLDNA#20 datasheet, R5F100GLDNA#20 pinout, R5F100GLDNA#20 application, or R5F100GLDNA#20 equivalent, key selection criteria include its -40°C to +105°C industrial temperature grade (G suffix), HWQFN-compatible 48-pin LFQFP package (FB), integrated data flash with 1M rewrite cycles, real-time clock with calendar/alarm, and support for background data flash programming during code execution.
Technical Context
The R5F100GLDNA#20 implements the RL78 CPU core with CISC architecture and 3-stage pipeline, enabling instruction execution times from 0.03125 μs (32 MHz high-speed mode) to 30.5 μs (32.768 kHz subsystem clock). It supports multiple low-power modes - HALT, STOP, and SNOOZE - with on-chip POR and LVD (14-level selectable).
Its peripheral set includes up to 16 channels of 16-bit timer, one 12-bit interval timer, one real-time clock with calendar and clock correction, one watchdog timer, and three serial interfaces (CSI, UART/LIN, I²C) configurable across 2–10 channels. The 10-bit A/D converter supports up to 26 analog inputs with internal 1.45 V reference and temperature sensor.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | RL78 16-bit CISC with 3-stage pipeline, 41 DMIPS @ 32 MHz |
| Memory | 128 KB code flash (1 KB block size), 8 KB data flash (1M rewrite cycles), 12 KB RAM |
| Operating Voltage | 1.6 V to 5.5 V - enables direct battery operation (e.g., 2×AA, Li-ion, or 3.3 V/5 V rails) |
| Power Consumption | 66 μA/MHz active; 0.57 μA in STOP mode with RTC + LVD enabled |
| Temperature Range | -40°C to +105°C (industrial G-grade - qualified for extended thermal environments) |
| Analog Peripherals | 10-bit A/D converter with 26 input channels, internal 1.45 V reference, and on-chip temperature sensor |
| Serial Interfaces | Up to 8 CSI channels, 4 UART/LIN channels (LIN 2.1 compliant), and 10 I²C/Simplified I²C channels |
Pinout & Package
Package: 48-pin LFQFP (7 mm × 7 mm, 0.5 mm pitch), RoHS-compliant, moisture sensitivity level 3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VSS | Power supply and ground | Dual VDD/VSS pairs ensure stable core and I/O rail decoupling; supports single-supply 1.6–5.5 V operation |
| P00–P07, P10–P17, P20–P27, P30–P37, P40–P47, P50–P57 | General-purpose I/O ports | 48 total I/O pins; configurable as N-ch open-drain (6 V tolerant), TTL input, or with on-chip pull-up; supports 1.8/2.5/3 V logic interfacing |
| P10/SCK00/SCL00 | Serial clock input/output | Shared function pin supporting CSI clock (SCK00) or I²C clock (SCL00); enables dual-protocol peripheral sharing |
| P11/SI00/RxD0/TOOLRxD/SDA00 | Serial data input / UART receive / debug RX / I²C data | Multi-function pin for CSI data-in, UART receive, on-chip debug communication, and I²C bidirectional data - reduces external signal routing |
| P20/ANI0/AVREFP | Analog input / ADC reference positive | Primary ADC channel 0 input and selectable AVREFP source - allows ratiometric or precision reference configurations |
| RESET | Active-low reset input | Asynchronous reset pin with internal pull-up; accepts external reset sources or debounced push-button inputs |
Key Features
| Feature | Design Value |
|---|---|
| Self-programming with boot swap | Enables field firmware updates with zero downtime via dual-bank flash management and atomic swap |
| Background data flash operation (BGO) | Allows full CPU execution from program memory while rewriting data flash - critical for logging without interrupting control loops |
| Real-time clock with calendar & alarm | 99-year calendar, programmable alarm, and ±1 ppm clock correction - eliminates need for external RTC IC in time-stamped applications |
| Ultra-low-power STOP mode (0.57 μA) | RTC + LVD remain active in STOP mode - ideal for battery-powered wake-on-event systems like smart sensors |
| On-chip voltage detector (LVD) | 14-level programmable threshold with interrupt/reset options - provides robust brown-out protection without external supervisor IC |
| DMA controller (4 channels) | 2-clock transfers between SFR and RAM - offloads CPU for high-throughput ADC sampling or serial data movement |
Applications
| Industrial Motor Control | Smart Sensor Node |
|---|---|
|
Use Scenario: Closed-loop BLDC motor drive in HVAC blowers with thermal monitoring and fault reporting. IC Role / Device Role: Main system controller executing FOC algorithms, PWM generation, ADC-based current sensing, and LIN bus communication to master ECU. Use Value: Integrated 10-bit ADC (26 channels), 16-bit timers with complementary PWM output, and LIN-compliant UART reduce BOM count and PCB area vs. discrete MCU + transceiver solutions. |
Use Scenario: Battery-powered environmental sensor node measuring temperature, humidity, and CO₂, transmitting data over I²C to gateway MCU. IC Role / Device Role: Low-power sensor aggregator with RTC-triggered sampling, on-chip temperature sensor calibration, and background data flash logging. Use Value: 0.57 μA STOP mode with RTC enables multi-year battery life; BGO allows continuous sensor logging during active processing. |
| Home Appliance UI Controller | Industrial PLC I/O Module |
|
Use Scenario: Touchless control panel in washing machines using capacitive touch keys and LED indicators. IC Role / Device Role: Dedicated UI processor handling key scan, buzzer tone generation, LED PWM dimming, and UART communication to main MCU. Use Value: On-chip clock output/buzzer controller and key interrupt function eliminate external drivers; 1.6 V min operating voltage supports wide-input power supplies. |
Use Scenario: DIN-rail mounted digital I/O expansion module with isolated inputs/outputs and Modbus RTU over RS-485. IC Role / Device Role: Protocol handler and GPIO manager interfacing with isolated level shifters and RS-485 transceivers. Use Value: 48 GPIOs with 6 V-tolerant open-drain outputs simplify direct connection to industrial 24 V logic; UART with LIN support adapts to Modbus framing requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F100GLDFA#V0 | Same core, memory, and peripherals; differs only in packaging (48-pin LQFP, 0.65 mm pitch) and temperature grade (D: -40°C to +85°C) | Targeted at commercial/industrial ambient applications without extended temperature requirement | Select when board layout uses standard 0.65 mm pitch LQFP footprints and ambient temperature stays ≤ +85°C |
| R5F101GLDNA#20 | Identical package and pinout, but lacks data flash (0 KB); retains same code flash, RAM, and peripheral set | Suitable where firmware-only storage is sufficient and data logging or parameter retention is handled externally | Choose to reduce cost and simplify qualification when non-volatile parameter storage is not required on-chip |
Compared with R5F100GLDNA#20, R5F100GLDFA#V0 offers identical functionality at lower thermal rating and different footprint, while R5F101GLDNA#20 removes data flash to cut cost - making the former ideal for volume consumer designs and the latter for firmware-only embedded controllers.
Availability
R5F100GLDNA#20 is available at Aetrix Electronics and suitable for industrial motor control, smart sensor nodes, home appliance UIs, and PLC I/O modules requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for R5F100GLDNA#20 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The RL78/G13 family targets cost-sensitive, ultra-low-power general-purpose applications - delivering high integration, robust industrial qualification, and toolchain compatibility with Renesas CS+ and e² studio.
FAQ
What is the maximum operating frequency and corresponding performance of the R5F100GLDNA#20?
The R5F100GLDNA#20 operates at up to 32 MHz using its high-speed on-chip oscillator, delivering 41 DMIPS of processing performance. Its minimum instruction execution time is 0.03125 μs under this condition, and it supports dynamic clock scaling down to 32.768 kHz for ultra-low-power RTC operation - enabling flexible trade-offs between throughput and energy efficiency in the R5F100GLDNA#20.
Does the R5F100GLDNA#20 support in-system programming and secure firmware updates?
Yes, the R5F100GLDNA#20 supports full in-system programming via its on-chip debug interface and includes flash shield window and block erase prohibition features for security. It implements self-programming with boot swap functionality, allowing safe over-the-air or field firmware updates without risk of corruption - a core capability built into the R5F100GLDNA#20's flash controller.
What are the key low-power modes supported by the R5F100GLDNA#20, and what functions remain active in each?
The R5F100GLDNA#20 supports HALT, STOP, and SNOOZE modes. In STOP mode (0.57 μA), the RTC and LVD remain fully operational; in HALT mode, the CPU stops but peripherals continue; SNOOZE enables selective peripheral operation (e.g., ADC conversion or UART receive) while CPU sleeps. All modes are accessible directly in the R5F100GLDNA#20 without external components.
Can the R5F100GLDNA#20 interface directly with 1.8 V or 2.5 V logic devices?
Yes, the R5F100GLDNA#20 supports different-potential interface operation: its I/O ports can be configured to interface with 1.8 V, 2.5 V, or 3 V external devices without level shifters. This is achieved through independent VDDIO configuration and input buffer design - a verified feature of the R5F100GLDNA#20 per its electrical specifications.
Is the R5F100GLDNA#20 pin-compatible with other RL78/G13 variants in the same package?
Yes, all RL78/G13 devices in the 48-pin LFQFP (FB) package - including R5F100GLDNA#20, R5F100GLDFA#V0, and R5F101GLDNA#20 - share identical pinouts and mechanical footprint. This enables hardware reuse across memory, temperature grade, and data flash variants - a documented compatibility guarantee for the R5F100GLDNA#20 within its package family.
R5F100GLDNA#20 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 48-WFQFN Exposed Pad
- Series:
- RL78/G13
- Packaging:
- Tray
- Product Status:
- Last Time Buy
- Programmable:
- Not Verified
- Core Processor:
- RL78
- Core Size:
- 16-Bit
- Speed:
- 32MHz
- Connectivity:
- CSI, I2C, LINbus, UART/USART
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 34
- Program Memory Size:
- 512KB (512K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 32K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.6V ~ 5.5V
- Data Converters:
- A/D 10x8/10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F100GLDNA#20 FAQ
1.How can I place an order for R5F100GLDNA#20 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F100GLDNA#20 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F100GLDNA#20 reliable?
The price and inventory of R5F100GLDNA#20 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F100GLDNA#20 is usually 5 days.
3.What payment methods are accepted for R5F100GLDNA#20?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F100GLDNA#20 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F100GLDNA#20?
R5F100GLDNA#20 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F100GLDNA#20 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F100GLDNA#20?
For technical support, including R5F100GLDNA#20 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F100GLDNA#20 requirements.
6.How does Aetrix verify that R5F100GLDNA#20 is sourced from the original manufacturer or authorized distributors?
All R5F100GLDNA#20 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F100GLDNA#20 meets industry standards.
7.What is the process for return or replacement of R5F100GLDNA#20?
All R5F100GLDNA#20 units undergo pre-shipment inspection (PSI). If there is an issue with R5F100GLDNA#20, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F100GLDNA#20 part is unused and in its original packaging.
Return procedure for R5F100GLDNA#20:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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