Renesas R5F10267ASM#75
- Part No.:
- R5F10267ASM#75
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 20-LSSOP (0.173", 4.40mm Width)
- Datasheet:
-
R5F10267ASM#75.pdf
- Description:
- 16-BIT GENERAL MCU RL78/G12 4K 2
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
R5F10267ASM#75 from Renesas Electronics is a 20-pin TSSOP ultra-low-power 16-bit RL78/G12 microcontroller with 4 KB code flash, 2 KB data flash, 256 B RAM, and integrated 10-bit A/D converter (11 channels), operating from 1.8 V to 5.5 V at –40°C to +85°C for consumer-grade embedded control in battery-powered sensors and smart peripherals.
For engineers reviewing the R5F10267ASM#75 datasheet, R5F10267ASM#75 pinout, R5F10267ASM#75 application, or R5F10267ASM#75 equivalent, key selection criteria include its 2-channel DMA support, dual simplified I²C/CSI interfaces, on-chip CRC, and HALT/STOP/SNOOZE low-power modes enabling sub-63 μA/MHz operation in real-time monitoring systems.
Technical Context
The R5F10267ASM#75 implements the RL78 CPU core with 3-stage pipeline CISC architecture, 1 MB address space, and selectable high-speed on-chip oscillator (1–24 MHz, ±1.0% accuracy at –20°C to +85°C). It integrates a 12-bit interval timer, window watchdog timer, and programmable clock/buzzer output controller for deterministic timing control.
Its peripheral set includes UART0, CSI00/CSI01, IICA0, 4-channel 16-bit TAU timer with PWM capability, and 11-channel 10-bit A/D converter with internal reference (1.45 V) and temperature sensor-configured via fixed-function pins and peripheral I/O redirection register (PIOR) for flexible signal routing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | RL78 16-bit CISC with 3-stage pipeline, 1 MB address space, 8×8-bit register banks |
| Flash Memory | 4 KB code flash + 2 KB data flash with background operation (BGO) and 1M rewrite cycles |
| Operating Voltage | 1.8 V to 5.5 V supply enables direct interface with 1.8/2.5/3.3 V logic and battery-backed operation |
| Low-Power Modes | HALT (63 μA/MHz), STOP (0.52 μA typical), SNOOZE (peripheral active while CPU halted) |
| A/D Converter | 10-bit resolution, 11 input channels, internal 1.45 V reference, integrated temperature sensor |
| Serial Interfaces | UART0 (1 ch), CSI00/CSI01 (2 ch), IICA0 (1 ch), IIC00/IIC01 (2 ch) - all software-configurable |
| Timer System | 4-channel 16-bit TAU with TO00–TO03 outputs, 12-bit interval timer, window watchdog timer |
Pinout & Package
Package: 20-pin TSSOP (4.4 × 6.5 mm, 0.65-mm pitch), RoHS-compliant, JEDEC MS-013AC compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD | Power Supply | Main 1.8–5.5 V supply rail for core and I/O; decoupling required per datasheet |
| VSS | Ground Reference | Digital ground return; must be connected to system GND plane |
| P10/ANI16/PCLBUZ0/SCK00/SCL00 | Multiplexed I/O | Primary SPI clock or I²C clock; also supports buzzer output and analog input ANI16 |
| P11/ANI17/SI00/RxD0/SDA00/TOOLRxD | Multiplexed I/O | UART receive or SPI data-in or I²C data line; TOOLRxD enables debug communication |
| P12/ANI18/SO00/TxD0/TOOLTxD | Multiplexed I/O | UART transmit or SPI data-out; TOOLTxD supports on-chip debug interface |
| P13/ANI19/TI00/TO00/INTP2 | Multiplexed I/O | Timer input/output or external interrupt source INTP2; supports edge-triggered wake-up |
| P14/ANI20/TI01/TO01/INTP3 | Multiplexed I/O | Second timer channel or interrupt input INTP3; enables dual-edge capture for encoder inputs |
| P20/ANI0/AVREFP | Analog Reference | Positive analog reference voltage input; also serves as first A/D channel ANI0 |
| P21/ANI1/AVREFM | Analog Reference | Negative analog reference voltage input; also serves as second A/D channel ANI1 |
| P22/ANI2 | Analog Input | Dedicated A/D input ANI2; supports differential measurement with AVREFM |
| P23/ANI3 | Analog Input | Dedicated A/D input ANI3; usable with internal temperature sensor for ambient monitoring |
| P40/KR0/TOOL0 | Debug Interface | On-chip debug data I/O; KR0 supports key-scan matrix input for low-pin-count HMI |
| P41/ANI22/SO01/SDA01/TI02/TO02/INTP1 | Multiplexed I/O | Secondary SPI/I²C data line or timer I/O or interrupt INTP1; enables multi-interface coexistence |
| P42/ANI21/SCK01/SCL01/TI03/TO03 | Multiplexed I/O | Secondary SPI/I²C clock or timer I/O; allows independent clocking of two serial peripherals |
| P60/KR4/SCLA0/(TxD0) | I²C Interface | I²C clock line SCLA0; optional TxD0 remapping enables shared UART/I²C pin usage |
| P61/KR5/SDAA0/(RxD0) | I²C Interface | I²C data line SDAA0; optional RxD0 remapping supports dual-role serial pin |
| P121/KR3/X1/(TI03)/(INTP3) | Oscillator Input | Crystal/ceramic resonator input X1; TI03/INTP3 alternate functions enable hardware timer sync |
| P122/KR2/X2/EXCLK/(TI02)/(INTP2) | Oscillator Output | Crystal/ceramic resonator output X2 or external clock input EXCLK; supports clock source redundancy |
| P125/KR1/SI01/RESET | Reset Control | Active-low reset input RESET; SI01 alternate function enables secondary SPI data-in path |
| P137/INTP0 | Interrupt Input | Dedicated external interrupt INTP0; supports wake-up from STOP mode with configurable polarity |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-Low-Power Operation | 63 μA/MHz active current enables >1-year battery life in coin-cell-powered sensor nodes |
| Data Flash with BGO | 2 KB data flash supports background rewriting during program execution for non-volatile logging |
| Hardware CRC Engine | Integrated CRC module accelerates firmware integrity checks and communication packet validation |
| RAM Guard & SFR Guard | Memory protection prevents accidental overwrites of critical variables and peripheral registers |
| Multi-Mode Low-Power Support | HALT/STOP/SNOOZE modes allow selective peripheral retention while minimizing wake latency and power |
| Flexible Pin Multiplexing | Peripheral I/O redirection register (PIOR) enables dynamic reassignment of up to 10 functions per pin group |
Applications
| Smart Home Sensor Node | Industrial Remote I/O Module |
|---|---|
Use Scenario: Battery-powered temperature/humidity sensor with BLE gateway interface. IC Role / Device Role / Timing Role: Main controller managing A/D sampling, data preprocessing, and UART-to-BLE bridge timing. Use Value: 4 KB flash stores sensor fusion algorithms; 2 KB data flash logs historical readings without host intervention. | Use Scenario: DIN-rail mounted digital input/output expansion unit for PLC systems. IC Role / Device Role / Timing Role: Isolated fieldbus interface controller handling Modbus RTU framing and GPIO scan timing. Use Value: Dual CSI/I²C channels enable simultaneous RS-485 transceiver control and local EEPROM configuration access. |
| Portable Medical Monitor | White Goods Control Panel |
Use Scenario: Handheld pulse oximeter with optical sensor interface and LCD driver. IC Role / Device Role / Timing Role: Signal acquisition MCU synchronizing LED drive timing with photodiode sampling via TAU PWM and capture. Use Value: On-chip temperature sensor calibrates ADC offset drift; 11-channel A/D supports multi-wavelength sensing. | Use Scenario: Washing machine control board managing motor drive, water level, and user interface. IC Role / Device Role / Timing Role: Primary appliance controller coordinating motor phase timing, keypad scan, and buzzer feedback. Use Value: PCLBUZ0 output drives piezo buzzer directly; KR0–KR5 key return pins reduce external scan circuitry. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F10268ASM#75 | 8 KB code flash, 512 B RAM, same package and peripheral set | Supports larger firmware images and more complex state machines | Select when firmware exceeds 4 KB or requires additional RAM for buffering |
| R5F10367ASM#75 | No data flash, no DMA, no CRC, reduced oscillator accuracy (±5%), fewer serial interfaces | Lacks background data logging and hardware checksum acceleration | Select only for cost-sensitive designs where data flash and CRC are unnecessary |
Compared with R5F10268ASM#75, the R5F10267ASM#75 offers lower memory footprint and reduced BOM cost for simpler firmware; compared with R5F10367ASM#75, it delivers superior reliability via data flash endurance, hardware CRC, and tighter oscillator tolerance for time-critical sensor synchronization.
Availability
R5F10267ASM#75 is available at Aetrix Electronics and suitable for smart home sensor nodes, industrial remote I/O modules, portable medical monitors, and white goods control panels requiring stable component supply across automotive-qualified production cycles.
Supply support for R5F10267ASM#75 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a Japanese semiconductor manufacturer specializing in microcontrollers, analog, and power management ICs for industrial, automotive, and IoT markets.
The RL78/G12 product line delivers ultra-low-power 16-bit MCUs optimized for cost-sensitive, battery-operated embedded control applications requiring robust analog integration and long-term firmware maintainability.
FAQ
What is the maximum operating frequency of the R5F10267ASM#75?
The R5F10267ASM#75 supports a maximum high-speed on-chip oscillator frequency of 24 MHz with ±1.0% accuracy across –20°C to +85°C. When using an external crystal (X1/X2), the maximum main system clock frequency is 20 MHz at VDD ≥ 2.7 V or 16 MHz at VDD ≥ 2.4 V. The minimum instruction execution time is 0.04167 µs at 24 MHz operation.
Does the R5F10267ASM#75 include data flash memory?
Yes, the R5F10267ASM#75 includes 2 KB of on-chip data flash memory supporting background operation (BGO), allowing program execution while rewriting. It guarantees 1,000,000 rewrite cycles at VDD = 1.8–5.5 V and enables non-volatile parameter storage without external EEPROM.
What low-power modes does the R5F10267ASM#75 support?
The R5F10267ASM#75 supports HALT mode (63 μA/MHz), STOP mode (0.52 μA typical), and SNOOZE mode (peripherals remain active while CPU is halted). All modes retain RAM content and support wake-up via external interrupt, timer, or serial interface activity-critical for energy-constrained sensor applications.
How many analog input channels does the R5F10267ASM#75 provide?
The R5F10267ASM#75 provides 11 analog input channels (ANI0–ANI3, ANI16–ANI22) with 10-bit resolution, internal 1.45 V reference voltage, and integrated temperature sensor. Channels ANI0 and ANI1 double as AVREFP/AVREFM for differential measurements, enhancing precision in sensor signal conditioning.
Is the R5F10267ASM#75 pin-compatible with other RL78/G12 20-pin variants?
Yes, the R5F10267ASM#75 shares identical 20-pin TSSOP pinout and electrical characteristics with other R5F102xxASM#75 and R5F103xxASM#75 variants. However, functional differences exist-such as presence of data flash, DMA, and CRC-which require firmware adaptation despite mechanical compatibility.
R5F10267ASM#75 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 20-LSSOP (0.173", 4.40mm Width)
- Series:
- RL78/G12
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RL78
- Core Size:
- 16-Bit
- Speed:
- 24MHz
- Connectivity:
- CSI, I2C, UART/USART
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 14
- Program Memory Size:
- 4KB (4K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 2K x 8
- RAM Size:
- 512 x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 5.5V
- Data Converters:
- A/D 11x8/10b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F10267ASM#75 FAQ
1.How can I place an order for R5F10267ASM#75 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F10267ASM#75 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F10267ASM#75 reliable?
The price and inventory of R5F10267ASM#75 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F10267ASM#75 is usually 5 days.
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Once your R5F10267ASM#75 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F10267ASM#75?
For technical support, including R5F10267ASM#75 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F10267ASM#75 requirements.
6.How does Aetrix verify that R5F10267ASM#75 is sourced from the original manufacturer or authorized distributors?
All R5F10267ASM#75 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F10267ASM#75 meets industry standards.
7.What is the process for return or replacement of R5F10267ASM#75?
All R5F10267ASM#75 units undergo pre-shipment inspection (PSI). If there is an issue with R5F10267ASM#75, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F10267ASM#75 part is unused and in its original packaging.
Return procedure for R5F10267ASM#75:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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