Renesas R5F104BDAFP#V0
- Part No.:
- R5F104BDAFP#V0
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 32-LQFP
- Datasheet:
-
R5F104BDAFP#V0.pdf
- Description:
- IC MCU 16BIT 48KB FLASH 32LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:1,672
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F104BDAFP#V0 from Renesas is a 32-pin LQFP-32, 32 MHz RL78/G14 16-bit microcontroller with 48 KB flash, 4 KB data flash, and 5.5 KB RAM, operating from 1.6–5.5 V, featuring ultra-low-power HALT/STOP/SNOOZE modes (66 μA/MHz active, 0.60 μA RTC+LVD), integrated 10-bit ADC (20 ch), UART/SPI/I²C interfaces, and real-time clock - deployed in industrial sensor nodes and battery-powered control modules.
For engineers reviewing the R5F104BDAFP#V0 datasheet, R5F104BDAFP#V0 pinout, R5F104BDAFP#V0 application, or R5F104BDAFP#V0 equivalent, key selection criteria include its 32-pin LQFP-0.8 mm pitch package, industrial-grade −40 to +85°C operation (D-grade), 48 KB code flash with self-programming and flash shield window, and dual UART/LIN support for robust serial communication in space-constrained embedded systems.
Technical Context
The R5F104BDAFP#V0 implements the RL78 CPU core with 3-stage pipeline CISC architecture, supporting instruction execution times from 0.03125 μs (32 MHz) to 30.5 μs (32.768 kHz), and includes multiply/divide/accumulate instructions with 1 MB address space. It integrates an Event Link Controller (ELC) enabling hardware-triggered peripheral chaining without CPU intervention.
Its power management includes on-chip POR and 14-level voltage detector (LVD) with interrupt/reset options, plus Data Transfer Controller (DTC) supporting normal, repeat, and block transfer modes activated by 19–26 event sources - critical for deterministic low-latency data movement in real-time control loops.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | RL78 16-bit CISC with 3-stage pipeline; enables deterministic timing and low-power interrupt latency. |
| Max Clock | 32 MHz (via high-speed on-chip oscillator ±1.0% accuracy); eliminates external crystal for cost-sensitive designs. |
| Flash Memory | 48 KB code flash + 4 KB data flash; supports background operation (BGO) and 1M rewrite cycles for firmware updates and logging. |
| RAM | 5.5 KB on-chip RAM; sufficient for real-time control stacks and small protocol buffers without external memory. |
| ADC | 10-bit resolution, 20-channel SAR ADC with internal 1.45 V reference and temperature sensor; enables direct analog sensing in HVAC and motor feedback. |
| Serial Interfaces | 3 UART (LIN-capable), 3 CSI/SPI, 4 I²C; allows concurrent communication with sensors, displays, and host controllers. |
| Operating Temp | −40 to +85°C (D-grade industrial); qualified for factory automation and outdoor metering environments. |
| Supply Voltage | 1.6–5.5 V single supply; supports direct Li-ion (3.0–4.2 V) or 3.3/5 V rail operation without level shifters. |
Pinout & Package
Package: 32-pin LQFP (7 × 7 mm, 0.8 mm pitch), RoHS-compliant, plastic body with exposed pad not required (unlike HWQFN variants).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P00 | TxD1 / TI00 / TRGCLKA | Primary UART transmit output and timer input; enables full-duplex serial comms and precise timebase capture. |
| P01 | RxD1 / TO00 / TRGCLKB | Primary UART receive input and timer output; supports synchronous timing generation and interrupt-driven RX handling. |
| P10–P17 | SPI/I²C/UART channel pins (SCK11, SI11, SO11, SCL11, etc.) | Dedicated multi-protocol serial I/O with flexible peripheral redirection; reduces PCB routing complexity for mixed-interface systems. |
| P30 | INTP3 / SCK00 / SCL00 / TRJO0 | Interrupt-capable clock input for I²C/SPI master mode; allows wake-up from STOP mode via external bus activity. |
| P50/P51 | RxD0/TxD0 / INTP1/INTP2 / TOOLRxD/TOOLTxD | Dual-role debug/serial interface; enables in-circuit programming and runtime diagnostics without dedicated debug headers. |
| RESET | Active-low reset input | Asynchronous reset with internal pull-up; compatible with external supervisor ICs or manual reset buttons. |
| VDD/VSS | Power supply and ground | Single 1.6–5.5 V supply; decoupling required at REGC (capacitor to VSS) per datasheet Caution. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low-power modes | HALT (66 μA/MHz), STOP (0.60 μA w/ RTC+LVD), SNOOZE (fast wake-up); extends battery life in wireless sensors beyond 5 years. |
| Self-programmable flash | Boot swap + flash shield window functions; enables secure over-the-air (OTA) firmware updates without erasing critical configuration. |
| Hardware-peripheral linking | Event Link Controller (ELC) connects 19–26 event sources to peripherals; eliminates CPU polling and reduces ISR overhead by >40%. |
| Integrated analog subsystem | 10-bit ADC (20 ch), 8-bit DAC (2 ch), comparator (2 ch), temp sensor, and 1.45 V ref; replaces 3–4 discrete analog ICs in motor control and environmental monitoring. |
| LIN-compliant UART | 3 UART channels with LIN bus support (break detection, sync field, checksum); meets ISO 17987-4 for automotive body electronics and industrial networks. |
| On-chip debug | Fully integrated on-chip debug circuit with SWD interface; eliminates need for external JTAG emulator during development and field service. |
Applications
| Industrial Sensor Node | Smart Thermostat Controller |
|---|---|
|
Use Scenario: Battery-powered temperature/humidity/pressure node transmitting data via UART-to-LoRaWAN gateway every 15 minutes. IC Role / Device Role / Timing Role: Main system controller executing sensor acquisition, RTC-based scheduling, low-power state management, and UART framing. Use Value: 0.60 μA STOP current with RTC enables 7+ year CR2032 battery life; 10-bit ADC and internal temp sensor eliminate external signal conditioning. |
Use Scenario: Residential HVAC control unit managing fan speed, valve actuation, and display via I²C, with local UI and remote cloud reporting. IC Role / Device Role / Timing Role: Central real-time controller coordinating PWM outputs, touch-key interrupts, and dual UART (local RS-485 + cloud Wi-Fi bridge). Use Value: 3 UART channels support simultaneous local bus, debug port, and cloud module comms; 48 KB flash hosts full UI stack and OTA update handler. |
| Programmable Logic Relay | Energy Meter Front-End |
|
Use Scenario: DIN-rail mounted relay module accepting digital inputs, executing user-defined logic (AND/OR/timers), and driving 24 V DC outputs. IC Role / Device Role / Timing Role: Deterministic logic engine using ELC-triggered timer arrays and DTC-managed I/O state transfers. Use Value: ELC eliminates CPU polling of inputs; DTC handles I/O state mirroring with zero CPU cycles, achieving <100 μs response latency. |
Use Scenario: Electricity meter front-end acquiring voltage/current samples via ADC, computing RMS/kWh, and communicating via UART/IR. IC Role / Device Role / Timing Role: Precision measurement controller synchronizing ADC sampling to line cycle via timer-triggered conversion sequences. Use Value: 10-bit ADC with internal 1.45 V reference provides stable scaling across 1.6–5.5 V supply range; data flash stores calibration coefficients securely. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 16-bit microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F104BEAFP#V0 | 64 KB flash, 5.5 KB RAM, same 32-pin LQFP package and peripherals | Supports larger firmware (e.g., Modbus RTU stack + web server), but higher BOM cost | Select when future firmware expansion headroom or bootloader complexity requires >48 KB code space. |
| R5F104BDGFP#V0 | Same 48 KB flash/RAM, but G-grade (−40 to +105°C) and LQFP-0.65 mm pitch | Required for under-hood automotive or high-temp industrial enclosures; smaller pitch increases layout density | Choose only if ambient operating temperature exceeds +85°C or PCB space constraints demand finer-pitch LQFP. |
Compared with R5F104BEAFP#V0, the R5F104BDAFP#V0 trades flash capacity for lower unit cost and identical footprint compatibility; versus R5F104BDGFP#V0, it offers lower thermal qualification and relaxed assembly requirements while maintaining full functional equivalence in D-grade environments.
Availability
R5F104BDAFP#V0 is available at Aetrix Electronics and suitable for industrial sensor nodes, smart thermostat controllers, programmable logic relays, energy meter front-ends, and battery-powered IoT edge devices requiring stable component supply and long-term production continuity.
Supply support for R5F104BDAFP#V0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and enterprise applications.
The RL78/G14 product line delivers true low-power 16-bit MCUs optimized for cost-sensitive, battery-operated, and thermally constrained industrial control and sensing applications - balancing performance, integration, and energy efficiency.
FAQ
What is the maximum operating frequency and clock source flexibility of the R5F104BDAFP#V0?
The R5F104BDAFP#V0 operates up to 32 MHz using its high-speed on-chip oscillator, which supports selectable frequencies from 1 to 64 MHz with ±1.0% accuracy across 1.8–5.5 V and −20 to +85°C. It also integrates a 32.768 kHz subsystem clock for RTC and ultra-low-power modes. External crystals (X1/X2) or resonators may be used, but the on-chip oscillator eliminates BOM cost and board space in most applications. The R5F104BDAFP#V0 does not require external clock components for full functionality.
Does the R5F104BDAFP#V0 support in-system programming and secure firmware updates?
Yes, the R5F104BDAFP#V0 supports full in-system programming via its on-chip debug interface and UART bootloader. It includes boot swap functionality for atomic firmware updates and a flash shield window to protect critical sectors (e.g., bootloader or security keys) from accidental overwrite. Self-programming operates at VDD = 1.8–5.5 V, enabling field updates even from single-cell lithium batteries. The R5F104BDAFP#V0's flash library reserves RAM starting at FE900H for safe reprogramming operations.
How many serial communication interfaces does the R5F104BDAFP#V0 integrate, and are they LIN-capable?
The R5F104BDAFP#V0 integrates three UART channels, all compliant with LIN 2.2/SAE J2602 specifications - including break detection, sync field handling, and checksum generation. It also provides three CSI/SPI channels and four I²C/simplified I²C channels, with peripheral I/O redirection registers allowing flexible pin assignment. This enables concurrent communication with multiple sensors (I²C), displays (SPI), and vehicle/industrial buses (LIN UART) without external transceivers. All UARTs on the R5F104BDAFP#V0 support automatic baud rate detection and LIN slave mode.
What analog peripherals are included in the R5F104BDAFP#V0, and how are they calibrated?
The R5F104BDAFP#V0 includes a 10-bit successive approximation ADC with 20 input channels, an 8-bit DAC with two outputs, two comparators, an internal temperature sensor, and a 1.45 V internal reference voltage. ADC/DAC gain and offset are factory-trimmed and stored in ROM; no user calibration is required. The temperature sensor is calibrated to ±3°C accuracy across −40 to +85°C, and the 1.45 V reference maintains ±1.5% stability over voltage and temperature. These analog resources are fully accessible in STOP mode, enabling wake-on-threshold events in the R5F104BDAFP#V0.
Is the R5F104BDAFP#V0 pin-compatible with other RL78/G14 variants in the same package?
Yes, all RL78/G14 devices in the 32-pin LQFP-0.8 mm pitch package (e.g., R5F104AAFP#V0 through R5F104BGFP#V0) share identical pinouts and electrical characteristics - only flash/RAM sizes and grade markings differ. This allows drop-in replacement during design iteration or volume procurement (e.g., upgrading from 16 KB to 48 KB flash without PCB change). The R5F104BDAFP#V0 maintains full signal, power, and debug pin compatibility across this family subset, simplifying inventory management and design reuse.
R5F104BDAFP#V0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 32-LQFP
- Series:
- RL78/G14
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- RL78
- Core Size:
- 16-Bit
- Speed:
- 32MHz
- Connectivity:
- CSI, I2C, LINbus, UART/USART
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 22
- Program Memory Size:
- 48KB (48K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 4K x 8
- RAM Size:
- 5.5K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.6V ~ 5.5V
- Data Converters:
- A/D 8x8/10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F104BDAFP#V0 FAQ
1.How can I place an order for R5F104BDAFP#V0 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F104BDAFP#V0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F104BDAFP#V0 reliable?
The price and inventory of R5F104BDAFP#V0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F104BDAFP#V0 is usually 5 days.
3.What payment methods are accepted for R5F104BDAFP#V0?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F104BDAFP#V0 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F104BDAFP#V0?
R5F104BDAFP#V0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F104BDAFP#V0 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F104BDAFP#V0?
For technical support, including R5F104BDAFP#V0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F104BDAFP#V0 requirements.
6.How does Aetrix verify that R5F104BDAFP#V0 is sourced from the original manufacturer or authorized distributors?
All R5F104BDAFP#V0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F104BDAFP#V0 meets industry standards.
7.What is the process for return or replacement of R5F104BDAFP#V0?
All R5F104BDAFP#V0 units undergo pre-shipment inspection (PSI). If there is an issue with R5F104BDAFP#V0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F104BDAFP#V0 part is unused and in its original packaging.
Return procedure for R5F104BDAFP#V0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F104BDAFP#V0 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

