Renesas R5F104BEAFP#10
- Part No.:
- R5F104BEAFP#10
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 32-LQFP
- Datasheet:
-
R5F104BEAFP#10.pdf
- Description:
- IC MCU 16BIT 64KB FLASH 32LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:2,000
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Product details
Overview
R5F104BEAFP#10 from Renesas is a 32-bit RL78/G14 microcontroller featuring 48 KB flash memory, 5.5 KB RAM, and 44-pin LQFP-0.8 mm package. It delivers 44 DMIPS at 32 MHz, operates from 1.6–5.5 V, achieves 66 μA/MHz active current, and supports -40°C to +85°C industrial temperature range. It targets low-power embedded control in motor drives, sensor nodes, and appliance main control units.
For engineers reviewing the R5F104BEAFP#10 datasheet, R5F104BEAFP#10 pinout, R5F104BEAFP#10 application, or R5F104BEAFP#10 equivalent, key selection criteria include its 44-pin LQFP-0.8 mm footprint, integrated 10-bit 16-channel ADC, dual UART/LIN support, RTC with calendar function, and hardware DTC/ELC for deterministic peripheral event handling without CPU intervention.
Technical Context
The R5F104BEAFP#10 implements the RL78 CPU core with 3-stage pipeline CISC architecture, supporting instruction execution times from 0.03125 µs (32 MHz) to 30.5 µs (32.768 kHz). It integrates a Data Transfer Controller (DTC) with chain transfer capability and an Event Link Controller (ELC) enabling direct peripheral-to-peripheral signal routing across up to 26 event sources.
Its analog subsystem includes a 10-bit A/D converter with 16 input channels, internal 1.45 V reference, and temperature sensor; plus an 8-bit D/A converter with real-time output. Power management features HALT, STOP, and SNOOZE modes, with 0.60 μA RTC+LVD retention current.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | RL78 32-bit CISC CPU with 3-stage pipeline and multiply/divide instructions |
| Max Clock Speed | 32 MHz - delivers 44 DMIPS for real-time control loop execution |
| Flash Memory | 48 KB - sufficient for complex firmware with bootloader and OTA update space |
| RAM | 5.5 KB - supports multiple task stacks and data buffers in RTOS environments |
| A/D Converter | 10-bit, 16-channel - enables simultaneous monitoring of sensors, power rails, and thermistors |
| Operating Voltage | 1.6–5.5 V - allows direct interface with 1.8 V, 3.3 V, and 5 V peripherals without level shifters |
| Temp Range | -40°C to +85°C - qualified for industrial-grade operation in harsh ambient conditions |
Pinout & Package
Package: 44-pin LQFP (10 × 10 mm, 0.8 mm pitch), lead-free, RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P00 | TxD1 / TI00 / TRGCLKA | Primary UART transmit; timer input; trigger clock source for analog capture |
| P01 | RxD1 / TO00 / TRGCLKB | Primary UART receive; timer output; secondary trigger clock for synchronized sampling |
| P10–P17 | CSI/UART/I²C/SIO multiplexed I/O | Configurable serial interfaces supporting LIN bus, SPI-like CSI, and I²C master/slave |
| P20–P27 | ANI0–ANI7 / AVREFP / AVREFM | Eight dedicated analog inputs with differential reference pins for precision measurement |
| P30–P31 | INTP3 / RTC1HZ / TI03 / TO03 | Real-time clock interrupt output and general-purpose timer I/O for PWM generation |
| P60–P62 | SCLA0 / SDAA0 / SSI00 | I²C bus interface and synchronous serial interface for external EEPROM or sensor hub |
| P120–P124 | VCOUT0 / X1 / X2 / XT1 / XT2 | Crystal oscillator connections and voltage-controlled oscillator output for clock redundancy |
| RESET / REGC / VDD / VSS | Power and reset control | On-chip POR/LVD; REGC capacitor stabilizes internal regulator for low-noise analog operation |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low power modes | HALT (0.60 μA), STOP (0.60 μA), and SNOOZE (retains RAM/RTC while CPU sleeps) enable battery life extension in portable devices |
| Data Transfer Controller (DTC) | Offloads CPU during memory transfers; supports block, repeat, and chain transfer for sensor data logging without interrupt overhead |
| Event Link Controller (ELC) | Direct hardware linking of 26 peripheral events (e.g., ADC end-of-conversion → DMA trigger → UART TX start) eliminates software latency |
| Integrated RTC with calendar | 99-year calendar, alarm, and clock correction functions reduce need for external timekeeping ICs in metering and logging applications |
| Hardware security functions | Flash block erase prohibition and boot swapping prevent unauthorized firmware modification and support secure boot implementation |
Applications
| Motor Control | Smart Sensor Node |
|---|---|
Use Scenario: Brushless DC motor commutation in HVAC blowers and industrial fans. IC Role / Device Role / Timing Role: Main controller executing FOC algorithms, generating 3-phase PWM via TAU timers, and managing current sensing via 10-bit ADC. Use Value: 44 DMIPS compute headroom ensures sub-100 µs control loop timing; SNOOZE mode reduces idle power during stand-by periods. | Use Scenario: Battery-powered environmental monitor measuring temperature, humidity, and CO₂ over LoRaWAN. IC Role / Device Role / Timing Role: System-on-chip host managing sensor I²C reads, ADC sampling, RTC timestamping, and LoRa transceiver UART communication. Use Value: 0.60 μA STOP mode extends 10-year battery life; integrated RTC eliminates external crystal and saves PCB area. |
| Home Appliance MCU | Industrial PLC I/O Module |
Use Scenario: Main control unit in washing machines handling user interface, motor control, and water valve actuation. IC Role / Device Role / Timing Role: Central MCU coordinating UI buttons/LEDs (via PCLBUZ0/1), motor drivers (PWM), and safety monitoring (LVD + RTC watchdog). Use Value: Dual UART with LIN support enables communication with display and inverter modules; 48 KB flash accommodates multi-language UI and diagnostics. | Use Scenario: Digital input/output expansion module for DIN-rail mounted PLCs. IC Role / Device Role / Timing Role: Isolated I/O processor handling opto-coupled inputs, relay drive outputs, and Modbus RTU over RS-485. Use Value: Hardware ELC links external interrupt edges directly to DTC transfers, enabling <1 ms response to field device state changes without CPU polling. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F104CEAFP#10 | 64 KB flash, 5.5 KB RAM, same 44-pin LQFP-0.8 mm package and peripheral set | Supports larger firmware images (e.g., with embedded web server or advanced encryption) | Select when future firmware growth or security libraries require >48 KB code space |
| R5F104BEAFB#10 | Identical flash/RAM/peripherals; differs only in 48-pin LFQFP-0.5 mm package (smaller footprint, finer pitch) | Requires PCB redesign due to different pin count, pitch, and thermal pad layout | Select only when board space constraints necessitate 48-pin LFQFP and re-layout is feasible |
Compared with R5F104CEAFP#10, the R5F104BEAFP#10 trades 16 KB flash capacity for identical cost and power profile; compared with R5F104BEAFB#10, it retains legacy LQFP-0.8 mm compatibility but occupies more PCB area-making it optimal for incremental upgrades in existing 44-pin designs.
Availability
R5F104BEAFP#10 is available at Aetrix Electronics and suitable for industrial motor control, smart sensor nodes, home appliance main control units, and PLC I/O modules requiring stable component supply across long production lifecycles.
Supply support for R5F104BEAFP#10 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The RL78/G14 product line delivers true low-power performance (66 μA/MHz) with rich analog integration and event-driven peripherals, targeting cost-sensitive industrial and consumer control applications demanding long battery life and high reliability.
FAQ
What is the maximum operating frequency and corresponding DMIPS rating for the R5F104BEAFP#10?
The R5F104BEAFP#10 operates at a maximum frequency of 32 MHz and delivers 44 DMIPS (Dhrystone MIPS) performance. This benchmark reflects its real-world computational throughput for embedded control tasks, validated under typical operating conditions (VDD = 3.3 V, TA = 25°C). The RL78 core's 3-stage pipeline and optimized instruction set enable deterministic execution critical for motor control and real-time sensor processing in the R5F104BEAFP#10.
Does the R5F104BEAFP#10 support LIN bus communication, and how is it implemented?
Yes, the R5F104BEAFP#10 supports LIN bus communication through its UART peripherals, which include LIN-specific features such as automatic sync-break detection, checksum calculation, and slave node response timing control. UART channels (e.g., UART2 on P13/P14) can be configured in LIN mode per the RL78/G14 hardware manual. This native LIN capability eliminates external transceivers in simple slave-node applications and is fully supported in Renesas' e² studio middleware stack for the R5F104BEAFP#10.
What are the memory resources allocated to the R5F104BEAFP#10, and how is data flash used?
The R5F104BEAFP#10 integrates 48 KB of code flash memory and 4 KB of data flash memory, with 5.5 KB of on-chip RAM. Data flash is organized in 1 KB blocks and supports background operation (BGO), allowing program execution from code flash while rewriting data flash-enabling nonvolatile parameter storage (e.g., calibration values, device IDs) without halting application logic. The R5F104BEAFP#10's data flash endurance is rated at 1,000,000 write cycles at VDD = 1.8–5.5 V.
How does the R5F104BEAFP#10 achieve ultra-low power consumption in STOP mode?
The R5F104BEAFP#10 achieves 0.60 μA typical current in STOP mode by retaining only the real-time clock (RTC) and low-voltage detector (LVD) circuits while disabling the CPU, flash, RAM, and all peripherals except those explicitly enabled for wake-up (e.g., INT0–INT7, RTC alarm). This state preserves calendar time and system safety monitoring while minimizing leakage. The R5F104BEAFP#10's on-chip regulator and optimized process technology ensure this specification holds across the full -40°C to +85°C industrial temperature range.
Is the R5F104BEAFP#10 pin-compatible with other RL78/G14 variants in the same 44-pin LQFP package?
Yes, all RL78/G14 devices in the 44-pin LQFP-0.8 mm package-including R5F104BEAFP#10, R5F104CEAFP#10, and R5F104FEAFP#10-share identical pinouts, electrical characteristics, and mechanical dimensions. This allows direct substitution within the same package family for memory or peripheral scaling (e.g., upgrading from 48 KB to 64 KB flash) without PCB redesign. The R5F104BEAFP#10's pin mapping is fully documented in Section 1.3.5 of the R01DS0053EJ0370 datasheet.
R5F104BEAFP#10 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 32-LQFP
- Series:
- RL78/G14
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- RL78
- Core Size:
- 16-Bit
- Speed:
- 32MHz
- Connectivity:
- CSI, I2C, LINbus, UART/USART
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 22
- Program Memory Size:
- 64KB (64K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 4K x 8
- RAM Size:
- 5.5K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.6V ~ 5.5V
- Data Converters:
- A/D 8x8/10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F104BEAFP#10 FAQ
1.How can I place an order for R5F104BEAFP#10 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F104BEAFP#10 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F104BEAFP#10 reliable?
The price and inventory of R5F104BEAFP#10 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F104BEAFP#10 is usually 5 days.
3.What payment methods are accepted for R5F104BEAFP#10?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F104BEAFP#10 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F104BEAFP#10?
R5F104BEAFP#10 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F104BEAFP#10 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F104BEAFP#10?
For technical support, including R5F104BEAFP#10 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F104BEAFP#10 requirements.
6.How does Aetrix verify that R5F104BEAFP#10 is sourced from the original manufacturer or authorized distributors?
All R5F104BEAFP#10 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F104BEAFP#10 meets industry standards.
7.What is the process for return or replacement of R5F104BEAFP#10?
All R5F104BEAFP#10 units undergo pre-shipment inspection (PSI). If there is an issue with R5F104BEAFP#10, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F104BEAFP#10 part is unused and in its original packaging.
Return procedure for R5F104BEAFP#10:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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