Renesas R5F104BFANA#U0
- Part No.:
- R5F104BFANA#U0
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 32-WFQFN Exposed Pad
- Datasheet:
-
R5F104BFANA#U0.pdf
- Description:
- IC MCU 16BIT 96KB FLASH 32HWQFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,134
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F104BFANA#U0 from Renesas Electronics is a 32-pin HWQFN-packaged 16-bit RL78/G14 microcontroller with 64 KB flash, 5.5 KB RAM, and 4 KB data flash, operating from 1.6–5.5 V at -40°C to +85°C (A-grade), delivering 44 DMIPS at 32 MHz for low-power industrial control and sensor interface applications.
For engineers reviewing the R5F104BFANA#U0 datasheet, R5F104BFANA#U0 pinout, R5F104BFANA#U0 application, or R5F104BFANA#U0 equivalent, key selection criteria include its 64 KB code flash size, 32-pin 5×5 mm HWQFN-0.5 mm pitch package, integrated 10-bit ADC (20-channel), dual UART/SPI/I²C interfaces, and ultra-low power HALT/STOP/SNOOZE modes supporting battery-backed RTC operation.
Technical Context
The R5F104BFANA#U0 implements the RL78 CPU core with 3-stage pipeline CISC architecture, supporting instruction execution times from 0.03125 μs (32 MHz) to 30.5 μs (32.768 kHz), and includes multiply/divide/accumulate instructions within a 1 MB address space. It integrates a high-accuracy ±1.0% on-chip oscillator (selectable from 1–64 MHz) and dedicated low-speed oscillator for watchdog timing.
Peripheral integration includes an Event Link Controller (ELC) enabling 19–26 event signal routing to peripherals, Data Transfer Controller (DTC) with chain transfer capability, and real-time background operation for data flash rewriting (1M write cycles, 1.8–5.5 V). The device supports BCD correction, on-chip LVD (14-level selectable), and POR for robust system initialization.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | RL78 16-bit CISC with 3-stage pipeline, 1 MB address space, 44 DMIPS @ 32 MHz |
| Memory | 64 KB code flash (1 KB block), 4 KB data flash (1M rewrite cycles), 5.5 KB RAM |
| Operating Voltage | 1.6–5.5 V - enables direct interface with 1.8/2.5/3.3 V logic and single-supply battery operation |
| Power Modes | HALT (66 μA/MHz), STOP (0.60 μA w/ RTC+LVD), SNOOZE - extends battery life in intermittent sensing |
| Analog Peripherals | 10-bit ADC (20 channels, internal 1.45 V ref, temp sensor), 8-bit DAC (2 ch, 0–VDD output) |
| Serial Interfaces | 3 UART/LIN, 3–8 CSI (SPI-compatible), 4–10 I²C - supports multi-sensor communication topologies |
| Timers & Clock | 8–12 × 16-bit timers (TAU/TIMER RJ/RD/RG), RTC (calendar, alarm, correction), 12-bit interval timer |
| Package & Pins | HWQFN-32, 5×5 mm, 0.5 mm pitch, 26 I/O (including N-ch open-drain, pull-up, TTL buffer) |
Pinout & Package
Package: HWQFN-32, 5×5 mm body, 0.5 mm pitch, exposed die pad (recommended to connect to VSS).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P00 | TxD1 / TI00 / TRGCLKA | Primary UART transmit, timer input, and debug clock source for trace synchronization |
| P01 | RxD1 / TO00 / TRGCLKB | Primary UART receive, timer output, and secondary debug clock for cross-triggering |
| P10–P17 | CSI1/SPI1, UART2, I²C2, TRDIOx, IVREF/IVCMP | Multi-function serial and analog comparator interface pins with flexible peripheral redirection |
| P20–P27 | ANI0–ANI7 / AVREFP/AVREFM / ANO0/ANO1 | 8-channel analog input with differential reference support and 2-channel analog output |
| P30–P31 | INTP3/RTC1HZ/SCK00, INTP4/TI03/TO03/PCLBUZ0 | Dedicated RTC interrupt output and buzzer-capable timer outputs for audible feedback |
| P50–P51 | SI00/RxD0/SDA00/TRGIOA, SO00/TxD0/TOOLTxD/TRGIOB | Primary debug UART channel with tool interface (TOOLRxD/TOOLTxD) and I²C compatibility |
| P60–P62 | SCLA0/SDAA0/SSI00 | I²C master/slave and synchronous serial interface for EEPROM and sensor communication |
| P120–P122, P124 | VCOUT0/VCOUT1, X1/X2/EXCLK, XT1/XT2/EXCLKS | Crystal oscillator inputs (32.768 kHz & MHz range), external clock support, and voltage-controlled oscillator outputs |
| RESET, REGC, VDD, VSS | Reset input, regulator capacitor, supply, ground | Hardware reset with brown-out detection; REGC requires 0.47–1 μF capacitor to VSS for stable LDO operation |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low power STOP mode | 0.60 μA with RTC + LVD active - enables >10-year coin-cell battery life in metering applications |
| Self-programming flash | Boot swap and flash shield window functions enable secure firmware updates without external programmer |
| Background data flash rewrite | BGO allows full CPU execution from code flash while updating 4 KB data flash - no runtime interruption |
| Peripheral I/O redirection | PIOR0/PIOR1 registers remap up to 16 peripheral functions to alternate pins - simplifies PCB layout reuse |
| Real-time clock with calendar | 99-year calendar, alarm, and auto-correction - eliminates need for external RTC IC in time-stamped logging |
| Dual voltage interface | N-ch open-drain I/O supports 6 V tolerance and level-shifting to 1.8/2.5/3 V systems - reduces external level translators |
Applications
| Smart Energy Metering | Industrial Sensor Node |
|---|---|
Use Scenario: Electricity/water/gas meter with tamper detection, pulse counting, and wireless reporting. IC Role / Device Role / Timing Role: Main controller executing metrology algorithms, managing SPI-connected ADCs, and driving RF transceivers via UART. Use Value: 64 KB flash stores complex tariff logic and firmware updates; STOP mode extends battery life to 15+ years with RTC timestamping. | Use Scenario: Wireless temperature/humidity/pressure node in factory automation or predictive maintenance. IC Role / Device Role / Timing Role: Sensor hub aggregating data from I²C/ADC peripherals, performing local filtering, and transmitting via UART-to-LoRa module. Use Value: Integrated 10-bit ADC (20 ch) and BGO data flash allow continuous sensor logging while preserving firmware integrity during OTA updates. |
| Home Appliance Control | Medical Diagnostic Device |
Use Scenario: Washing machine/microwave with motor control, user interface, and safety monitoring. IC Role / Device Role / Timing Role: Real-time motor timing (TAU PWM), touch-key scanning (KR0–KR7), buzzer feedback (PCLBUZ0/1), and fault detection (LVD/INTP). Use Value: On-chip LVD (14-level) and POR ensure safe shutdown during brown-out; SNOOZE mode reduces idle power by 90% vs. active run. | Use Scenario: Portable blood glucose monitor or ECG front-end with display and data storage. IC Role / Device Role / Timing Role: Analog signal conditioning (ADC + internal ref), LCD segment driving (PCLBUZ), and secure data logging to data flash. Use Value: Internal 1.45 V reference and temperature sensor enable calibration-free glucose measurement; 4 KB data flash stores 1000+ test records with CRC protection. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F104BEANA#U0 | 48 KB flash, 5.5 KB RAM, same 32-pin HWQFN package and peripheral set | Lower memory footprint suits simpler control tasks without OTA update or extensive logging | Select when application code size remains under 40 KB and data retention requirements are minimal |
| R5F104BGANA#U0 | 96 KB flash, 12 KB RAM, identical package and pinout, higher memory density | Supports larger RTOS deployments, encrypted firmware, and extended data buffering | Choose for designs requiring future firmware expansion, BLE stack integration, or dual-bank secure boot |
Compared with R5F104BEANA#U0 and R5F104BGANA#U0, the R5F104BFANA#U0 provides optimal balance of code space (64 KB), data flash (4 KB), and ultra-low power (0.60 μA STOP) for mid-complexity embedded control where memory headroom and battery longevity are both critical.
Availability
R5F104BFANA#U0 is available at Aetrix Electronics and suitable for smart metering, industrial sensor nodes, home appliance control, portable medical devices, and battery-powered IoT edge nodes requiring stable component supply across long production lifecycles.
Supply support for R5F104BFANA#U0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and enterprise markets.
The RL78/G14 product line delivers true low-power performance (66 μA/MHz, 0.60 μA STOP) with rich analog and communication peripherals, targeting cost-sensitive, battery-operated, and safety-aware embedded applications in industrial automation and consumer electronics.
FAQ
What is the maximum operating frequency and corresponding power consumption of the R5F104BFANA#U0?
The R5F104BFANA#U0 operates at up to 32 MHz with a typical current draw of 66 μA per MHz in HALT mode. At full 32 MHz active operation, total supply current is approximately 2.1 mA (VDD = 3.3 V, TA = 25°C), while STOP mode consumes only 0.60 μA with RTC and LVD enabled - verified in Renesas R01DS0053EJ0340 datasheet Section 1.1.
Does the R5F104BFANA#U0 support in-system programming and secure firmware updates?
Yes, the R5F104BFANA#U0 supports full in-system programming via on-chip debug interface and includes boot swap functionality plus flash shield window protection. These features enable authenticated, atomic firmware updates without external programmers - critical for field-deployed R5F104BFANA#U0-based devices requiring remote maintenance.
How many analog input channels and what ADC resolution does the R5F104BFANA#U0 provide?
The R5F104BFANA#U0 integrates a 10-bit successive-approximation ADC with up to 20 analog input channels (ANI0–ANI19), including dedicated VCOUT0/VCOUT1 outputs and internal references (1.45 V, temperature sensor). This configuration is confirmed in Table 1-1 and Section 1.1 "A/D Converter" of the R5F104BFANA#U0 datasheet R01DS0053EJ0340.
What serial communication interfaces are available on the R5F104BFANA#U0 and how are they mapped?
The R5F104BFANA#U0 provides three UART/LIN channels, three to eight CSI (SPI-compatible) channels, and four to ten I²C channels. Pin mapping is flexible via Peripheral I/O Redirection Registers (PIOR0/PIOR1); for example, P10–P12 support CSI1/SPI1, while P60–P61 implement SCLA0/SDAA0 for I²C0 - details are specified in Section 1.3.2 pinout diagram and Table 1-1 of R01DS0053EJ0340.
Is the R5F104BFANA#U0 pin-compatible with other RL78/G14 variants in the same package?
Yes, all RL78/G14 devices in the 32-pin HWQFN-0.5 mm pitch package (e.g., R5F104BEANA#U0, R5F104BGANA#U0) share identical pinout and electrical characteristics. Memory size and peripheral enablement differ by part number, but PCB layout and signal routing remain fully reusable - confirmed by consistent pin function tables across R01DS0053EJ0340 Sections 1.3.2 and 1.6.
R5F104BFANA#U0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 32-WFQFN Exposed Pad
- Series:
- RL78/G14
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- RL78
- Core Size:
- 16-Bit
- Speed:
- 32MHz
- Connectivity:
- CSI, I2C, LINbus, UART/USART
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 22
- Program Memory Size:
- 96KB (96K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 12K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.6V ~ 5.5V
- Data Converters:
- A/D 8x8/10b; D/A 2x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F104BFANA#U0 FAQ
1.How can I place an order for R5F104BFANA#U0 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F104BFANA#U0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F104BFANA#U0 reliable?
The price and inventory of R5F104BFANA#U0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F104BFANA#U0 is usually 5 days.
3.What payment methods are accepted for R5F104BFANA#U0?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F104BFANA#U0 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F104BFANA#U0?
R5F104BFANA#U0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F104BFANA#U0 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F104BFANA#U0?
For technical support, including R5F104BFANA#U0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F104BFANA#U0 requirements.
6.How does Aetrix verify that R5F104BFANA#U0 is sourced from the original manufacturer or authorized distributors?
All R5F104BFANA#U0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F104BFANA#U0 meets industry standards.
7.What is the process for return or replacement of R5F104BFANA#U0?
All R5F104BFANA#U0 units undergo pre-shipment inspection (PSI). If there is an issue with R5F104BFANA#U0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F104BFANA#U0 part is unused and in its original packaging.
Return procedure for R5F104BFANA#U0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F104BFANA#U0 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

