Renesas R5F104BGDFP#V0
- Part No.:
- R5F104BGDFP#V0
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 32-LQFP
- Datasheet:
-
R5F104BGDFP#V0.pdf
- Description:
- IC MCU 16BIT 128KB FLASH 32LQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
R5F104BGDFP#V0 from Renesas Electronics is a 32-bit RL78/G14 microcontroller with 96 KB flash, 12 KB RAM, and 48-pin LFQFP (0.5 mm pitch) package, operating at 1.6–5.5 V and delivering 44 DMIPS at 32 MHz. It integrates 10-bit ADC (16 channels), dual UART/LIN, I²C, CSI, 16-bit timers, RTC, and ultra-low-power modes (0.60 μA in STOP with RTC+LVD), targeting battery-powered industrial sensor nodes and smart metering interfaces.
For engineers reviewing the R5F104BGDFP#V0 datasheet, R5F104BGDFP#V0 pinout, R5F104BGDFP#V0 application, or R5F104BGDFP#V0 equivalent, key selection criteria include its industrial-grade temperature range (−40°C to +85°C), integrated data flash (8 KB), hardware event linking (ELC), and background operation for data flash rewriting-critical for firmware-over-the-air (FOTA) and real-time calibration in field-deployed devices.
Technical Context
The R5F104BGDFP#V0 implements the RL78 CPU core with 3-stage pipeline CISC architecture, supporting instruction execution times from 0.03125 μs (32 MHz high-speed mode) to 30.5 μs (32.768 kHz ultra-low-speed mode). Its on-chip peripherals include Timer Array Unit (TAU) with 8 channels, Real-time Clock with calendar and alarm, and Data Transfer Controller (DTC) enabling interrupt-triggered memory transfers without CPU intervention.
Power management includes HALT, STOP, and SNOOZE modes, with voltage detector (LVD) offering 14 selectable reset/interrupt thresholds and POR circuitry. The Event Link Controller (ELC) supports configurable routing of 19–26 event sources-including timer overflows, ADC completions, and communication interrupts-to peripheral functions, enabling deterministic low-latency response without software polling.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | RL78 32-bit CISC CPU with 3-stage pipeline and multiply/accumulate instructions |
| Max Operating Frequency | 32 MHz (44 DMIPS), with high-accuracy on-chip oscillator ±1.0% over −20°C to +85°C |
| Memory | 96 KB code flash (1 KB blocks), 8 KB data flash (1M rewrite cycles), 12 KB RAM |
| ADC | 10-bit resolution, 16 analog input channels, internal 1.45 V reference and temperature sensor |
| Timers | 8× 16-bit TAU channels, 1× 12-bit interval timer, 1× RTC (calendar, alarm, correction) |
| Communication | 3× UART/LIN, 4× I²C/simplified I²C, 3× CSI (SPI-compatible), all with hardware flow control |
| Low-Power Modes | STOP mode draws 0.60 μA (RTC + LVD active); HALT mode consumes 66 μA/MHz during active operation |
Pinout & Package
Package: 48-pin LFQFP, 7 mm × 7 mm, 0.5 mm pitch, lead-free, RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P121/X1 | Crystal input | Connects to external 32.768 kHz crystal for RTC accuracy; requires load capacitance matching |
| P122/X2/EXCLK | Crystal output / external clock input | Drives crystal resonator or accepts external clock source up to 20 MHz for system timing |
| REGC | Regulator capacitor connection | Must be tied to VSS via 0.47–1 μF capacitor to stabilize internal voltage regulator |
| RESET | Active-low reset input | Asynchronous reset pin with internal pull-up; accepts external debounced reset signal or power-on reset |
| P50/INTP1/SI00/RxD0 | UART0 receive / SPI0 input / interrupt | Multi-function pin supporting full-duplex UART, master/slave SPI, or external interrupt trigger |
| P14/RxD2/SI20/SDA20 | UART2 receive / SPI2 input / I²C data | Shared interface pin enabling flexible peripheral assignment via PIOR register configuration |
Key Features
| Feature | Design Value |
|---|---|
| Self-programming with boot swap | Enables safe firmware updates by swapping active/inactive flash banks without runtime interruption |
| Background operation (BGO) | Allows CPU to execute code from flash while simultaneously rewriting data flash-no stall required |
| Event Link Controller (ELC) | Hardware-based peripheral triggering eliminates ISR latency and CPU overhead for time-critical events |
| On-chip voltage detector (LVD) | 14-level programmable threshold supports graceful shutdown or brown-out recovery in battery systems |
| Dual comparator with window mode | Supports voltage monitoring across two thresholds (e.g., overvoltage/undervoltage detection) with single interrupt |
Applications
| Smart Energy Meter Interface | Industrial Sensor Node |
|---|---|
Use Scenario: Communicates with metrology ICs and displays via UART/I²C while logging tamper events and energy data to data flash. IC Role / Device Role / Timing Role: Central controller managing serial protocols, RTC-stamped data logging, and secure flash writes using BGO. Use Value: 8 KB data flash enables 10+ years of hourly energy logs; STOP mode current (0.60 μA) extends battery life in non-metrology standby states. |
Use Scenario: Reads temperature, humidity, and gas sensors, processes data locally, and transmits alerts via UART-to-LoRa module. IC Role / Device Role / Timing Role: Low-power host MCU coordinating ADC sampling, DTC-assisted memory moves, and ELC-triggered wake-up on threshold breach. Use Value: 10-bit ADC with internal reference eliminates external precision references; HALT mode reduces average current to 66 μA/MHz during active sensing. |
| Home Appliance Control Panel | Programmable Logic Controller (PLC) I/O Module |
Use Scenario: Drives LED backlight, reads capacitive touch keys, and manages motor speed via PWM outputs in HVAC or washing machine UI. IC Role / Device Role / Timing Role: Real-time peripheral orchestrator using TAU PWM, PCLBUZ tone generation, and key-interrupt scanning. Use Value: On-chip buzzer controller and 16-bit timers eliminate external tone generators; 48-pin LFQFP provides ample GPIO for button/LED/motor driver interfacing. |
Use Scenario: Interfaces with discrete I/O cards via RS-485 (LIN-capable UART), monitors status LEDs, and executes ladder logic in local safety-critical loops. IC Role / Device Role / Timing Role: Deterministic I/O processor leveraging ELC for sub-10 μs response to input changes and UART auto-baud detection. Use Value: LIN support enables direct integration into automotive-grade PLC backplanes; −40°C to +85°C rating ensures reliability in factory-floor environments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F104CGDFP#V0 | 128 KB flash, 16 KB RAM, same 48-pin LFQFP package and peripheral set | Supports larger firmware images and extended data buffers for protocol stacks (e.g., Modbus TCP offload) | Select when future firmware growth or additional data logging capacity is anticipated |
| R5F104BGAFP#V0 | Same 96 KB/12 KB memory, but 32-pin LQFP (7×7 mm, 0.8 mm pitch) package with reduced I/O count (26 pins) | Suitable for space-constrained designs where fewer analog inputs or serial interfaces are needed | Choose for cost-sensitive, compact control modules with simplified peripheral requirements |
Compared with R5F104CGDFP#V0, the R5F104BGDFP#V0 trades flash headroom for identical I/O and peripheral access in the same footprint; versus R5F104BGAFP#V0, it delivers 22 additional GPIO and full peripheral complement at the cost of larger board area-making it optimal for industrial edge nodes requiring both scalability and interface richness.
Availability
R5F104BGDFP#V0 is available at Aetrix Electronics and suitable for smart metering, industrial sensor nodes, and home appliance control panels requiring stable component supply, long-term lifecycle support, and guaranteed traceability for ISO 9001-certified production.
Supply support for R5F104BGDFP#V0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The RL78/G14 product line delivers true low-power performance (66 μA/MHz, 0.60 μA STOP) with rich analog and communication peripherals, designed specifically for cost-sensitive, battery-operated industrial and consumer control applications.
FAQ
What is the maximum operating frequency and associated performance of the R5F104BGDFP#V0?
The R5F104BGDFP#V0 operates at up to 32 MHz with an RL78 CPU core delivering 44 DMIPS. Its high-accuracy on-chip oscillator maintains ±1.0% tolerance across −20°C to +85°C and 1.8–5.5 V supply, eliminating need for external crystals in many timing-critical applications. This performance level supports real-time control loops, protocol stack processing, and sensor fusion algorithms within the R5F104BGDFP#V0's power envelope.
Does the R5F104BGDFP#V0 support in-system programming and secure firmware updates?
Yes, the R5F104BGDFP#V0 supports self-programming with boot swap functionality and flash shield window protection. It allows safe firmware updates by maintaining separate active/inactive code banks and restricting erase/write access to designated flash regions. The R5F104BGDFP#V0 also includes on-chip debug capability compliant with IEEE 1149.1 (JTAG) for development and field diagnostics.
How does the R5F104BGDFP#V0 manage ultra-low-power operation in battery-powered applications?
The R5F104BGDFP#V0 achieves 0.60 μA in STOP mode with RTC and LVD active, and 66 μA/MHz in HALT mode. Its power management includes multiple low-power states, programmable LVD thresholds (14 levels), and automatic peripheral clock gating. These features enable multi-year battery life in applications like wireless sensor nodes-where the R5F104BGDFP#V0 remains in STOP mode between periodic RTC wake-ups for sensor reading and transmission.
What analog and mixed-signal peripherals are integrated into the R5F104BGDFP#V0?
The R5F104BGDFP#V0 integrates a 10-bit ADC with 16 input channels, internal 1.45 V reference voltage, and on-die temperature sensor; an 8-bit DAC with up to two output channels; and two comparators with window mode. It also includes a real-time clock with calendar, alarm, and clock correction functions. These peripherals allow the R5F104BGDFP#V0 to perform sensor signal acquisition, calibration, and local decision-making without external components.
Can the R5F104BGDFP#V0 interface directly with industrial communication buses such as LIN or RS-485?
Yes, the R5F104BGDFP#V0 includes three UART channels with built-in LIN bus support (break detection, sync byte handling, checksum generation), making it suitable for automotive and industrial sub-networks. When paired with a standard RS-485 transceiver (e.g., SN65HVD72), the R5F104BGDFP#V0 can implement robust half-duplex differential communication for PLC I/O modules or building automation controllers.
R5F104BGDFP#V0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 32-LQFP
- Series:
- RL78/G14
- Packaging:
- Tray
- Product Status:
- Discontinued at Digi-Key
- Programmable:
- Not Verified
- Core Processor:
- RL78
- Core Size:
- 16-Bit
- Speed:
- 32MHz
- Connectivity:
- CSI, I2C, LINbus, UART/USART
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 22
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 16K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.6V ~ 5.5V
- Data Converters:
- A/D 8x8/10b; D/A 2x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F104BGDFP#V0 FAQ
1.How can I place an order for R5F104BGDFP#V0 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F104BGDFP#V0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F104BGDFP#V0 reliable?
The price and inventory of R5F104BGDFP#V0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F104BGDFP#V0 is usually 5 days.
3.What payment methods are accepted for R5F104BGDFP#V0?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F104BGDFP#V0 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F104BGDFP#V0?
R5F104BGDFP#V0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F104BGDFP#V0 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F104BGDFP#V0?
For technical support, including R5F104BGDFP#V0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F104BGDFP#V0 requirements.
6.How does Aetrix verify that R5F104BGDFP#V0 is sourced from the original manufacturer or authorized distributors?
All R5F104BGDFP#V0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F104BGDFP#V0 meets industry standards.
7.What is the process for return or replacement of R5F104BGDFP#V0?
All R5F104BGDFP#V0 units undergo pre-shipment inspection (PSI). If there is an issue with R5F104BGDFP#V0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F104BGDFP#V0 part is unused and in its original packaging.
Return procedure for R5F104BGDFP#V0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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