Renesas R5F104CEALA#U0
- Part No.:
- R5F104CEALA#U0
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 36-WFLGA
- Datasheet:
-
R5F104CEALA#U0.pdf
- Description:
- IC MCU 16BIT 64KB FLASH 36WFLGA
- Quantity:
- Payment:

- Shipping:

Inventory:3,248
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F104CEALA#U0 from Renesas is a 36-pin WFLGA-packaged RL78/G14 16-bit microcontroller with 48 KB flash, 5.5 KB RAM, and 8-channel 10-bit ADC, operating from 1.6–5.5 V at -40°C to +105°C (industrial G-grade), used in battery-powered industrial sensors and low-power HMI control units.
For engineers reviewing the R5F104CEALA#U0 datasheet, R5F104CEALA#U0 pinout, R5F104CEALA#U0 application, or R5F104CEALA#U0 equivalent, key selection criteria include its 36-pin WFLGA (4 × 4 mm) footprint, 48 KB code flash with data flash shield window, ultra-low 66 μA/MHz active current, and integrated RTC with calendar/alarm functions for time-critical embedded control.
Technical Context
The R5F104CEALA#U0 implements the RL78 CPU core with 3-stage pipeline, supporting instruction execution times from 0.03125 µs (@32 MHz) to 30.5 µs (@32.768 kHz), and includes multiply/divide/accumulate instructions within a 1 MB address space. It integrates a Data Transfer Controller (DTC) with chain transfer and an Event Link Controller (ELC) enabling 19–26 peripheral event linkings without CPU intervention.
It features dual clock domains: high-speed on-chip oscillator (selectable from 1–64 MHz, ±1.0% accuracy) and subsystem clock (32.768 kHz), enabling simultaneous operation of RTC, LVD, and low-power modes. The MCU supports background operation (BGO) during data flash rewriting and self-programming with boot swapping.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | RL78 16-bit CISC with 3-stage pipeline, 44 DMIPS @32 MHz |
| Flash / Data Flash | 48 KB code flash (1 KB blocks), 4 KB data flash with 1M rewrite cycles |
| RAM | 5.5 KB on-chip SRAM, including dedicated flash library area at FE900H |
| ADC | 10-bit resolution, 8 analog input channels, internal 1.45 V reference & temp sensor |
| Low-Power Modes | HALT (0.60 μA), STOP (0.60 μA w/ RTC+LVD), SNOOZE (fast wake-up from sleep) |
| Operating Voltage / Temp | 1.6–5.5 V supply; -40°C to +105°C (G-grade industrial) |
| Package | 36-pin WFLGA, 4 × 4 mm, 0.5 mm pitch, exposed pad recommended |
Pinout & Package
36-pin WFLGA (4 × 4 mm, 0.5 mm pitch) with exposed die pad recommended to be connected to VSS. Pin functions support flexible peripheral I/O redirection via PIOR0/PIOR1 registers.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P00 / P01 | TxD1/RxD1, TI00/TO00 | Full-duplex UART channel 1 with timer capture/compare capability |
| P10–P17 | SPI/I²C/UART peripherals (CSI11, SDA11, SO20, etc.) | Multi-function serial interface pins configurable per peripheral I/O redirection |
| P20–P27 | ANI0–ANI7, AVREFP/AVREFM | 8-channel 10-bit ADC inputs with differential reference support |
| P30 / P31 | INTP3/RTC1HZ, TI03/TO03/PCLBUZ0 | Real-time clock output (1 Hz), timer I/O, and buzzer drive capability |
| P60–P62 | SCLA0/SDAA0/SSI00 | I²C master/slave interface + synchronous serial interface for sensor comms |
| P120–P122, P124 | VCOUT0/X1/X2/XT2 | Crystal oscillator connections (32.768 kHz RTC + 4–20 MHz main crystal) |
| RESET / REGC / VDD / VSS | Reset input, regulator capacitor, power rails | REGC requires 0.47–1 µF capacitor to VSS; VDD/VSS decoupling critical for low-noise ADC |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low power HALT/STOP modes | 0.60 μA retention with RTC + LVD active - enables >10-year battery life in metering |
| Data flash BGO | Execute code from flash while rewriting data flash - no interrupt latency penalty |
| Peripheral event linking (ELC) | Hardware-triggered peripheral chaining (e.g., ADC end → DMA → GPIO toggle) without CPU |
| On-chip debug & flash shield | SWD interface + flash block erase/write protection - secure firmware updates |
| Multi-voltage I/O | Interface compatibility with 1.8 V / 2.5 V / 3.3 V peripherals - simplifies mixed-voltage designs |
Applications
| Industrial Sensor Node | Smart Thermostat Control |
|---|---|
Use Scenario: Battery-powered temperature/humidity sensor with wireless reporting every 5 minutes. IC Role / Device Role / Timing Role: Main controller executing sensor acquisition, RTC-based wake scheduling, and low-power UART-to-SoC communication. Use Value: 0.60 μA STOP mode with RTC extends CR2032 battery life beyond 5 years; 10-bit ADC with internal reference eliminates external voltage reference IC. |
Use Scenario: Residential HVAC controller with LCD, keypad, and relay drivers. IC Role / Device Role / Timing Role: System-on-chip managing user interface, environmental sensing, and precise 1-second timekeeping for scheduling. Use Value: Integrated RTC with calendar/alarm and buzzer output (P31) eliminates external real-time clock and audio driver; 36-pin WFLGA fits compact front-panel PCBs. |
| Portable Medical Monitor | PLC I/O Module |
Use Scenario: Handheld pulse oximeter with OLED display and USB charging. IC Role / Device Role / Timing Role: Signal acquisition hub processing analog front-end, driving display, and managing charge-state monitoring. Use Value: 8-channel ADC supports simultaneous SpO₂/HR/temperature sampling; 1.6 V minimum VDD enables operation down to single-cell Li-ion voltage sag. |
Use Scenario: DIN-rail mounted digital input module with opto-isolated 24 V DC inputs. IC Role / Device Role / Timing Role: Isolation interface manager handling debounce, status reporting, and watchdog supervision. Use Value: ELC-linked timer/ADC/interrupt logic enables deterministic <10 ms response to input transitions; G-grade temp range ensures reliability in cabinet environments up to +105°C. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 16-bit microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F104BEALA#U0 | 32 KB flash, 5.5 KB RAM, same 36-pin WFLGA package and peripheral set | Lower memory capacity suits simpler control tasks without data logging | Select when firmware size ≤30 KB and no data flash retention required |
| R5F104EEALA#U0 | 64 KB flash, 5.5 KB RAM, identical package and G-grade temp rating | Higher code density supports bootloader + application partitioning | Choose for field-upgradable firmware requiring dual-bank flash layout |
Compared with R5F104BEALA#U0 and R5F104EEALA#U0, the R5F104CEALA#U0 delivers optimal balance of code space (48 KB), data flash (4 KB), and industrial temperature margin - making it ideal for mid-complexity edge nodes where memory headroom and long-term reliability are both critical.
Availability
R5F104CEALA#U0 is available at Aetrix Electronics and suitable for industrial sensor nodes, smart building controllers, and portable medical devices requiring stable component supply across extended temperature ranges and multi-year production cycles.
Supply support for R5F104CEALA#U0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The RL78/G14 product line delivers true low-power performance (66 μA/MHz) with rich analog integration and robust industrial qualification - designed specifically for cost-sensitive, battery-operated, and thermally demanding embedded control applications.
FAQ
What is the maximum operating frequency and core performance of the R5F104CEALA#U0?
The R5F104CEALA#U0 operates at up to 32 MHz using its high-speed on-chip oscillator, delivering 44 DMIPS. Its RL78 CPU core uses a 3-stage pipeline and supports instruction execution times ranging from 0.03125 µs (at 32 MHz) to 30.5 µs (at 32.768 kHz), enabling adaptive performance scaling for power-constrained applications. This makes the R5F104CEALA#U0 well-suited for real-time control tasks without sacrificing energy efficiency.
Does the R5F104CEALA#U0 support in-system programming and secure firmware updates?
Yes, the R5F104CEALA#U0 supports full in-system programming via SWD interface and includes flash shield window functionality to prohibit unauthorized block erasure or rewriting. It also enables self-programming with boot swapping - allowing safe firmware updates by maintaining a validated backup image. These capabilities ensure secure, field-upgradable operation for the R5F104CEALA#U0 in deployed industrial equipment.
What are the analog capabilities of the R5F104CEALA#U0, and how are they applied in sensor interfaces?
The R5F104CEALA#U0 integrates an 8-channel, 10-bit ADC with internal 1.45 V reference voltage and on-chip temperature sensor - eliminating need for external references in most sensor signal chains. It supports differential input (AVREFP/AVREFM) and programmable sampling timing, enabling accurate acquisition from resistive, capacitive, or thermistor-based sensors. These features directly benefit the R5F104CEALA#U0's use in precision environmental monitoring systems.
How does the R5F104CEALA#U0 achieve ultra-low power consumption in real-world applications?
The R5F104CEALA#U0 achieves 0.60 μA in STOP mode with RTC and LVD active, and 66 μA/MHz in active mode - verified across -40°C to +105°C. Its SNOOZE mode allows peripheral operation (e.g., ADC conversion, UART receive) while CPU sleeps, reducing average current in duty-cycled applications. Combined with configurable clock gating and voltage scaling, this enables multi-year battery life in the R5F104CEALA#U0 for remote sensing deployments.
Is the R5F104CEALA#U0 pin-compatible with other RL78/G14 variants in the same package?
Yes, all RL78/G14 devices in the 36-pin WFLGA package - including R5F104BEALA#U0, R5F104CEALA#U0, and R5F104EEALA#U0 - share identical pinouts and electrical characteristics. Firmware and PCB layouts are interchangeable across these variants, enabling scalable memory selection without hardware redesign. This pin compatibility simplifies version management and inventory optimization for the R5F104CEALA#U0 in production programs.
R5F104CEALA#U0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 36-WFLGA
- Series:
- RL78/G14
- Packaging:
- Tray
- Product Status:
- Discontinued at Digi-Key
- Programmable:
- Not Verified
- Core Processor:
- RL78
- Core Size:
- 16-Bit
- Speed:
- 32MHz
- Connectivity:
- CSI, I2C, LINbus, UART/USART
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 26
- Program Memory Size:
- 64KB (64K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 4K x 8
- RAM Size:
- 5.5K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.6V ~ 5.5V
- Data Converters:
- A/D 8x8/10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F104CEALA#U0 FAQ
1.How can I place an order for R5F104CEALA#U0 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F104CEALA#U0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F104CEALA#U0 reliable?
The price and inventory of R5F104CEALA#U0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F104CEALA#U0 is usually 5 days.
3.What payment methods are accepted for R5F104CEALA#U0?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F104CEALA#U0 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F104CEALA#U0?
R5F104CEALA#U0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F104CEALA#U0 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F104CEALA#U0?
For technical support, including R5F104CEALA#U0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F104CEALA#U0 requirements.
6.How does Aetrix verify that R5F104CEALA#U0 is sourced from the original manufacturer or authorized distributors?
All R5F104CEALA#U0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F104CEALA#U0 meets industry standards.
7.What is the process for return or replacement of R5F104CEALA#U0?
All R5F104CEALA#U0 units undergo pre-shipment inspection (PSI). If there is an issue with R5F104CEALA#U0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F104CEALA#U0 part is unused and in its original packaging.
Return procedure for R5F104CEALA#U0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F104CEALA#U0 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

