Renesas R5F104FGAFP#30
- Part No.:
- R5F104FGAFP#30
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 44-LQFP
- Datasheet:
-
R5F104FGAFP#30.pdf
- Description:
- IC MCU 16BIT 128KB FLASH 44LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:164
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F104FGAFP#30 from Renesas is a 44-pin LQFP-packaged RL78/G14 16-bit MCU with 96 KB flash, 12 KB RAM, and 8 KB data flash, operating from 1.6–5.5 V at -40 to +85°C (industrial grade D). It delivers 44 DMIPS at 32 MHz, features ultra-low power consumption (66 μA/MHz active, 0.60 μA RTC+LVD), and integrates UART, I²C, SPI, 16-bit timers, 10-bit ADC (20 ch), and real-time clock.
For engineers reviewing the R5F104FGAFP#30 datasheet, R5F104FGAFP#30 pinout, R5F104FGAFP#30 application, or R5F104FGAFP#30 equivalent, this page provides verified technical context, package mapping, functional pin roles, low-power design trade-offs, and industrial-grade timing/peripheral compatibility for embedded control selection.
Technical Context
The R5F104FGAFP#30 implements the RL78 CPU core with 3-stage pipeline CISC architecture, supporting instruction execution times from 0.03125 µs (32 MHz high-speed mode) to 30.5 µs (32.768 kHz ultra-low-speed mode), plus multiply/divide/accumulate instructions and 1 MB address space. It uses on-chip high-accuracy ±1.0% oscillator (selectable 1–64 MHz) and supports HALT/STOP/SNOOZE low-power modes.
Peripheral integration includes Event Link Controller (ELC) for 19–26 event signal routing, Data Transfer Controller (DTC) with chain transfer, background operation (BGO) for data flash rewriting, and dual-voltage interface capability (1.8/2.5/3 V logic compatibility). The device supports LIN-bus via UART and includes on-chip BCD correction and key interrupt functions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | RL78 16-bit CISC with 3-stage pipeline, 44 DMIPS @ 32 MHz |
| Flash Memory | 96 KB code flash (1 KB block size), with security lock and self-programming |
| Data Flash | 8 KB with 1,000,000 write cycles and background operation (BGO) |
| RAM | 12 KB on-chip SRAM, including dedicated areas for flash library use |
| Power Supply | 1.6–5.5 V single supply; 66 μA/MHz active current; 0.60 μA in RTC+LVD-only mode |
| ADC | 10-bit resolution, 20-channel input, internal 1.45 V reference and temperature sensor |
| Timers | 12× 16-bit timer channels (TAU/Timer RJ/RD/RG), 1× 12-bit interval timer, 1× RTC with calendar/alarm |
| Serial Interfaces | 3× UART/LIN, 4–10× I²C/simplified I²C, 3–8× CSI (SPI-compatible), all configurable via ELC |
Pinout & Package
Package: 44-pin LQFP (10 × 10 mm, 0.8 mm pitch), industrial-grade (D), RoHS-compliant, with exposed pad not present (LQFP variant).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P10/SCK11/SCL11/TRDIOD1 | SPI/I²C/UART peripheral multiplexing | Configurable as master clock (SCK11), I²C clock (SCL11), or TRDIO data line - enables shared bus resource allocation |
| P14/RxD2/SI20/SDA20/TRDIOD0/(SCLA0) | Multi-function serial input | Supports UART receive, SPI input, I²C data, or alternate SCL - selected via PIOR register for flexible peripheral routing |
| P16/TI01/TO01/INTP5/TRDIOC0/IVREF0/(RxD0) | Timer input/output with analog reference | Combines capture/compare, external interrupt, TRDIO control, and internal voltage reference output - reduces external component count |
| P20/ANI0/AVREFP | Analog input / positive reference | Primary ADC channel 0 input and selectable AVREFP source - allows ratiometric measurement against stable internal reference |
| P30/INTP3/RTC1HZ/SCK00/SCL00/TRJO0 | Real-time clock output / serial clock | Provides 1 Hz RTC tick or SPI/I²C clock signal - eliminates need for external timing crystal in timekeeping applications |
| REGC | Regulator bypass capacitor terminal | Requires 0.47–1 µF capacitor to VSS for internal voltage regulator stability - critical for low-noise analog performance |
| RESET | Active-low reset input | Accepts external reset assertion or internal POR/LVD detection - ensures deterministic startup under brownout conditions |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low power HALT/STOP/SNOOZE modes | Enables battery-powered operation >10 years with RTC + LVD active at 0.60 μA |
| On-chip high-accuracy oscillator (±1.0%) | Eliminates external crystal for cost-sensitive industrial controls without sacrificing timing precision |
| Background operation (BGO) for data flash | Permits concurrent program execution and nonvolatile parameter updates - no system interruption during field calibration |
| Event Link Controller (ELC) | Routes 19–26 peripheral events without CPU intervention - reduces ISR latency and firmware overhead in real-time systems |
| Dual-voltage I/O interface | Direct connection to 1.8 V, 2.5 V, or 3 V logic without level shifters - simplifies mixed-voltage board design |
| Integrated LIN-capable UART | Meets ISO 17987-4 physical layer requirements for automotive body electronics - validated for LIN 2.2A compliance |
Applications
| Industrial Motor Control | Smart Energy Metering |
|---|---|
|
Use Scenario: Brushless DC motor commutation with current sensing and thermal monitoring in HVAC blowers. IC Role / Device Role / Timing Role: Main controller executing FOC algorithm, sampling 10-bit ADC at 100 kSPS, generating PWM via TAU timers with <1 µs jitter. Use Value: 96 KB flash accommodates motor control library + safety diagnostics; 0.60 μA STOP mode extends battery backup runtime during power loss. |
Use Scenario: Residential electricity meter with metrology IC interface, tamper detection, and LCD display. IC Role / Device Role / Timing Role: System manager handling SPI communication with metrology ASIC, RTC-based billing intervals, and segmented LCD drive. Use Value: Integrated 10-bit ADC measures auxiliary voltages; 8 KB data flash stores tariff tables and event logs with 1M-cycle endurance. |
| Home Appliance UI Controller | Building Automation Sensor Node |
|
Use Scenario: Touchless control panel for washing machine with capacitive touch, buzzer feedback, and LED indicators. IC Role / Device Role / Timing Role: Dedicated UI processor managing PCLBUZ timers, GPIO-driven LEDs, and key interrupt scanning with debounce. Use Value: On-chip key interrupt and buzzer output controller reduce BOM; 44-pin LQFP fits compact front-panel PCB layouts. |
Use Scenario: Wireless temperature/humidity node with I²C sensor, UART debug port, and low-power sleep scheduling. IC Role / Device Role / Timing Role: Edge intelligence hub performing local sensor fusion, RTC-triggered wake-up, and UART-to-RF bridge. Use Value: 66 μA/MHz efficiency extends coin-cell life; dual-voltage I/O interfaces directly with 3 V sensors without regulators. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F104GGAFP#30 | 128 KB flash, 16 KB RAM, same 44-pin LQFP package and peripheral set | Required for larger firmware images or extended data logging buffers | Select when future firmware growth or additional safety certification data storage is anticipated |
| R5F104FEAFP#30 | 48 KB flash, 5.5 KB RAM, identical package and core architecture | Suitable for cost-optimized designs with minimal peripheral usage and smaller code footprint | Choose for high-volume consumer appliances where flash headroom and RAM overhead are unnecessary |
Compared with R5F104GGAFP#30, the R5F104FGAFP#30 offers balanced memory (96 KB/12 KB) for mid-tier industrial firmware with real-time constraints, while R5F104FEAFP#30 trades memory capacity for lower unit cost in simpler control loops - all share identical pinout, timing, and peripheral configuration.
Availability
R5F104FGAFP#30 is available at Aetrix Electronics and suitable for industrial motor control, smart energy metering, home appliance UI, and building automation sensor nodes requiring stable component supply across extended product lifecycles.
Supply support for R5F104FGAFP#30 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for industrial, automotive, and IoT markets.
The RL78/G14 family targets cost-sensitive, ultra-low-power general-purpose embedded control - optimized for industrial automation, home appliances, and metering applications demanding robustness, long-term supply, and integrated analog peripherals.
FAQ
What is the maximum operating frequency and corresponding DMIPS rating for the R5F104FGAFP#30?
The R5F104FGAFP#30 operates up to 32 MHz with an on-chip high-speed oscillator, delivering 44 DMIPS performance. This is measured using the EEMBC CoreMark benchmark and reflects sustained throughput under typical industrial workloads with peripheral activity and interrupt servicing.
Does the R5F104FGAFP#30 support LIN bus communication, and which peripheral implements it?
Yes, the R5F104FGAFP#30 supports LIN bus communication through its UART channels - specifically UART2 (pins P13/P14) and UART0 (pins P50/P51), both configurable for LIN 2.2A protocol with break detection and sync field handling per ISO 17987-4.
What are the flash memory organization and security features of the R5F104FGAFP#30?
The R5F104FGAFP#30 contains 96 KB of code flash organized in 1 KB blocks, with hardware-level security enabling block erase/write prohibition. It supports on-chip debug lock, flash shield window for protected boot code, and self-programming with boot swapping - all verified in Renesas' Flash Self-Programming Library R20UT2944.
How does the R5F104FGAFP#30 achieve ultra-low power consumption in STOP mode?
The R5F104FGAFP#30 achieves 0.60 μA STOP mode current by retaining only the real-time clock (RTC) and low-voltage detector (LVD) circuits while powering down the CPU, flash, RAM, and all peripherals. This state is entered via software command and exited by RTC alarm or external interrupt - validated across -40 to +85°C.
Which analog peripherals are integrated into the R5F104FGAFP#30, and what are their key specifications?
The R5F104FGAFP#30 integrates a 10-bit ADC with 20 input channels, internal 1.45 V reference, and on-die temperature sensor; an 8-bit DAC with two output channels (0–VDD range); and up to two comparators with selectable internal/external reference. All operate across the full 1.6–5.5 V supply range.
R5F104FGAFP#30 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 44-LQFP
- Series:
- RL78/G14
- Packaging:
- Tray
- Product Status:
- Last Time Buy
- Programmable:
- Not Verified
- Core Processor:
- RL78
- Core Size:
- 16-Bit
- Speed:
- 32MHz
- Connectivity:
- CSI, I2C, LINbus, UART/USART
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 31
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 16K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.6V ~ 5.5V
- Data Converters:
- A/D 10x8/10b; D/A 2x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F104FGAFP#30 FAQ
1.How can I place an order for R5F104FGAFP#30 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F104FGAFP#30 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F104FGAFP#30 reliable?
The price and inventory of R5F104FGAFP#30 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F104FGAFP#30 is usually 5 days.
3.What payment methods are accepted for R5F104FGAFP#30?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F104FGAFP#30 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F104FGAFP#30?
R5F104FGAFP#30 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F104FGAFP#30 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F104FGAFP#30?
For technical support, including R5F104FGAFP#30 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F104FGAFP#30 requirements.
6.How does Aetrix verify that R5F104FGAFP#30 is sourced from the original manufacturer or authorized distributors?
All R5F104FGAFP#30 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F104FGAFP#30 meets industry standards.
7.What is the process for return or replacement of R5F104FGAFP#30?
All R5F104FGAFP#30 units undergo pre-shipment inspection (PSI). If there is an issue with R5F104FGAFP#30, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F104FGAFP#30 part is unused and in its original packaging.
Return procedure for R5F104FGAFP#30:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F104FGAFP#30 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

