Renesas R5F104FHAFP#30
- Part No.:
- R5F104FHAFP#30
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 44-LQFP
- Datasheet:
-
R5F104FHAFP#30.pdf
- Description:
- IC MCU 16BIT 192KB FLASH 44LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:800
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F104FHAFP#30 from Renesas is a 44-pin LQFP, 128 KB flash, 16 KB RAM RL78/G14 16-bit microcontroller with ultra-low power operation (66 μA/MHz), 1.6–5.5 V supply, and integrated 10-bit ADC (20 channels), UART (4 ch), I²C (10 ch), and RTC. It targets battery-powered industrial sensors and smart metering interfaces requiring long runtime and mixed-signal integration.
For engineers reviewing the R5F104FHAFP#30 datasheet, R5F104FHAFP#30 pinout, R5F104FHAFP#30 application, or R5F104FHAFP#30 equivalent, key selection criteria include its 44-pin LQFP-0.8 mm pitch package, -40°C to +85°C industrial temperature grade (D suffix implied by #30 tray packaging), 128 KB code flash with 8 KB data flash, and support for background data flash rewriting during program execution.
Technical Context
The R5F104FHAFP#30 implements the RL78 CPU core with 3-stage pipeline CISC architecture, supporting instruction execution times from 0.03125 µs (32 MHz) to 30.5 µs (32.768 kHz). It integrates a Data Transfer Controller (DTC) for autonomous memory transfers triggered by 19–26 peripheral event sources via the Event Link Controller (ELC).
Its analog subsystem includes a 10-bit A/D converter with internal 1.45 V reference and temperature sensor, dual 8-bit D/A outputs (0–VDD range), and up to two comparators with selectable internal/external reference. Power management supports HALT, STOP, and SNOOZE modes, achieving 0.60 μA in RTC+LVD-only operation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | RL78 16-bit CISC with 3-stage pipeline; enables deterministic real-time control at 32 MHz (0.03125 µs min instr.) |
| Flash Memory | 128 KB code flash + 8 KB data flash; supports self-programming with boot swap and flash shield window |
| RAM | 16 KB on-chip RAM; includes dedicated areas for flash library use (start address FE900H) |
| Supply Voltage | 1.6 V to 5.5 V; allows direct interface with 1.8/2.5/3.0 V logic without level shifters |
| ADC | 10-bit resolution, 20-channel input, internal 1.45 V reference, and integrated temperature sensor |
| Low-Power Modes | HALT (66 μA/MHz), STOP (0.60 μA with RTC+LVD active); extends battery life in intermittent sensing |
| Operating Temperature | -40°C to +85°C (industrial grade D); validated for stable operation across extended thermal cycles |
Pinout & Package
Package: 44-pin plastic LQFP (10 × 10 mm, 0.8 mm pitch), RoHS-compliant, tray-packaged (#30 specification).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P00 | TxD1 / TI00 / TRGCLKA | Primary UART transmit; timer input; debug clock input - enables serial comms and timing-critical trigger sync |
| P01 | RxD1 / TO00 / TRGCLKB | Primary UART receive; timer output; debug clock output - supports full-duplex comms and trace clocking |
| P10–P15 | SPI/I²C/UART peripherals | Multi-function serial interface pins (SCK11, SI11, SO11, SDA20, SCL20, etc.) - configurable for 3–8 CSI, 3–4 UART, or 4–10 I²C channels |
| P16/P17 | INTP5/INTP4 / TI01/TI02 / TO01/TO02 | Dual 16-bit timer inputs/outputs with interrupt capability - supports PWM generation, pulse counting, and edge-triggered capture |
| P20–P27 | ANI0–ANI7 / AVREFP/AVREFM | 8-channel analog input bank with dedicated reference voltage pins - enables ratiometric measurements and noise-immune ADC operation |
| P30/P31 | RTC1HZ / INTP3 / TI03 / TO03 / PCLBUZ0 | Real-time clock output, external interrupt, timer I/O, and buzzer drive - integrates timekeeping, event detection, and audible feedback |
| P60/P61 | SCLA0 / SDAA0 | Dedicated I²C bus pins with internal pull-up support - simplifies connection to EEPROM, sensors, and PMICs |
| RESET / REGC / VDD / VSS | Power & reset control | On-chip POR/LVD with 14-level voltage detection; REGC requires 0.47–1 µF capacitor to VSS for regulator stability |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low power consumption | 66 μA/MHz active current and 0.60 μA in RTC+LVD-only mode enable >10-year battery life in wireless sensor nodes |
| Background data flash rewriting | BGO mode allows full program execution while updating 4–8 KB data flash - critical for field firmware updates without service interruption |
| Peripheral I/O redirection | PIOR0/PIOR1 registers enable dynamic remapping of UART/SPI/I²C functions to alternate pins - improves PCB layout flexibility and reuse |
| Integrated analog subsystem | 10-bit ADC (20 ch), dual 8-bit DACs, two comparators, and temperature sensor eliminate need for external signal-conditioning ICs |
| Event Link Controller (ELC) | Links 19–26 peripheral events directly to functions like timer triggers or DTC activation - reduces CPU overhead and latency |
Applications
| Smart Energy Metering | Industrial Sensor Node |
|---|---|
Use Scenario: Electricity/water/gas meter with tamper detection, pulse counting, and secure data logging. IC Role / Device Role / Timing Role: Main controller managing metrology ADC sampling, RTC-based billing intervals, and encrypted UART/RS-485 communication. Use Value: 128 KB flash stores encryption keys and firmware; 8 KB data flash retains lifetime consumption logs; low-power modes extend battery backup to 10+ years. | Use Scenario: Wireless temperature/humidity/pressure node in factory automation or HVAC monitoring. IC Role / Device Role / Timing Role: Signal acquisition hub interfacing analog sensors, driving RF transceiver sleep/wake cycles, and timestamping events via RTC. Use Value: Integrated 10-bit ADC and temperature sensor reduce BOM count; 0.60 μA STOP mode enables multi-year operation on coin-cell batteries. |
| Home Appliance Control | Programmable Logic Controller (PLC) I/O Module |
Use Scenario: Washing machine drum motor control, water valve sequencing, and user interface with LED/buzzer feedback. IC Role / Device Role / Timing Role: Real-time motion controller using PWM timers (TI01/TO01), buzzer driver (PCLBUZ0), and touch-key interrupt inputs (INTP0–INTP5). Use Value: Dual 8-bit DACs generate precise analog setpoints; SNOOZE mode minimizes idle power between wash cycles. | Use Scenario: DIN-rail mounted digital I/O expansion module with isolated inputs/outputs and Modbus RTU over RS-485. IC Role / Device Role / Timing Role: Protocol handler converting Modbus commands to GPIO/timer actions, with CRC calculation and UART framing. Use Value: 4 UART channels support simultaneous host comms and isolated fieldbus; ELC links UART RX events to DTC for zero-CPU-load packet buffering. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 16-bit microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F104GHAFP#30 | 128 KB flash, 16 KB RAM, identical pinout and peripheral set; differs only in factory-programmed security settings | Same functional scope; selected when specific flash lock configuration or production programming requirements apply | Drop-in replacement for designs requiring identical hardware but different security provisioning |
| R5F104JHAFP#30 | 192 KB flash, 20 KB RAM, same 44-pin LQFP package and peripheral complement; higher memory for larger protocol stacks | Preferred for Modbus TCP gateway or OTA update-capable devices needing >128 KB code space | Direct upgrade path when additional flash/RAM is required without PCB redesign |
Compared with R5F104FHAFP#30, R5F104GHAFP#30 offers identical performance with variant security configuration, while R5F104JHAFP#30 provides 64 KB more flash and 4 KB more RAM in the same footprint-enabling richer firmware features without layout changes.
Availability
R5F104FHAFP#30 is available at Aetrix Electronics and suitable for smart metering, industrial sensor nodes, home appliance control, and PLC I/O modules requiring stable component supply and long-term industrial-grade availability.
Supply support for R5F104FHAFP#30 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, and power solutions for automotive, industrial, and IoT markets.
The RL78/G14 product line delivers true low-power 16-bit MCUs optimized for cost-sensitive, battery-operated, and energy-efficient embedded systems requiring rich analog integration and robust real-time performance.
FAQ
What is the maximum operating frequency and corresponding instruction cycle time for the R5F104FHAFP#30?
The R5F104FHAFP#30 operates at up to 32 MHz using its high-speed on-chip oscillator. At this frequency, the minimum instruction execution time is 0.03125 µs. This timing is achieved with the high-speed oscillator enabled and applies to most instructions in the RL78 CISC instruction set, enabling deterministic real-time response in control loops and communication protocols.
Does the R5F104FHAFP#30 support in-system programming and secure firmware updates?
Yes, the R5F104FHAFP#30 supports in-system programming via its on-chip debug function and self-programming capability. It includes flash shield window protection and block erase prohibition to prevent unauthorized rewriting. Background operation (BGO) allows firmware updates to the 8 KB data flash while executing application code from main flash-enabling secure, seamless field upgrades without system downtime.
How many serial communication interfaces does the R5F104FHAFP#30 provide, and what protocols are supported?
The R5F104FHAFP#30 provides up to four UART channels (with LIN-bus support), up to ten I²C channels (including simplified I²C), and up to eight CSI (SPI-compatible) channels. These are implemented across shared pins with flexible peripheral I/O redirection (PIOR0/PIOR1), allowing designers to allocate serial resources dynamically based on board layout and system requirements.
What analog peripherals are integrated into the R5F104FHAFP#30, and how are they configured?
The R5F104FHAFP#30 integrates a 10-bit A/D converter with 20 input channels and internal 1.45 V reference, two 8-bit D/A converters (0–VDD output range), and up to two comparators with selectable internal/external reference. Configuration is performed via dedicated control registers (e.g., ADM0, ADM1, DACR, CMPnCR), and the ADC supports scan mode with automatic channel sequencing and interrupt-on-conversion.
Is the R5F104FHAFP#30 pin-compatible with other RL78/G14 variants in the same package size?
Yes, all RL78/G14 devices in the 44-pin LQFP-0.8 mm pitch package-including R5F104FHAFP#30, R5F104GHAFP#30, and R5F104JHAFP#30-share identical pinouts and electrical characteristics. This allows direct substitution within the same package family for memory scaling or security configuration changes without PCB modification.
R5F104FHAFP#30 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 44-LQFP
- Series:
- RL78/G14
- Packaging:
- Tray
- Product Status:
- Last Time Buy
- Programmable:
- Not Verified
- Core Processor:
- RL78
- Core Size:
- 16-Bit
- Speed:
- 32MHz
- Connectivity:
- CSI, I2C, LINbus, UART/USART
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 31
- Program Memory Size:
- 192KB (192K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 20K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.6V ~ 5.5V
- Data Converters:
- A/D 10x8/10b; D/A 2x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F104FHAFP#30 FAQ
1.How can I place an order for R5F104FHAFP#30 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F104FHAFP#30 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F104FHAFP#30 reliable?
The price and inventory of R5F104FHAFP#30 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F104FHAFP#30 is usually 5 days.
3.What payment methods are accepted for R5F104FHAFP#30?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F104FHAFP#30 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F104FHAFP#30?
R5F104FHAFP#30 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F104FHAFP#30 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F104FHAFP#30?
For technical support, including R5F104FHAFP#30 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F104FHAFP#30 requirements.
6.How does Aetrix verify that R5F104FHAFP#30 is sourced from the original manufacturer or authorized distributors?
All R5F104FHAFP#30 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F104FHAFP#30 meets industry standards.
7.What is the process for return or replacement of R5F104FHAFP#30?
All R5F104FHAFP#30 units undergo pre-shipment inspection (PSI). If there is an issue with R5F104FHAFP#30, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F104FHAFP#30 part is unused and in its original packaging.
Return procedure for R5F104FHAFP#30:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F104FHAFP#30 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

