Renesas R5F104GDGFB#V0
- Part No.:
- R5F104GDGFB#V0
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 48-LQFP
- Datasheet:
-
R5F104GDGFB#V0.pdf
- Description:
- IC MCU 16BIT 48KB FLASH 48LFQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
R5F104GDGFB#V0 from Renesas is a 48-pin LFQFP, 0.5 mm pitch, industrial-grade (−40°C to +105°C) RL78/G14 16-bit microcontroller with 96 KB flash, 12 KB RAM, and 8 KB data flash. It integrates a 32 MHz RL78 CPU core delivering 44 DMIPS, ultra-low-power operation (66 μA/MHz active, 0.60 μA RTC+LVD), and peripherals including 10-bit ADC (16 channels), UART/SCI/I²C interfaces, and real-time clock - deployed in battery-powered industrial sensors and motor control edge nodes.
For engineers reviewing the R5F104GDGFB#V0 datasheet, R5F104GDGFB#V0 pinout, R5F104GDGFB#V0 application, or R5F104GDGFB#V0 equivalent, key selection criteria include its G-grade temperature rating, LFQFP-48 package compatibility with high-density PCB layouts, integrated data flash for field firmware updates, and hardware event linking (ELC) for deterministic peripheral coordination without CPU overhead.
Technical Context
The R5F104GDGFB#V0 implements the RL78 CPU core with CISC architecture, 3-stage pipeline, and configurable instruction timing (0.03125 μs @ 32 MHz to 30.5 μs @ 32.768 kHz). It supports multiply/divide/accumulate instructions and features a 1 MB address space with four register banks.
Its power management includes HALT, STOP, and SNOOZE modes; on-chip LVD offers 14 selectable voltage detection levels with interrupt/reset options; and the Event Link Controller (ELC) enables direct peripheral-to-peripheral triggering across 19–26 signal types, reducing ISR latency and CPU load in time-critical control loops.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | RL78 16-bit CISC CPU with 3-stage pipeline and 44 DMIPS @ 32 MHz |
| Flash Memory | 96 KB code flash with 1 KB block size, self-programming, and boot swap support |
| Data Flash | 8 KB data flash with background operation (BGO) and 1M rewrite cycles (typ.) |
| RAM | 12 KB on-chip RAM, including dedicated areas for flash library execution |
| ADC | 10-bit resolution A/D converter with 16 analog inputs and internal 1.45 V reference |
| Operating Temp | −40°C to +105°C (G-grade industrial qualification) |
| Supply Voltage | 1.6 V to 5.5 V single-supply operation enabling direct interface with 1.8/2.5/3.3 V peripherals |
| Low-Power Modes | 0.60 μA RTC+LVD mode; 66 μA/MHz active current enables multi-year battery life in sensor nodes |
Pinout & Package
Package: 48-pin LFQFP (7 × 7 mm, 0.5 mm pitch), lead-free, RoHS-compliant, industrial-grade thermal profile (−40°C to +105°C).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P00 | TxD1 / TI00 / TRGCLKA | Primary UART transmit; timer input; debug clock input - supports asynchronous comms and precise timing capture |
| P01 | RxD1 / TO00 / TRGCLKB | Primary UART receive; timer output; debug clock output - enables full-duplex serial and synchronized debug trace |
| P10–P17 | SCI/SPI/I²C channels (SCK11, SI11, SO11, etc.) | Configurable serial interfaces with peripheral I/O redirection - allows flexible pin mapping for board layout optimization |
| P20–P27 | ANI0–ANI7 / AVREFP / AVREFM | 8-channel analog input with differential reference capability - supports precision sensor signal acquisition without external references |
| P30–P31 | INTP3 / RTC1HZ / TI03 / TO03 | Real-time clock output and timer I/O - delivers accurate 1 Hz timing signal and dual-edge capture for encoder or pulse counting |
| P50–P51 | RxD0 / TxD0 / TOOLRxD / TOOLTxD | On-chip debug UART interface - enables programming and real-time debugging without external USB-UART bridge |
| RESET | Active-low reset input | Asynchronous reset with internal pull-up; compatible with external reset supervisors and push-button recovery |
| VDD / VSS | Power supply / Ground | Single 1.6–5.5 V supply with REGC decoupling capacitor requirement - simplifies power design vs. dual-rail MCUs |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low-power operation | 0.60 μA in STOP mode with RTC + LVD active - extends battery life in wireless sensor transmitters beyond 5 years |
| Hardware Event Link Controller (ELC) | Direct peripheral triggering (e.g., ADC conversion start → DMA transfer) eliminates CPU polling and reduces jitter in closed-loop control |
| Background Data Flash Operation (BGO) | Execute code from flash while rewriting data flash - enables seamless over-the-air firmware updates without system interruption |
| On-chip debug with SWD interface | Full JTAG/SWD debug via P50/P51 pins - eliminates need for dedicated debug header, saving PCB area and BOM cost |
| Dual-voltage I/O capability | I/O pins tolerate 1.8/2.5/3.3 V logic levels - permits direct connection to legacy or low-voltage peripherals without level shifters |
| Integrated real-time clock (RTC) | Calendar function (99-year range), alarm, and clock correction - provides accurate timekeeping for data logging and scheduling without external RTC IC |
Applications
| Industrial Sensor Node | Smart Thermostat Controller |
|---|---|
|
Use Scenario: Battery-powered temperature/humidity/pressure sensor node transmitting data via LoRaWAN every 15 minutes. IC Role / Device Role / Timing Role: Main system controller managing sensor readout, data preprocessing, RTC-based wake-up scheduling, and low-power radio interface. Use Value: 0.60 μA STOP mode + RTC ensures >7-year battery life; integrated data flash stores calibration coefficients and OTA update staging area. |
Use Scenario: Residential HVAC controller with display, keypad, relay drivers, and Wi-Fi module communication. IC Role / Device Role / Timing Role: Central MCU handling UI responsiveness, PID loop execution at 100 ms intervals, and secure firmware updates. Use Value: ELC links ADC sampling to DMA → memory transfer → PID calculation, minimizing CPU load and ensuring deterministic loop timing. |
| Brushless DC Motor Driver | Energy Metering Module |
|
Use Scenario: 3-phase BLDC driver for small industrial pumps with hall-effect commutation and fault protection. IC Role / Device Role / Timing Role: Real-time motor control unit generating PWM outputs, reading hall sensors, and executing overcurrent shutdown within 1 μs. Use Value: Timer Array Unit (TAU) provides synchronized 3-channel complementary PWM with dead-time insertion; LVD detects brown-out before MOSFET gate drive failure. |
Use Scenario: DIN-rail mounted electricity meter measuring voltage/current harmonics and storing billing data hourly. IC Role / Device Role / Timing Role: Data acquisition and secure storage engine interfacing with metrology ADC and EEPROM replacement. Use Value: 10-bit ADC with internal reference enables ±0.5% measurement accuracy; 8 KB data flash retains 30 days of tamper-proof energy logs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 16-bit microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F104GGGFB#V0 | 128 KB flash, 16 KB RAM, same package and peripheral set | Supports larger firmware images and more complex protocol stacks (e.g., Modbus TCP + TLS) | Select when future firmware growth or additional security libraries require >96 KB code space |
| R5F104GHGFB#V0 | 192 KB flash, 20 KB RAM, identical pinout and temperature grade | Enables integration of bootloader, application, and field-upgrade image in separate flash sections | Choose for robust OTA update architectures requiring atomic dual-bank flash partitioning |
Compared with R5F104GDGFB#V0, the R5F104GGGFB#V0 and R5F104GHGFB#V0 provide scalable flash/RAM headroom while preserving pin compatibility, ELC functionality, and ultra-low-power behavior - making them drop-in upgrades for designs anticipating firmware expansion or enhanced data logging.
Availability
R5F104GDGFB#V0 is available at Aetrix Electronics and suitable for industrial sensor nodes, smart thermostat controllers, and brushless DC motor drivers requiring stable component supply, long-term lifecycle assurance, and G-grade temperature compliance.
Supply support for R5F104GDGFB#V0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The RL78/G14 product line delivers true low-power 16-bit performance for cost-sensitive industrial and consumer applications, emphasizing energy efficiency, integrated peripherals, and simplified development with scalable memory options.
FAQ
What is the maximum operating frequency and corresponding DMIPS rating for the R5F104GDGFB#V0?
The R5F104GDGFB#V0 operates at up to 32 MHz with its on-chip high-speed oscillator, achieving 44 DMIPS performance. This is measured using the EEMBC CoreMark benchmark and reflects real-world throughput for control-oriented C code, not theoretical peak values. The RL78 core's 3-stage pipeline and optimized instruction set enable consistent execution across mixed workloads.
Does the R5F104GDGFB#V0 support hardware debugging, and which interface is used?
Yes, the R5F104GDGFB#V0 supports full hardware debugging via the SWD (Serial Wire Debug) interface using pins P50 (TOOLRxD) and P51 (TOOLTxD) in its 48-pin LFQFP package. No external debug probe is required beyond standard SWD-capable tools like Renesas E2 studio with E2 Lite emulator, enabling breakpoints, watchpoints, and real-time variable inspection during development.
How many analog input channels does the R5F104GDGFB#V0 support, and what is the ADC resolution?
The R5F104GDGFB#V0 integrates a 10-bit successive-approximation ADC with 16 analog input channels (ANI0–ANI15 mapped to P20–P27 and other ports). It supports both single-ended and differential measurements using internal AVREFP/AVREFM references, and includes a built-in 1.45 V reference and temperature sensor for calibration and environmental monitoring.
What low-power modes are available on the R5F104GDGFB#V0, and what is the lowest achievable current draw?
The R5F104GDGFB#V0 offers HALT, STOP, and SNOOZE modes. In STOP mode with only RTC and LVD active, it draws 0.60 μA (typ.) at VDD = 3.0 V and TA = 25°C. This enables multi-year operation in battery-powered applications. Wake-up sources include external interrupts, RTC alarm, and LVD threshold crossing - all configurable without CPU intervention.
Is the R5F104GDGFB#V0 pin-compatible with other RL78/G14 variants in the same package?
Yes, all RL78/G14 devices in the 48-pin LFQFP (FB) package - including R5F104GDGFB#V0, R5F104GGGFB#V0, and R5F104GHGFB#V0 - share identical pinouts, electrical characteristics, and peripheral mappings. Firmware and PCB designs are interchangeable across these variants, allowing memory-size scalability without layout changes or signal re-routing.
R5F104GDGFB#V0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 48-LQFP
- Series:
- RL78/G14
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- RL78
- Core Size:
- 16-Bit
- Speed:
- 32MHz
- Connectivity:
- CSI, I2C, LINbus, UART/USART
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 34
- Program Memory Size:
- 48KB (48K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 4K x 8
- RAM Size:
- 5.5K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.6V ~ 5.5V
- Data Converters:
- A/D 10x8/10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F104GDGFB#V0 FAQ
1.How can I place an order for R5F104GDGFB#V0 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F104GDGFB#V0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F104GDGFB#V0 reliable?
The price and inventory of R5F104GDGFB#V0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F104GDGFB#V0 is usually 5 days.
3.What payment methods are accepted for R5F104GDGFB#V0?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F104GDGFB#V0 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F104GDGFB#V0?
R5F104GDGFB#V0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F104GDGFB#V0 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F104GDGFB#V0?
For technical support, including R5F104GDGFB#V0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F104GDGFB#V0 requirements.
6.How does Aetrix verify that R5F104GDGFB#V0 is sourced from the original manufacturer or authorized distributors?
All R5F104GDGFB#V0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F104GDGFB#V0 meets industry standards.
7.What is the process for return or replacement of R5F104GDGFB#V0?
All R5F104GDGFB#V0 units undergo pre-shipment inspection (PSI). If there is an issue with R5F104GDGFB#V0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F104GDGFB#V0 part is unused and in its original packaging.
Return procedure for R5F104GDGFB#V0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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