Renesas R5F104GFAFB#V0
- Part No.:
- R5F104GFAFB#V0
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 48-LQFP
- Datasheet:
-
R5F104GFAFB#V0.pdf
- Description:
- IC MCU 16BIT 96KB FLASH 48LFQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
R5F104GFAFB#V0 from Renesas is a 48-pin LFQFP, 0.5 mm pitch, industrial-grade (G) 16-bit RL78/G14 microcontroller with 96 KB flash, 12 KB RAM, and 8 KB data flash. It operates from 1.6–5.5 V, delivers 44 DMIPS at 32 MHz, and supports ultra-low-power modes including 0.60 μA RTC+LVD operation - used in battery-powered industrial sensors and smart metering endpoints.
For engineers reviewing the R5F104GFAFB#V0 datasheet, R5F104GFAFB#V0 pinout, R5F104GFAFB#V0 application, or R5F104GFAFB#V0 equivalent, key selection criteria include its 48-pin LFQFP-0.5 mm package, integrated RTC with calendar/alarm, 10-bit 20-channel ADC, dual UART/LIN support, and hardware DTC/ELC for deterministic peripheral coordination in resource-constrained embedded control.
Technical Context
The R5F104GFAFB#V0 implements the RL78 CPU core with 3-stage pipeline CISC architecture, supporting instruction execution times from 0.03125 μs (32 MHz) to 30.5 μs (32.768 kHz), and includes multiply/divide/accumulate instructions. Its memory subsystem integrates 96 KB on-chip flash (1 KB block size), 12 KB RAM, and 8 KB data flash with background operation (BGO) and 1M-cycle rewrite endurance.
Peripheral integration includes Timer Array Unit (TAU) with 8 channels, 12-bit interval timer, real-time clock (99-year calendar, alarm, correction), watchdog timer, 10-bit 20-channel ADC with internal 1.45 V reference and temperature sensor, and dual UART/LIN interfaces - all coordinated via Event Link Controller (ELC) and Data Transfer Controller (DTC) to minimize CPU intervention.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | RL78 16-bit CISC CPU with 3-stage pipeline and 44 DMIPS @ 32 MHz |
| Flash / RAM / Data Flash | 96 KB code flash (1 KB erase blocks), 12 KB RAM, 8 KB data flash with BGO |
| Supply Voltage | 1.6–5.5 V - enables direct interface with 1.8/2.5/3.3 V peripherals without level shifters |
| Power Modes | HALT (66 μA/MHz), STOP (0.60 μA with RTC+LVD active), SNOOZE - extends battery life in intermittent-sensing applications |
| ADC | 10-bit resolution, 20 input channels, internal 1.45 V reference and integrated temperature sensor |
| Timers & Clock | TAU (8×16-bit), 12-bit interval timer, calendar RTC (alarm/correction), watchdog with dedicated low-speed oscillator |
| Serial Interfaces | 3× UART/LIN, 4× I²C/simplified I²C, 3–8× CSI (SPI-compatible), all configurable via ELC |
| Operating Temp | −40°C to +105°C (industrial G-grade) - qualified for extended-temperature industrial control environments |
Pinout & Package
Package: 48-pin LFQFP, 7 mm × 7 mm, 0.5 mm pitch, exposed pad not present (standard LFQFP).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P00 | TxD1 / TI00 / TRGCLKA | Primary UART1 transmit; timer input; trace clock A - supports debug and serial comms simultaneously |
| P01 | RxD1 / TO00 / TRGCLKB | Primary UART1 receive; timer output; trace clock B - enables full-duplex comms with timing capture |
| P10–P17 | CSI1/SPI1, UART2, I²C1, TRDIOx | Multiplexed serial interfaces with ELC-triggered DMA - offloads protocol handling from CPU |
| P20–P27 | ANI0–ANI7 / AVREFP / AVREFM / ANO0 / ANO1 | 8 analog inputs + 2 analog outputs + differential reference pins - supports precision sensor signal conditioning |
| P30–P31 | INTP3 / RTC1HZ / SCK00 / INTP4 / PCLBUZ0 | RTC interrupt output (1 Hz), SPI0 clock, external interrupt, buzzer drive - enables time-triggered wake-up and audio feedback |
| P50–P51 | RxD0 / TxD0 / TOOLRxD / TOOLTxD / TRGIOA / TRGIOB | On-chip debug UART (SWD/JTAG compatible) - allows in-system programming and real-time trace without extra hardware |
| P60–P62 | SCLA0 / SDAA0 / SSI00 | I²C master/slave address/data lines + synchronous serial interface - supports multi-protocol sensor hub design |
| P120–P124 | VCOUT0 / X1 / X2 / XT1 / XT2 | Crystal oscillator inputs (32.768 kHz RTC + 4–20 MHz main) - ensures accurate timekeeping and stable system clock |
| RESET / REGC / VDD / VSS | Reset input / regulator capacitor / power / ground | REGC requires 0.47–1 μF capacitor to VSS - critical for internal LDO stability and low-noise operation |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low-power HALT/STOP/SNOOZE modes | Enables >10-year battery life in wireless sensor nodes using RTC-triggered periodic wake-up and measurement |
| Background data flash rewriting (BGO) | Allows firmware updates or logging while executing application code - eliminates interruption of real-time control loops |
| Event Link Controller (ELC) | Direct hardware linking of 19–26 peripheral events (e.g., ADC end → DMA trigger → UART TX) - reduces ISR latency to <100 ns |
| Data Transfer Controller (DTC) | Hardware DMA with chain transfer - moves sensor data from ADC to UART or flash without CPU cycles, freeing core for computation |
| Integrated temperature sensor & 1.45 V reference | Eliminates external components for thermal monitoring and ADC calibration - reduces BOM cost and board area |
| On-chip voltage detector (LVD) with 14 levels | Configurable brown-out detection from 1.6–5.5 V - prevents erratic behavior during battery discharge or supply sag |
Applications
| Smart Energy Metering | Industrial Temperature Sensor Node |
|---|---|
Use Scenario: Utility-grade electricity meter with tamper detection, load profiling, and RF communication. IC Role / Device Role / Timing Role: Main system controller managing metrology ADC sampling, RTC-based billing intervals, LIN bus for module communication, and secure flash updates. Use Value: 96 KB flash stores dual-application firmware (metering + comms); 8 KB data flash logs 30 days of consumption; RTC calendar ensures accurate billing cycle alignment. |
Use Scenario: Wireless, battery-powered node measuring ambient and process temperature in factory automation. IC Role / Device Role / Timing Role: Sensor fusion hub acquiring data from internal temp sensor and external thermistors, then transmitting via UART-to-LoRa gateway. Use Value: 10-bit ADC with internal 1.45 V reference achieves ±1°C accuracy; STOP mode draws only 0.60 μA with RTC alarm wake-up every 5 minutes. |
| Home Appliance Motor Control | Building Automation Controller |
Use Scenario: Brushless DC motor driver in HVAC blower or refrigerator compressor with speed regulation and fault protection. IC Role / Device Role / Timing Role: Real-time motor commutation controller using TAU timers for precise PWM generation and ADC for current sensing. Use Value: TAU's 8-channel 16-bit timers support 3-phase FOC with dead-time insertion; 20-channel ADC samples phase currents and thermistors simultaneously. |
Use Scenario: DIN-rail mounted controller managing lighting, HVAC, and occupancy sensors across commercial buildings. IC Role / Device Role / Timing Role: Central coordinator interfacing with DALI, Modbus RTU, and I²C sensors using multiple UARTs and I²C ports. Use Value: 3× UART/LIN and 4× I²C allow concurrent protocol stacks; ELC synchronizes DALI timing pulses with sensor polling without CPU overhead. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 16-bit microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F104GGAFB#V0 | 128 KB flash, 12 KB RAM, same 48-pin LFQFP-0.5 mm package and peripheral set | Supports larger firmware (e.g., OTA update stack + encryption) without layout change | Select when future firmware growth or secure boot requirements exceed 96 KB flash capacity |
| R5F104GHAFB#V0 | 192 KB flash, 20 KB RAM, identical pinout and temperature grade (−40°C to +105°C) | Enables complex control algorithms (e.g., PID tuning tables, predictive maintenance models) in same footprint | Choose for applications requiring >12 KB RAM for real-time data buffering or multi-threaded RTOS operation |
Compared with R5F104GFAFB#V0, R5F104GGAFB#V0 adds 32 KB flash for enhanced firmware resilience and security features, while R5F104GHAFB#V0 provides 8 KB more RAM and 96 KB more flash - both retain identical peripheral configuration, ELC/DTC behavior, and low-power profile, enabling seamless migration within the same PCB layout.
Availability
R5F104GFAFB#V0 is available at Aetrix Electronics and suitable for industrial sensor nodes, smart metering endpoints, and building automation controllers requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for R5F104GFAFB#V0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The RL78/G14 family is designed for cost-sensitive, ultra-low-power general-purpose embedded control - balancing performance, integration, and energy efficiency in industrial and consumer equipment.
FAQ
What is the maximum operating frequency and corresponding DMIPS rating for the R5F104GFAFB#V0?
The R5F104GFAFB#V0 achieves a maximum operating frequency of 32 MHz using its high-speed on-chip oscillator, delivering 44 DMIPS of processing performance. This rating is measured under standard conditions (VDD = 3.3 V, TA = 25°C) and reflects the RL78 CPU core's optimized 3-stage pipeline execution efficiency.
Does the R5F104GFAFB#V0 support hardware debugging, and what interface is used?
Yes, the R5F104GFAFB#V0 supports on-chip debugging via dedicated pins P50 (TOOLRxD) and P51 (TOOLTxD), implementing a UART-based debug interface compatible with Renesas E2 studio and CS+ IDE. No external JTAG adapter is required - the interface enables full flash programming, breakpoint setting, and real-time variable monitoring.
What are the key low-power modes supported by the R5F104GFAFB#V0, and what is the lowest current draw?
The R5F104GFAFB#V0 supports HALT (66 μA/MHz), STOP (0.60 μA), and SNOOZE modes. In STOP mode with only RTC and LVD active, it draws just 0.60 μA - verified at VDD = 3.0 V, TA = 25°C - making it suitable for decade-long battery operation in infrequently sampled sensor applications.
How many analog input channels does the R5F104GFAFB#V0 ADC support, and what reference options are available?
The R5F104GFAFB#V0 integrates a 10-bit successive-approximation ADC with up to 20 analog input channels (ANI0–ANI19). Reference options include external AVREFP/AVREFM pins or internal 1.45 V reference - selectable per channel - enabling flexible sensor interfacing without external voltage references.
Is the R5F104GFAFB#V0 pin-compatible with other RL78/G14 variants in the same 48-pin LFQFP package?
Yes, all RL78/G14 devices in the 48-pin LFQFP-0.5 mm package (e.g., R5F104GGAFB#V0, R5F104GHAFB#V0) share identical pinouts, electrical characteristics, and peripheral mapping. Firmware and PCB layouts are interchangeable across this package group - only flash/RAM capacities and minor feature enables differ.
R5F104GFAFB#V0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 48-LQFP
- Series:
- RL78/G14
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- RL78
- Core Size:
- 16-Bit
- Speed:
- 32MHz
- Connectivity:
- CSI, I2C, LINbus, UART/USART
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 34
- Program Memory Size:
- 96KB (96K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 12K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.6V ~ 5.5V
- Data Converters:
- A/D 10x8/10b; D/A 2x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F104GFAFB#V0 FAQ
1.How can I place an order for R5F104GFAFB#V0 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F104GFAFB#V0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F104GFAFB#V0 reliable?
The price and inventory of R5F104GFAFB#V0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F104GFAFB#V0 is usually 5 days.
3.What payment methods are accepted for R5F104GFAFB#V0?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F104GFAFB#V0 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F104GFAFB#V0?
R5F104GFAFB#V0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F104GFAFB#V0 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F104GFAFB#V0?
For technical support, including R5F104GFAFB#V0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F104GFAFB#V0 requirements.
6.How does Aetrix verify that R5F104GFAFB#V0 is sourced from the original manufacturer or authorized distributors?
All R5F104GFAFB#V0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F104GFAFB#V0 meets industry standards.
7.What is the process for return or replacement of R5F104GFAFB#V0?
All R5F104GFAFB#V0 units undergo pre-shipment inspection (PSI). If there is an issue with R5F104GFAFB#V0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F104GFAFB#V0 part is unused and in its original packaging.
Return procedure for R5F104GFAFB#V0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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