Renesas R5F104GFANA#20
- Part No.:
- R5F104GFANA#20
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 48-WFQFN Exposed Pad
- Datasheet:
-
R5F104GFANA#20.pdf
- Description:
- IC MCU 16BIT 96KB FLASH 48HWQFN
- Quantity:
- Payment:

- Shipping:

Inventory:845
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F104GFANA#20 from Renesas is a 48-pin HWQFN-packaged RL78/G14 16-bit microcontroller with 96 KB flash, 5.5 KB RAM, and industrial-grade operation (−40°C to +105°C). It delivers 44 DMIPS at 32 MHz, supports ultra-low-power HALT/STOP/SNOOZE modes (66 μA/MHz active, 0.60 μA RTC+LVD), and integrates UART, I²C, SPI, 10-bit ADC (12 channels), and RTC for embedded control in space-constrained industrial sensors.
For engineers reviewing the R5F104GFANA#20 datasheet, R5F104GFANA#20 pinout, R5F104GFANA#20 application, or R5F104GFANA#20 equivalent, key selection criteria include its 48-pin HWQFN-0.5mm package, −40°C to +105°C industrial temperature rating, 96 KB code flash with data flash, and integrated analog peripherals including 10-bit ADC and RTC with calendar function.
Technical Context
The R5F104GFANA#20 implements the RL78 CPU core with CISC architecture, 3-stage pipeline, and configurable instruction timing (0.03125 µs min @ 32 MHz to 30.5 µs @ 32.768 kHz). It uses a single 1.6–5.5 V supply and includes on-chip power-on-reset (POR) and voltage detector (LVD) with 14 selectable levels.
Peripheral integration includes Data Transfer Controller (DTC), Event Link Controller (ELC), 16-bit Timer Array Unit (TAU), 12-bit interval timer, real-time clock with calendar/alarm/correction, watchdog timer, and simplified SPI (CSI), UART/LIN, and I²C interfaces - all optimized for deterministic low-power operation in resource-constrained systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | RL78 16-bit CISC CPU with 3-stage pipeline and multiply/divide instructions |
| Max Operating Frequency | 32 MHz (44 DMIPS), with high-accuracy on-chip oscillator (±1.0% from −20°C to +85°C) |
| Memory | 96 KB code flash (1 KB block size), 4 KB data flash, 5.5 KB RAM |
| Power Consumption | 66 μA/MHz active mode; 0.60 μA in STOP mode with RTC + LVD enabled |
| Analog Peripherals | 10-bit ADC (12 input channels, internal 1.45 V reference, temperature sensor), no D/A converter |
| Temperature Range | −40°C to +105°C (industrial G-grade qualification) |
| Package | 48-pin HWQFN (7 × 7 mm, 0.5 mm pitch), exposed die pad recommended to be connected to VSS |
Pinout & Package
Package: 48-pin HWQFN (7 × 7 mm, 0.5 mm pitch), RoHS-compliant, with exposed thermal pad (recommended connection to VSS).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P00 | TxD1 / TI00 / TRGCLKA | Primary UART transmit, timer input, and trace clock output; supports asynchronous serial communication and debug timing |
| P01 | RxD1 / TO00 / TRGCLKB | Primary UART receive and timer output; enables full-duplex UART with hardware timing capture |
| P10–P17 | SPI/I²C/UART/ADC/Comparator I/O | Multiplexed peripheral interface pins supporting CSI (SPI), I²C, UART, analog inputs, and comparator functions |
| P20–P27 | ANI0–ANI7 / AVREFP/AVREFM | 8-channel analog input group with dedicated reference voltage terminals for precise ADC measurements |
| P30–P31 | INTP3/RTC1HZ/SCK00 / INTP4/TI03/TO03 | Real-time clock interrupt output and timer I/O; enables low-power timekeeping and event-triggered timing |
| P50–P51 | RxD0/SI00/SDA00 / TxD0/SO00/TRGIOB | Dual-function UART/SPI/I²C pins with on-chip debugger interface (TOOLRxD/TOOLTxD) |
| P60–P62 | SCLA0/SDAA0/SSI00 | I²C bus interface (SCL/SDA) and synchronous serial interface for external memory or sensors |
| P120–P124 | VCOUT0/X1/X2/XT1/XT2 | Crystal oscillator inputs and VCOUT for external clock source or crystal drive; supports 32.768 kHz RTC and main system clock |
| RESET / REGC / VDD / VSS | Reset control / regulator capacitor / power / ground | Hardware reset input; REGC requires 0.47–1 µF capacitor to VSS for internal regulator stability |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low-power operation | 0.60 μA STOP mode with RTC + LVD active enables battery-powered operation for >10 years in metering applications |
| On-chip debug support | Full in-circuit debugging via TOOLRxD/TOOLTxD pins without external emulator; reduces BOM and debug footprint |
| Data flash background operation | BGO allows program execution from flash while rewriting 4 KB data flash - critical for firmware updates and logging |
| Event Link Controller (ELC) | Direct hardware linking of 19–26 peripheral events eliminates CPU polling and reduces latency for time-critical responses |
| Peripheral I/O redirection | PIOR0/PIOR1 registers enable dynamic remapping of UART, SPI, and timer functions to alternate pins - simplifies PCB layout reuse |
Applications
| Industrial Sensor Node | Smart Energy Meter |
|---|---|
Use Scenario: Compact, battery-operated temperature/humidity/pressure sensor node deployed in factory automation or HVAC ducts. IC Role / Device Role: Main system controller managing sensor acquisition, RTC-timed sampling, low-power sleep/wake cycles, and UART-based data reporting. Use Value: 0.60 μA STOP mode with RTC extends battery life beyond 10 years; 10-bit ADC with internal reference ensures stable measurement accuracy across temperature. | Use Scenario: DIN-rail mounted electricity meter requiring tamper detection, energy accumulation, and optical/IR communication. IC Role / Device Role: Primary metering MCU handling pulse counting, RTC-based billing intervals, secure data storage in data flash, and IR/UART host interface. Use Value: 4 KB data flash with 1M rewrite cycles stores tariff tables and logs securely; −40°C to +105°C rating ensures reliability in outdoor enclosures. |
| Programmable Logic Controller (PLC) I/O Module | Motor Control Interface Board |
Use Scenario: DIN-rail mounted digital I/O expansion module for small PLCs, accepting 24 V DC inputs and driving relay outputs. IC Role / Device Role: Real-time I/O manager with GPIO scanning, debounce, interrupt generation, and RS-485 communication via UART. Use Value: ELC links timer events to GPIO interrupts for sub-10 µs response; 1.6–5.5 V operation tolerates wide industrial supply variations. | Use Scenario: Fan/pump motor interface board with speed feedback, fault monitoring, and PWM control in HVAC or industrial drives. IC Role / Device Role: Motor supervisory controller acquiring tachometer signals, monitoring overcurrent via ADC, generating PWM via TAU, and communicating status via UART. Use Value: 16-bit TAU timers provide precise 16-bit PWM resolution; 12-channel ADC monitors multiple voltage/current/temperature points simultaneously. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F104GHANA#20 | 128 KB flash, 12 KB RAM, same 48-pin HWQFN package and G-grade temperature range | Supports larger firmware (e.g., Modbus RTU stack + web server), more complex state machines | Select when firmware size exceeds 96 KB or additional RAM is needed for buffering or RTOS heap |
| R5F104GFASP#V0 | Same 96 KB flash/5.5 KB RAM but in 30-pin LSSOP package; −40°C to +85°C (A-grade) | Limited I/O count (26 pins), lower max ambient temperature; suited for cost-sensitive consumer-grade devices | Choose only for space-constrained A-grade designs where 48-pin density and industrial temp are not required |
Compared with R5F104GHANA#20, the R5F104GFANA#20 trades flash/RAM headroom for identical package and industrial qualification; versus R5F104GFASP#V0, it provides higher thermal robustness and 22 additional I/O pins at the cost of larger footprint.
Availability
R5F104GFANA#20 is available at Aetrix Electronics and suitable for industrial sensor nodes, smart energy meters, and PLC I/O modules requiring stable component supply, long-term lifecycle support, and guaranteed industrial temperature performance.
Supply support for R5F104GFANA#20 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The RL78/G14 product line delivers true low-power 16-bit MCUs optimized for cost-sensitive industrial control, sensor interfacing, and metering applications requiring extended battery life and robust operation across harsh environments.
FAQ
What is the maximum operating frequency and core performance of the R5F104GFANA#20?
The R5F104GFANA#20 operates at up to 32 MHz with the RL78 CPU core, delivering 44 DMIPS. Its minimum instruction execution time is 0.03125 µs at 32 MHz using the high-speed on-chip oscillator, and it supports configurable clock scaling down to 32.768 kHz for ultra-low-power RTC operation. This performance level is confirmed in the RL78/G14 datasheet Rev. 3.70 for the R5F104GFANA#20 variant.
Does the R5F104GFANA#20 include an integrated DAC or only ADC functionality?
The R5F104GFANA#20 includes a 10-bit ADC with up to 12 analog input channels and internal 1.45 V reference, but it does not integrate a D/A converter. The RL78/G14 family documentation explicitly lists D/A converter availability as "None or up to two channels" depending on variant, and the R5F104GFANA#20 part number mapping confirms zero DAC channels. Analog output must be implemented externally or via PWM with filtering.
What is the industrial temperature rating and package type of the R5F104GFANA#20?
The R5F104GFANA#20 is rated for −40°C to +105°C operation (G-grade industrial qualification) and housed in a 48-pin HWQFN package (7 × 7 mm, 0.5 mm pitch) with exposed thermal pad. The 'G' in the part number denotes industrial temperature grade, and the 'NA' suffix specifies the HWQFN package per Renesas ordering information in R01DS0053EJ0370.
How much flash and RAM memory does the R5F104GFANA#20 provide?
The R5F104GFANA#20 provides 96 KB of code flash memory, 4 KB of data flash memory, and 5.5 KB of on-chip RAM. These values are confirmed in the RL78/G14 memory capacity table (Page 2 of R01DS0053EJ0370), where 'F' in the ROM capacity field corresponds to 96 KB, and the 48-pin row lists 5.5 KB RAM for variants ending in 'F'.
What debug interface options are supported by the R5F104GFANA#20?
The R5F104GFANA#20 supports on-chip debugging via dedicated TOOLRxD (P50) and TOOLTxD (P51) pins, enabling full in-circuit debugging without external emulators. It also supports the standard SWD interface through the same pins when configured appropriately. No JTAG port is present; debug capability is limited to the Renesas E1/E20 emulator protocol over the TOOL interface, as specified in the RL78/G14 hardware manual.
R5F104GFANA#20 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 48-WFQFN Exposed Pad
- Series:
- RL78/G14
- Packaging:
- Tray
- Product Status:
- Last Time Buy
- Programmable:
- Not Verified
- Core Processor:
- RL78
- Core Size:
- 16-Bit
- Speed:
- 32MHz
- Connectivity:
- CSI, I2C, LINbus, UART/USART
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 34
- Program Memory Size:
- 96KB (96K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 12K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.6V ~ 5.5V
- Data Converters:
- A/D 10x8/10b; D/A 2x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F104GFANA#20 FAQ
1.How can I place an order for R5F104GFANA#20 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F104GFANA#20 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F104GFANA#20 reliable?
The price and inventory of R5F104GFANA#20 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F104GFANA#20 is usually 5 days.
3.What payment methods are accepted for R5F104GFANA#20?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F104GFANA#20 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F104GFANA#20?
R5F104GFANA#20 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F104GFANA#20 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F104GFANA#20?
For technical support, including R5F104GFANA#20 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F104GFANA#20 requirements.
6.How does Aetrix verify that R5F104GFANA#20 is sourced from the original manufacturer or authorized distributors?
All R5F104GFANA#20 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F104GFANA#20 meets industry standards.
7.What is the process for return or replacement of R5F104GFANA#20?
All R5F104GFANA#20 units undergo pre-shipment inspection (PSI). If there is an issue with R5F104GFANA#20, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F104GFANA#20 part is unused and in its original packaging.
Return procedure for R5F104GFANA#20:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F104GFANA#20 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

