My Inquiry
My Account
Renesas R5F104GFANA#U0
- Part No.:
- R5F104GFANA#U0
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 48-WFQFN Exposed Pad
- Datasheet:
-
R5F104GFANA#U0.pdf
- Description:
- IC MCU 16BIT 96KB FLASH 48HWQFN
- Quantity:
- Payment:
- Shipping:
Inventory:3,658
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F104GFANA#U0 from Renesas is a 48-pin HWQFN-packaged RL78/G14 16-bit microcontroller with 96 KB flash, 5.5 KB RAM, and industrial-grade operation (−40°C to +85°C). It integrates a 32 MHz RL78 CPU core delivering 44 DMIPS, ultra-low-power modes (66 μA/MHz active, 0.60 μA RTC+LVD), 10-bit ADC (16 channels), UART/SPI/I²C interfaces, and real-time clock with calendar function - deployed in battery-powered sensor nodes and industrial control panels.
For engineers reviewing the R5F104GFANA#U0 datasheet, R5F104GFANA#U0 pinout, R5F104GFANA#U0 application, or R5F104GFANA#U0 equivalent, key selection criteria include its 48-pin 7×7 mm HWQFN package with exposed pad, 96 KB code flash with self-programming support, 10-bit ADC input count and accuracy, RTC calendar resolution, and compatibility with Renesas' CS+ and e² studio toolchains.
Technical Context
The R5F104GFANA#U0 implements the RL78 CPU core with CISC architecture, 3-stage pipeline, and configurable instruction timing (0.03125 μs @ 32 MHz to 30.5 μs @ 32.768 kHz). It supports multiply/divide/accumulate instructions and features an address space of 1 MB with four banks of 8-bit general-purpose registers.
Its peripheral set includes Timer Array Unit (TAU) with up to 8 channels, 12-bit interval timer, real-time clock with alarm/calendar, watchdog timer, and Data Transfer Controller (DTC) with chain transfer capability - enabling deterministic low-CPU-overhead data movement between peripherals and memory without interrupt latency penalties.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | RL78 16-bit CISC CPU with 3-stage pipeline and 44 DMIPS @ 32 MHz |
| Flash Memory | 96 KB code flash with 1 KB block size, self-programming, and flash shield window |
| Data Flash | 4 KB data flash supporting background operation (BGO) and 1M rewrite cycles |
| RAM | 5.5 KB on-chip RAM for variables, stack, and DTC buffer allocation |
| ADC | 10-bit resolution, 16-channel analog input, internal 1.45 V reference, and temperature sensor |
| Operating Voltage | 1.6 V to 5.5 V single supply - enables direct interface with 1.8 V, 2.5 V, and 3.3 V peripherals |
| Low-Power Modes | HALT (66 μA/MHz), STOP (0.60 μA with RTC+LVD), and SNOOZE for wake-up-triggered peripheral operation |
Pinout & Package
Package: 48-pin HWQFN (7 × 7 mm, 0.5 mm pitch) with exposed die pad recommended to be connected to VSS.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P00 | TxD1 / TI00 / TRGCLKA | Primary UART transmit channel, timer input, and debug clock source - supports asynchronous serial communication and event timing |
| P01 | RxD1 / TO00 / TRGCLKB | Primary UART receive channel and timer output - enables full-duplex UART with hardware timing synchronization |
| P10–P17 | SPI/I²C/UART peripheral I/O | Configurable multi-function pins for CSI (SPI-compatible), I²C, and UART channels - routed via PIOR0/1 for flexible peripheral mapping |
| P20–P27 | ANI0–ANI7 / AVREFP / AVREFM | Eight analog input channels with dedicated reference voltage terminals - supports ratiometric sensing and precision measurement |
| P30–P31 | INTP3 / RTC1HZ / TI03 / TO03 | Real-time clock interrupt output and timer I/O - provides accurate 1 Hz timebase and edge-triggered event capture |
| P50–P51 | RxD0 / TxD0 / TOOLRxD / TOOLTxD | On-chip debug interface UART - enables programming and real-time debugging without external adapters |
| RESET | Active-low reset input | Asynchronous reset signal with internal pull-up - ensures reliable initialization after power-on or brownout |
| REGC | Regulator capacitor terminal | Connects to 0.47–1 μF capacitor to VSS - stabilizes internal voltage regulator for low-noise analog operation |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low-power operation | 66 μA/MHz active current and 0.60 μA STOP mode enable multi-year battery life in sensor endpoints |
| Hardware-accelerated data movement | DTC supports normal, repeat, and block transfers triggered by 19–26 event sources - eliminates CPU polling overhead |
| Flexible peripheral routing | Event Link Controller (ELC) links peripheral events (e.g., ADC EOC, timer overflow) directly to other modules - reduces software latency |
| Secure firmware update | Flash shield window and block erase prohibition prevent unauthorized code modification - meets basic functional safety requirements |
| Integrated RTC with calendar | 99-year calendar, alarm, and clock correction functions operate independently in STOP mode - enables time-stamped logging without CPU wake-up |
Applications
| Smart Metering Node | Industrial Sensor Hub |
|---|---|
Use Scenario: Battery-powered gas/water meter collecting pulse counts, temperature, and pressure at 15-minute intervals. IC Role / Device Role / Timing Role: Main system controller executing metering algorithms, managing RTC-based sampling schedule, and handling LoRaWAN packet assembly. Use Value: 0.60 μA STOP mode with RTC extends battery life beyond 10 years; 10-bit ADC with internal reference ensures ±1% measurement accuracy across temperature. |
Use Scenario: DIN-rail mounted sensor aggregator reading thermocouples, humidity sensors, and digital inputs across 8 field devices. IC Role / Device Role / Timing Role: Central data concentrator running Modbus RTU over RS-485, performing sensor linearization, and buffering readings in data flash. Use Value: 4 KB data flash with BGO allows continuous logging while servicing communications; 16-channel ADC supports mixed-signal front-end consolidation. |
| Home Appliance Control | Medical Diagnostic Device |
Use Scenario: Washing machine main control board managing motor drive, water valves, temperature monitoring, and user interface. IC Role / Device Role / Timing Role: Real-time motor timing controller using TAU PWM outputs, ADC for NTC temperature feedback, and UART for display module communication. Use Value: 44 DMIPS CPU headroom handles PID loop execution at 10 kHz; HALT mode reduces standby power during idle cycles. |
Use Scenario: Portable blood glucose monitor requiring precise analog measurement, button debouncing, LCD driving, and USB charging detection. IC Role / Device Role / Timing Role: Signal acquisition processor capturing electrochemical sensor output, applying calibration coefficients, and formatting results for BLE transmission. Use Value: On-chip temperature sensor compensates for ADC drift; 1.6–5.5 V operation supports direct Li-ion battery input without LDO. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F104GHANA#U0 | 128 KB flash, 12 KB RAM, same 48-pin HWQFN package and peripheral set | Supports larger firmware images and more complex protocol stacks (e.g., full BLE host stack) | Select when firmware size exceeds 96 KB or additional RAM is required for dynamic buffers |
| R5F104GEANA#U0 | 64 KB flash, 5.5 KB RAM, identical package and peripheral configuration | Lower-cost option for fixed-function applications with minimal code footprint (e.g., simple timer-based controllers) | Choose for cost-sensitive designs where 64 KB flash suffices and no future firmware expansion is planned |
Compared with R5F104GHANA#U0 and R5F104GEANA#U0, the R5F104GFANA#U0 delivers optimal balance of flash capacity (96 KB), RAM (5.5 KB), and industrial temperature range in the compact 48-pin HWQFN - making it ideal for mid-complexity embedded systems requiring field-upgradable firmware and analog sensing without over-provisioning.
Availability
R5F104GFANA#U0 is available at Aetrix Electronics and suitable for smart metering nodes, industrial sensor hubs, and home appliance control systems requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for R5F104GFANA#U0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The RL78/G14 product line delivers true low-power performance for general-purpose embedded applications - designed to replace legacy 8/16-bit MCUs in cost-sensitive, battery-operated, and industrial control systems requiring high integration and robust toolchain support.
FAQ
What is the maximum operating frequency and corresponding DMIPS rating of the R5F104GFANA#U0?
The R5F104GFANA#U0 operates at up to 32 MHz with its RL78 CPU core, achieving 44 DMIPS performance. This benchmark reflects integer instruction throughput under standard conditions and is validated in Renesas' official documentation. The R5F104GFANA#U0 maintains this performance across its full 1.6–5.5 V supply range and −40°C to +85°C ambient temperature.
Does the R5F104GFANA#U0 support background data flash rewriting while executing application code?
Yes, the R5F104GFANA#U0 supports background operation (BGO) for its 4 KB data flash memory. Instructions can be fetched and executed from program memory while data flash is being rewritten, enabling seamless firmware parameter updates or data logging without interrupting real-time tasks. The R5F104GFANA#U0 guarantees 1,000,000 rewrite cycles at VDD = 1.8–5.5 V.
How many analog input channels does the R5F104GFANA#U0 provide, and what is the ADC resolution?
The R5F104GFANA#U0 integrates a 10-bit successive-approximation ADC with 16 configurable analog input channels (ANI0–ANI15). It includes internal 1.45 V reference voltage and on-chip temperature sensor, supporting ratiometric measurements and thermal compensation. The R5F104GFANA#U0 ADC operates across the full 1.6–5.5 V supply range with guaranteed linearity and offset specifications per Renesas datasheet R01DS0053EJ0340.
What low-power modes are available on the R5F104GFANA#U0, and what is the minimum current consumption?
The R5F104GFANA#U0 offers HALT, STOP, and SNOOZE low-power modes. In STOP mode with only RTC and LVD active, it consumes 0.60 μA typical at VDD = 3.0 V and TA = 25°C. HALT mode draws 66 μA/MHz, and SNOOZE enables selected peripherals to operate autonomously while the CPU remains halted. All modes are accessible via software control and retain RAM contents.
Is the R5F104GFANA#U0 pin-compatible with other RL78/G14 variants in the same 48-pin HWQFN package?
Yes, the R5F104GFANA#U0 shares identical pinout and electrical characteristics with all other RL78/G14 devices in the 48-pin HWQFN (NA) package, including R5F104GEANA#U0, R5F104GHANA#U0, and R5F104GLANA#U0. Pin functions, power domains, and reset behavior are consistent across this package group, enabling hardware reuse across firmware variants.
R5F104GFANA#U0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 48-WFQFN Exposed Pad
- Series:
- RL78/G14
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- RL78
- Core Size:
- 16-Bit
- Speed:
- 32MHz
- Connectivity:
- CSI, I2C, LINbus, UART/USART
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 34
- Program Memory Size:
- 96KB (96K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 12K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.6V ~ 5.5V
- Data Converters:
- A/D 10x8/10b; D/A 2x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F104GFANA#U0 FAQ
1.How can I place an order for R5F104GFANA#U0 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F104GFANA#U0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F104GFANA#U0 reliable?
The price and inventory of R5F104GFANA#U0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F104GFANA#U0 is usually 5 days.
3.What payment methods are accepted for R5F104GFANA#U0?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F104GFANA#U0 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F104GFANA#U0?
R5F104GFANA#U0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F104GFANA#U0 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F104GFANA#U0?
For technical support, including R5F104GFANA#U0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F104GFANA#U0 requirements.
6.How does Aetrix verify that R5F104GFANA#U0 is sourced from the original manufacturer or authorized distributors?
All R5F104GFANA#U0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F104GFANA#U0 meets industry standards.
7.What is the process for return or replacement of R5F104GFANA#U0?
All R5F104GFANA#U0 units undergo pre-shipment inspection (PSI). If there is an issue with R5F104GFANA#U0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F104GFANA#U0 part is unused and in its original packaging.
Return procedure for R5F104GFANA#U0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F104GFANA#U0 Tags
-
ATTINY4-TSHR
Microchip Technology
-
ATTINY10-TSHR
Microchip Technology
-
ATTINY10-TS8R
Microchip Technology
-
ATTINY202-SSNR
Microchip Technology
-
ATTINY202-SSFR
Microchip Technology
-
ATTINY402-SSNR
Microchip Technology
-
PIC16F15213T-I/MF
Microchip Technology
-
PIC16F15213-E/MF
Microchip Technology
-
PIC10F200T-I/OT
Microchip Technology
-
ATTINY412-SSNR
Microchip Technology
-
PIC10F202T-I/OT
Microchip Technology
-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
