Renesas R5F104GHAFB#V0
- Part No.:
- R5F104GHAFB#V0
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 48-LQFP
- Datasheet:
-
R5F104GHAFB#V0.pdf
- Description:
- IC MCU 16BIT 192KB FLASH 48LFQFP
- Quantity:
- Payment:

- Shipping:

Inventory:4,721
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F104GHAFB#V0 from Renesas is a 48-pin LFQFP, 0.5 mm pitch, industrial-grade (G) 128 KB flash RL78/G14 16-bit MCU operating from 1.6–5.5 V, delivering 44 DMIPS at 32 MHz with 66 μA/MHz active current and 0.60 μA RTC+LVD standby mode - deployed in smart metering, industrial HMI, and battery-powered sensor nodes.
For engineers reviewing the R5F104GHAFB#V0 datasheet, R5F104GHAFB#V0 pinout, R5F104GHAFB#V0 application, or R5F104GHAFB#V0 equivalent, key selection criteria include its 128 KB code flash + 8 KB data flash, dual 16-bit timer arrays (TAU), integrated RTC with calendar/alarm, 10-bit 20-channel ADC, and support for LIN-compliant UART in harsh-temperature environments (−40°C to +105°C).
Technical Context
The R5F104GHAFB#V0 implements the RL78 CPU core with 3-stage pipeline CISC architecture, supporting instruction execution times from 0.03125 μs (32 MHz high-speed oscillator) to 30.5 μs (32.768 kHz subsystem clock). It integrates Event Link Controller (ELC) for hardware-triggered peripheral chaining and Data Transfer Controller (DTC) with block/chain transfer modes.
Its power management includes HALT, STOP, and SNOOZE low-power modes, on-chip POR and 14-level LVD, and background operation (BGO) for data flash rewriting while executing program code - enabling deterministic real-time response during firmware updates and logging.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | RL78 16-bit CISC with 3-stage pipeline, 44 DMIPS @ 32 MHz |
| Flash Memory | 128 KB code flash + 8 KB data flash; 1 KB erase blocks; self-programming with boot swap |
| RAM | 16 KB on-chip RAM; supports flash library operations starting at FE900H |
| Operating Voltage | 1.6 V to 5.5 V - enables direct interface with 1.8 V, 2.5 V, and 3.3 V peripherals |
| Temperature Range | −40°C to +105°C (Industrial G grade) - qualified for extended thermal environments |
| ADC | 10-bit resolution, 20 analog inputs, internal 1.45 V reference and temperature sensor |
| Timers | 8× 16-bit TAU channels, 1× 12-bit interval timer, 1× RTC (calendar, alarm, correction) |
| Serial Interfaces | 3× UART/LIN, 4× I²C/simplified I²C, 3× CSI (SPI-compatible), all configurable via ELC |
Pinout & Package
48-pin LFQFP package (7 × 7 mm, 0.5 mm pitch), RoHS-compliant, with exposed pad not present (non-HWQFN variant); requires 0.47–1 μF capacitor between REGC and VSS.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P00/P01 | TxD1/RxD1, TO00/TI00 | Full-duplex UART1 with timer input/output capability for protocol timing or pulse generation |
| P10–P17 | SPI/I²C/UART multiplexed I/O | Configurable peripheral channel routing via PIOR registers - enables flexible board layout without signal layer rework |
| P20–P27 | ANI0–ANI7, AVREFP/AVREFM | 8-channel analog input group with dedicated reference pins - supports ratiometric sensing and noise-rejecting differential measurements |
| P30/P31 | INTP3/RTC1HZ, INTP4/TI03/TO03 | Dedicated RTC output and general-purpose timer I/O - enables precise time-stamping and PWM generation independent of CPU load |
| P121/P122 | X1/X2 crystal oscillator inputs | Supports 32.768 kHz crystal for RTC accuracy ±20 ppm; also accepts external clock up to 20 MHz |
| RESET, REGC, VDD, VSS | Power/reset control | REGC decoupling ensures stable internal regulator output; RESET is Schmitt-triggered with built-in de-glitching |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low power modes | HALT (0.60 μA), STOP (0.60 μA), SNOOZE (retains RAM, wakes on peripheral event) - extends battery life in intermittent-sensing applications |
| Background data flash rewrite | BGO allows concurrent code execution and 1M-cycle endurance data logging - eliminates interrupt latency during firmware field updates |
| Event Link Controller (ELC) | Hardware linking of 19–26 event sources to peripherals - removes CPU polling overhead for sensor-triggered ADC captures or timer-based PWM updates |
| On-chip debug & security | Firmware protection via flash block erase prohibition; single-wire debug interface (SWD) compatible with Renesas E2 emulator |
| Dual voltage interface | I/O pins tolerate 6 V on select N-ch open-drain pins and support 1.8/2.5/3.3 V logic levels - simplifies mixed-voltage system integration |
Applications
| Smart Energy Metering | Industrial HMI Panel |
|---|---|
Use Scenario: Bidirectional energy measurement with tamper detection, time-of-use billing, and secure firmware updates over PLC or RF link. IC Role / Device Role / Timing Role: Main controller managing metrology ADC sampling, RTC-based tariff switching, LIN communication to display module, and encrypted OTA update handling. Use Value: 128 KB flash stores dual-application firmware images; 8 KB data flash logs 30+ days of consumption history with BGO; −40°C to +105°C rating ensures outdoor enclosure reliability. | Use Scenario: Local operator interface for PLC-controlled machinery with touch feedback, alarm annunciation, and real-time status visualization. IC Role / Device Role / Timing Role: Real-time UI processor driving segmented LCD or LED indicators, scanning keypad matrix, and servicing CAN/LIN bus commands from main controller. Use Value: ELC-triggered ADC reads potentiometer inputs without CPU intervention; RTC alarm wakes MCU from STOP mode for scheduled diagnostics; 16 KB RAM buffers graphics assets and command queues. |
| Battery-Powered Sensor Node | Motor Control Auxiliary Unit |
Use Scenario: Wireless environmental monitor (temp/humidity/pressure) with multi-year battery life using duty-cycled sensing and LoRaWAN transmission. IC Role / Device Role / Timing Role: Low-power sensor aggregator acquiring data via 10-bit ADC, timestamping with RTC, compressing payload, and triggering transceiver via GPIO. Use Value: 0.60 μA STOP mode with RTC active enables 10+ year coin-cell operation; internal temperature sensor calibrates external sensors; LIN UART interfaces to gateway MCU. | Use Scenario: Safety-critical auxiliary unit monitoring motor phase currents, heatsink temperature, and fault signals in HVAC or pump drives. IC Role / Device Role / Timing Role: Independent watchdog and analog monitor co-processor that triggers hardware shutdown if main MCU fails or thermal limits are exceeded. Use Value: Dual 16-bit timers generate precise dead-time PWM for gate drivers; comparator window mode detects overcurrent spikes within 100 ns; LVD reset prevents erratic behavior during brown-out. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 16-bit microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F104GJAFB#V0 | 256 KB flash, 24 KB RAM, same 48-pin LFQFP package and peripheral set | Required for larger firmware (e.g., embedded web server, advanced encryption stack) | Select when future firmware growth or dual-bank OTA is needed; pin-compatible upgrade path |
| R5F104GHAFP#V0 | Same 128 KB flash, but 44-pin LQFP (0.8 mm pitch), 12 KB RAM, no P74/P75 KR inputs | Preferred for cost-sensitive designs with lower I/O count and standard-pitch PCB assembly | Choose for simplified layout and legacy tooling compatibility; verify KR pin availability for keypad requirements |
Compared with R5F104GHAFB#V0, R5F104GJAFB#V0 offers scalable memory headroom without changing footprint, while R5F104GHAFP#V0 trades pin count and KR functionality for manufacturing simplicity - both retain identical core peripherals, low-power behavior, and industrial temperature qualification.
Availability
R5F104GHAFB#V0 is available at Aetrix Electronics and suitable for smart metering, industrial HMI, and battery-powered sensor nodes requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for R5F104GHAFB#V0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The RL78/G14 product line delivers ultra-low-power 16-bit MCUs optimized for cost-sensitive, thermally demanding embedded systems where runtime efficiency, peripheral integration, and long-term supply assurance are critical.
FAQ
What is the maximum operating frequency and corresponding power consumption of the R5F104GHAFB#V0?
The R5F104GHAFB#V0 operates up to 32 MHz with a typical active current of 66 μA/MHz at VDD = 3.3 V and TA = 25°C. At full speed, this equates to ~2.1 mA total active current. Its ultra-low-power STOP mode draws only 0.60 μA with RTC and LVD enabled - verified per R01DS0053EJ0340 Rev. 3.40 Section 1.1.
Does the R5F104GHAFB#V0 support hardware debugging, and what interface is used?
Yes, the R5F104GHAFB#V0 supports on-chip debugging via a single-wire debug (SWD) interface compatible with Renesas E2/E2 Lite emulators. Debug access remains functional even when code flash security is enabled, allowing verification and field diagnostics without compromising firmware integrity.
How many UART channels does the R5F104GHAFB#V0 include, and are they LIN-compliant?
The R5F104GHAFB#V0 integrates three UART channels, all supporting LIN 2.2 physical layer compliance including automatic sync-break detection, checksum calculation, and wakeup-on-break functionality - confirmed in Section 1.1 "Serial Interfaces" of the RL78/G14 datasheet R01DS0053EJ0340.
What is the data flash endurance and rewrite voltage range for the R5F104GHAFB#V0?
The R5F104GHAFB#V0 provides 8 KB of data flash rated for 1,000,000 write/erase cycles (typical) with operation supported across the full VDD range of 1.8 V to 5.5 V - enabling robust nonvolatile parameter storage in battery-backed or wide-input industrial power domains.
Can the R5F104GHAFB#V0 operate from a 32.768 kHz crystal, and what functions remain active in STOP mode?
Yes, the R5F104GHAFB#V0 supports 32.768 kHz crystal operation on X1/X2 pins for RTC precision. In STOP mode, the RTC, LVD, and RAM contents remain fully operational at 0.60 μA - allowing accurate timekeeping and brown-out detection while all other peripherals and CPU clocks are halted.
R5F104GHAFB#V0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 48-LQFP
- Series:
- RL78/G14
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- RL78
- Core Size:
- 16-Bit
- Speed:
- 32MHz
- Connectivity:
- CSI, I2C, LINbus, UART/USART
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 34
- Program Memory Size:
- 192KB (192K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 20K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.6V ~ 5.5V
- Data Converters:
- A/D 10x8/10b; D/A 2x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F104GHAFB#V0 FAQ
1.How can I place an order for R5F104GHAFB#V0 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F104GHAFB#V0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F104GHAFB#V0 reliable?
The price and inventory of R5F104GHAFB#V0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F104GHAFB#V0 is usually 5 days.
3.What payment methods are accepted for R5F104GHAFB#V0?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F104GHAFB#V0 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F104GHAFB#V0?
R5F104GHAFB#V0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F104GHAFB#V0 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F104GHAFB#V0?
For technical support, including R5F104GHAFB#V0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F104GHAFB#V0 requirements.
6.How does Aetrix verify that R5F104GHAFB#V0 is sourced from the original manufacturer or authorized distributors?
All R5F104GHAFB#V0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F104GHAFB#V0 meets industry standards.
7.What is the process for return or replacement of R5F104GHAFB#V0?
All R5F104GHAFB#V0 units undergo pre-shipment inspection (PSI). If there is an issue with R5F104GHAFB#V0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F104GHAFB#V0 part is unused and in its original packaging.
Return procedure for R5F104GHAFB#V0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F104GHAFB#V0 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

