Renesas R5F104GJGNA#W0
- Part No.:
- R5F104GJGNA#W0
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 48-WFQFN Exposed Pad
- Datasheet:
-
R5F104GJGNA#W0.pdf
- Description:
- IC MCU 16BIT 256KB FLASH 48HWQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
R5F104GJGNA#W0 from Renesas is a 48-pin HWQFN-packaged 16-bit RL78/G14 microcontroller with 192 KB flash, 8 KB data flash, 20 KB RAM, and industrial-grade operation up to +105°C. It integrates a 32 MHz RL78 CPU core (44 DMIPS), 10-bit 16-channel ADC, RTC with calendar, dual UART/LIN, 4-channel I²C, and ultra-low-power modes including 0.60 μA STOP mode.
For engineers reviewing the R5F104GJGNA#W0 datasheet, R5F104GJGNA#W0 pinout, R5F104GJGNA#W0 application, or R5F104GJGNA#W0 equivalent, key selection criteria include its 48-pin HWQFN (7×7 mm, 0.5 mm pitch) package, G-grade temperature rating (−40 to +105°C), integrated LIN-capable UARTs for automotive body electronics, and hardware DTC/ELC for deterministic peripheral event handling without CPU intervention.
Technical Context
The R5F104GJGNA#W0 implements the RL78 CPU core with 3-stage pipeline, supporting instruction execution times from 0.03125 μs (32 MHz) to 30.5 μs (32.768 kHz). Its power architecture enables HALT, STOP, and SNOOZE modes, with real-time clock and low-voltage detector (LVD) configurable across 14 levels for system-level safety monitoring.
Peripheral integration includes Event Link Controller (ELC) supporting 26 event sources linked to functions like ADC triggers or timer starts, and Data Transfer Controller (DTC) enabling background data flash rewriting (BGO) while executing code from program memory - critical for firmware-over-the-air updates in field-deployed devices.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RL78 16-bit CISC with 3-stage pipeline, 44 DMIPS @ 32 MHz |
| Flash Memory | 192 KB code flash + 8 KB data flash; supports self-programming and boot swap |
| RAM | 20 KB on-chip SRAM for real-time data buffering and stack operations |
| ADC | 10-bit resolution, 16 analog inputs, internal 1.45 V reference and temperature sensor |
| Timers | 12-channel 16-bit TAU, 1-channel 12-bit interval timer, RTC with calendar and alarm |
| Serial Interfaces | 2 × UART/LIN, 4 × I²C, 3 × CSI (SPI-compatible), all with independent clock domains |
| Power Modes | STOP mode draws 0.60 μA (RTC + LVD active); HALT mode consumes 66 μA/MHz |
Pinout & Package
Package: HWQFN-48 (7 × 7 mm, 0.5 mm pitch), exposed die pad recommended to be connected to VSS. Industrial-grade G-temp variant (−40 to +105°C).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P121 / X1 | Crystal input | Connects to 32.768 kHz crystal for RTC and low-power subsystem clock |
| P122 / X2 / EXCLK | Crystal output / external clock input | Drives crystal; also accepts external clock source up to 20 MHz for system timing flexibility |
| P50 / INTP1 / SI00 / RxD0 | UART0 receive / SPI input / interrupt | Dual-function pin supporting serial communication and wake-up interrupt in low-power states |
| P17 / TI02 / TO02 / TRDIOA0 | Timer I/O / LIN transceiver interface | Configurable as LIN bus physical layer driver output (TRDIOA0 mode) for automotive body control networks |
| REGC | Regulator capacitor connection | Must connect 0.47–1 μF capacitor to VSS for internal voltage regulator stability |
| VDD / VSS | Power supply / ground | Single 1.6–5.5 V supply; VSS must connect to exposed die pad for thermal and noise performance |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low-power STOP mode | 0.60 μA current draw with RTC and LVD active - enables multi-year battery life in metering applications |
| Background data flash rewrite | 1,000,000 write cycles with BGO; allows firmware update without halting application execution |
| Event Link Controller (ELC) | Hardware-triggered peripheral chaining (e.g., ADC conversion → DMA transfer → timer stop) eliminates CPU polling overhead |
| LIN-compliant UARTs | Two UART channels with automatic sync-break detection and checksum generation per LIN 2.2A specification |
| On-chip debug interface | Fully compliant with Renesas E2 emulator; supports real-time trace and flash programming via single-wire SWD |
Applications
| Automotive Body Control | Industrial Sensor Node |
|---|---|
Use Scenario: Central body controller managing door locks, window lifts, and interior lighting in passenger vehicles. IC Role / Device Role / Timing Role: Main MCU executing LIN protocol stacks, driving GPIOs, and processing switch inputs with real-time response. Use Value: Integrated LIN UARTs and 0.60 μA STOP mode reduce BOM count and extend battery backup runtime during vehicle sleep. | Use Scenario: Wireless environmental sensor node measuring temperature, humidity, and CO₂ in HVAC systems. IC Role / Device Role / Timing Role: Sensor fusion processor with ADC, RTC, and UART-to-LoRaWAN gateway interface. Use Value: 10-bit ADC with internal reference and temperature sensor enable calibrated measurements without external components. |
| Smart Energy Metering | Home Appliance Control |
Use Scenario: DIN-rail mounted electricity meter with tamper detection and time-of-use billing. IC Role / Device Role / Timing Role: Secure metering engine performing pulse counting, RTC-based tariff switching, and secure flash updates. Use Value: 8 KB data flash with 1M-cycle endurance stores lifetime energy logs; LVD with 14-level threshold ensures accurate brown-out detection. | Use Scenario: Washing machine main control board managing motor drive, water valves, and user interface. IC Role / Device Role / Timing Role: Real-time motor timing controller using TAU timers and PWM outputs with precise phase alignment. Use Value: 12-channel 16-bit TAU supports simultaneous 3-phase motor commutation and buzzer tone generation without resource conflict. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F104GHGNA#W0 | Same package and pinout; 128 KB flash, 16 KB RAM, identical peripherals and temp grade | Suitable where reduced code size and RAM footprint are acceptable for cost-sensitive designs | Select when application firmware fits within 128 KB and requires no additional RAM beyond 16 KB |
| R5F104GKGNA#W0 | Same package and pinout; 384 KB flash, 32 KB RAM, same G-temp rating and peripheral set | Required for complex firmware with large RTOS, OTA stacks, or extensive data logging buffers | Choose when future firmware expansion headroom or extended data retention (e.g., 32 KB RAM for ring buffers) is mandatory |
Compared with R5F104GHGNA#W0 and R5F104GKGNA#W0, the R5F104GJGNA#W0 provides optimal balance of flash (192 KB), RAM (20 KB), and industrial temperature range - making it ideal for mid-complexity automotive and industrial control applications where cost and resource margins must be tightly balanced.
Availability
R5F104GJGNA#W0 is available at Aetrix Electronics and suitable for automotive body electronics, industrial sensor nodes, smart energy metering, and home appliance control requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for R5F104GJGNA#W0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The RL78/G14 product line delivers true low-power 16-bit MCUs optimized for cost-sensitive, high-reliability applications demanding extended battery life, functional safety features, and seamless integration with LIN, I²C, and analog sensors.
FAQ
What is the operating temperature range for the R5F104GJGNA#W0?
The R5F104GJGNA#W0 is rated for industrial applications with an operating ambient temperature range of −40°C to +105°C (G-grade). This specification is validated per Renesas' qualification standards and applies across full voltage (1.6–5.5 V) and frequency (up to 32 MHz) operation - making it suitable for under-hood automotive and factory-floor industrial environments where thermal resilience is critical. The R5F104GJGNA#W0 maintains specified timing and analog performance across this full range.
Does the R5F104GJGNA#W0 support LIN bus communication?
Yes, the R5F104GJGNA#W0 supports LIN bus communication via two dedicated UART channels that implement LIN 2.2A protocol features including automatic sync-break detection, checksum generation (classic and enhanced), and configurable baud rates. These UARTs operate independently with separate clock domains and can be assigned to pins such as P17 (TRDIOA0 mode) for direct LIN physical layer interfacing - eliminating need for external transceivers in many body-control applications.
What debug interface does the R5F104GJGNA#W0 use?
The R5F104GJGNA#W0 uses Renesas' single-wire debug (SWD) interface compatible with the E2/E2 Lite emulators. It supports real-time trace, flash programming, and non-intrusive breakpoints without requiring dedicated debug pins - the interface shares functionality with P137 (INTP0) and P121/P122 (X1/X2) pins. Full on-chip debug capabilities include memory inspection, register access, and flash shield window configuration for secure firmware development.
How much data flash endurance does the R5F104GJGNA#W0 provide?
The R5F104GJGNA#W0 provides 8 KB of data flash memory rated for 1,000,000 write/erase cycles (typical) at VDD = 1.8–5.5 V. This endurance enables reliable storage of calibration data, device configuration, or usage logs in applications like smart meters and industrial controllers. Background operation (BGO) allows concurrent code execution during rewrites, and the flash library reserves specific RAM regions (e.g., F9F00H start address) for safe self-programming sequences.
Is the R5F104GJGNA#W0 pin-compatible with other RL78/G14 variants in HWQFN-48?
Yes, the R5F104GJGNA#W0 is fully pin-compatible with all RL78/G14 family members offered in the 48-pin HWQFN package (e.g., R5F104GHGNA#W0, R5F104GKGNA#W0), sharing identical pin count, pitch (0.5 mm), mechanical footprint (7×7 mm), and pin function mapping. This allows direct substitution within the same PCB layout when scaling flash/RAM resources - provided software is recompiled to match the target device's memory map and peripheral enable settings.
R5F104GJGNA#W0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 48-WFQFN Exposed Pad
- Series:
- RL78/G14
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- RL78
- Core Size:
- 16-Bit
- Speed:
- 32MHz
- Connectivity:
- CSI, I2C, LINbus, UART/USART
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 34
- Program Memory Size:
- 256KB (256K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 24K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.4V ~ 5.5V
- Data Converters:
- A/D 10x8/10b; D/A 2x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F104GJGNA#W0 FAQ
1.How can I place an order for R5F104GJGNA#W0 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F104GJGNA#W0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F104GJGNA#W0 reliable?
The price and inventory of R5F104GJGNA#W0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F104GJGNA#W0 is usually 5 days.
3.What payment methods are accepted for R5F104GJGNA#W0?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F104GJGNA#W0 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F104GJGNA#W0?
R5F104GJGNA#W0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F104GJGNA#W0 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F104GJGNA#W0?
For technical support, including R5F104GJGNA#W0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F104GJGNA#W0 requirements.
6.How does Aetrix verify that R5F104GJGNA#W0 is sourced from the original manufacturer or authorized distributors?
All R5F104GJGNA#W0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F104GJGNA#W0 meets industry standards.
7.What is the process for return or replacement of R5F104GJGNA#W0?
All R5F104GJGNA#W0 units undergo pre-shipment inspection (PSI). If there is an issue with R5F104GJGNA#W0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F104GJGNA#W0 part is unused and in its original packaging.
Return procedure for R5F104GJGNA#W0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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