Renesas R5F104JJAFA#V0
- Part No.:
- R5F104JJAFA#V0
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 52-LQFP
- Datasheet:
-
R5F104JJAFA#V0.pdf
- Description:
- IC MCU 16BIT 256KB FLASH 52LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:3,342
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Product details
Overview
R5F104JJAFA#V0 from Renesas is a 52-pin LQFP-0.65mm MCU in the RL78/G14 family, featuring 256 KB flash, 20 KB RAM, and 8 KB data flash. It delivers 44 DMIPS at 32 MHz with true low-power operation (66 μA/MHz active, 0.60 μA RTC+LVD mode), supporting industrial applications from −40°C to +85°C (D-grade).
For engineers reviewing the R5F104JJAFA#V0 datasheet, R5F104JJAFA#V0 pinout, R5F104JJAFA#V0 application, or R5F104JJAFA#V0 equivalent, key selection criteria include its integrated 10-bit ADC (20-channel), dual UART/LIN support, real-time clock with calendar, and hardware DTC/ELC for deterministic peripheral event handling in resource-constrained embedded systems.
Technical Context
The RL78 CPU core uses a 3-stage CISC pipeline with configurable instruction timing (0.03125 μs @ 32 MHz to 30.5 μs @ 32.768 kHz) and supports multiply/divide/accumulate operations. Its memory map spans 1 MB with four register banks (8×8-bit registers each).
Power management includes HALT, STOP, and SNOOZE modes, plus an on-chip LVD with 14 selectable voltage thresholds and POR circuitry. Peripheral control leverages Event Link Controller (ELC) for direct hardware-triggered peripheral activation without CPU intervention.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | RL78 16-bit CISC CPU with 3-stage pipeline and 1 MB address space |
| Max Clock | 32 MHz - enables 44 DMIPS performance for real-time control loops |
| Flash / Data Flash / RAM | 256 KB / 8 KB / 20 KB - sufficient for complex firmware with nonvolatile parameter storage |
| ADC | 10-bit resolution, 20 input channels, internal 1.45 V reference - supports multi-sensor analog acquisition |
| Timers | 12× 16-bit TAU channels + RTC + watchdog - enables precise timing, PWM, and calendar-based wake-up |
| Serial Interfaces | 3× UART/LIN, 4–10× I²C, 3–8× CSI - provides flexible communication for sensor hubs and actuator networks |
| Supply Range | 1.6 V to 5.5 V - allows direct battery operation (e.g., 3× AA or Li-ion) without external regulators |
Pinout & Package
Package: 52-pin LQFP, 10 × 10 mm, 0.65 mm pitch, RoHS-compliant, industrial-grade (−40°C to +85°C).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P00 | TxD1 / TI00 / TRGCLKA | Primary UART transmit; timer input; debug clock source - enables serial comms and time-critical edge detection |
| P01 | RxD1 / TO00 / TRGCLKB | Primary UART receive; timer output; debug clock sync - supports full-duplex comms and synchronized peripheral triggering |
| P10–P17 | SPI/I²C/UART/SCL/SDA/TRDIODx | Multiplexed serial interface pins - configurable via PIOR registers for flexible peripheral routing |
| P20–P27 | ANI0–ANI7 / AVREFP / AVREFM / ANO0 / ANO1 | Analog input channels with dedicated reference pins - enables high-accuracy ratiometric measurements |
| P30–P31 | INTP3 / RTC1HZ / SCK00 / TI03 / TO03 | Real-time clock interrupt output and timer I/O - provides precise 1 Hz timing signal and capture/compare capability |
| RESET | Active-low reset input | Asynchronous hardware reset with internal pull-up - ensures reliable initialization under brown-out conditions |
| VDD / VSS | Power supply / ground | Dual power domains support mixed-voltage I/O; REGC capacitor required for internal regulator stability |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low power modes | HALT/STOP/SNOOZE reduce current to sub-μA levels while retaining RAM and RTC state for rapid wake-up |
| Self-programmable flash | Boot swap and flash shield window enable secure firmware updates without external programmer |
| Background data flash rewrite | BGO allows code execution from flash during 1M-cycle data flash writes - eliminates interrupt latency gaps |
| Hardware event linking (ELC) | 19–26 event sources directly trigger peripherals (e.g., ADC start on timer match) - offloads CPU scheduling |
| On-chip debug interface | Fully compliant with Renesas E2/E2 Lite debuggers - supports real-time trace and non-intrusive breakpoints |
| Integrated safety functions | Program flash block protection, LVD interrupt/reset, and watchdog with independent oscillator - meets IEC 60730 Class B requirements |
Applications
| Home Appliance Control | Industrial Sensor Node |
|---|---|
|
Use Scenario: Microcontroller in washing machine main board managing motor drive, water level sensing, and UI display. IC Role / Device Role / Timing Role: Central system controller executing real-time PID motor control, ADC sampling of pressure/temperature sensors, and UART-driven display updates. Use Value: 256 KB flash stores multiple motor profiles; 20-channel ADC acquires all analog sensors simultaneously; RTC enables delayed start and cycle timing. |
Use Scenario: Battery-powered wireless node monitoring temperature, humidity, and vibration in factory equipment. IC Role / Device Role / Timing Role: Low-power data aggregator with ADC, UART-to-LoRa bridge, and RTC-based wake-up scheduler. Use Value: 0.60 μA STOP mode extends 2-year battery life; BGO allows logging sensor data during flash writes; ELC triggers ADC on timer expiry without CPU wake-up. |
| Building Automation Panel | Medical Diagnostic Device |
|
Use Scenario: HVAC control panel with touch interface, fan speed regulation, and network connectivity. IC Role / Device Role / Timing Role: Human-machine interface processor handling capacitive touch scanning, PWM fan control, and Modbus RTU over UART. Use Value: 52-pin LQFP accommodates dedicated touch I/O and isolated UART lines; 10-bit ADC resolves thermistor curves with ±1°C accuracy; LIN support interfaces with zone actuators. |
Use Scenario: Portable blood glucose meter requiring precision analog measurement and secure data storage. IC Role / Device Role / Timing Role: Safety-certified measurement engine performing calibrated ADC conversion, EEPROM-backed calibration storage, and USB HID reporting. Use Value: Internal 1.45 V reference ensures stable ADC accuracy across battery discharge; flash security prevents unauthorized firmware modification; LVD monitors supply for safe shutdown before measurement corruption. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F104GJAFA#V0 | 192 KB flash, 20 KB RAM, same 52-pin LQFP package and peripheral set | Suitable where firmware footprint is <192 KB and cost sensitivity outweighs future scalability | Select when flash headroom is not required and BOM cost reduction is prioritized |
| R5F104LJAFA#V0 | 512 KB flash, 48 KB RAM, identical pinout and peripheral complement | Required for feature-rich firmware with OTA update partitioning or large lookup tables | Choose when long-term firmware growth, dual-bank updates, or extensive data logging are needed |
Compared with R5F104GJAFA#V0, the R5F104JJAFA#V0 offers 64 KB more flash for enhanced feature sets without layout change; versus R5F104LJAFA#V0, it reduces flash cost and power during erase/write cycles while retaining full peripheral compatibility for mid-tier designs.
Availability
R5F104JJAFA#V0 is available at Aetrix Electronics and suitable for industrial automation controllers, smart home hubs, and portable medical devices requiring stable component supply across multi-year production cycles.
Supply support for R5F104JJAFA#V0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, and power solutions for automotive, industrial, and IoT markets.
The RL78/G14 product line targets cost-sensitive, ultra-low-power general-purpose embedded applications - balancing performance, energy efficiency, and integration for appliances, sensors, and control panels.
FAQ
What is the operating temperature range for the R5F104JJAFA#V0?
The R5F104JJAFA#V0 is rated for industrial operation from −40°C to +85°C (D-grade). This is confirmed in the ordering information section where the "D" in the part number denotes industrial ambient temperature specification, and matches the electrical characteristics table limits across that range.
Does the R5F104JJAFA#V0 support in-system programming via UART?
Yes, the R5F104JJAFA#V0 supports UART-based bootloader programming using the on-chip flash self-programming library. The device includes dedicated ROM-resident boot swap functionality and flash shield window protection, enabling secure field firmware updates without external debug hardware.
How many UART/LIN interfaces does the R5F104JJAFA#V0 include?
The R5F104JJAFA#V0 integrates three UART channels with LIN bus support, as specified in the "Serial Interfaces" feature list. Pins P13/P14 (TxD2/RxD2), P00/P01 (TxD1/RxD1), and P50/P51 (RxD0/TxD0) are assigned to these UART instances, each capable of LIN physical layer compliance per ISO 17987.
What is the maximum ADC sampling rate achievable on the R5F104JJAFA#V0?
The R5F104JJAFA#V0 ADC achieves up to 650 kSPS maximum conversion rate when configured for 8-bit resolution and using the internal high-speed clock. At full 10-bit resolution, the typical sampling rate is 300 kSPS - verified in the "A/D Converter" section under "Conversion Time" specifications.
Is the R5F104JJAFA#V0 pin-compatible with other RL78/G14 52-pin variants?
Yes, all RL78/G14 52-pin LQFP variants - including R5F104JJAFA#V0, R5F104GJAFA#V0, and R5F104LJAFA#V0 - share identical pinouts, package dimensions (10 × 10 mm, 0.65 mm pitch), and thermal pad configuration, enabling drop-in replacement within the same memory density tier.
R5F104JJAFA#V0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 52-LQFP
- Series:
- RL78/G14
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- RL78
- Core Size:
- 16-Bit
- Speed:
- 32MHz
- Connectivity:
- CSI, I2C, LINbus, UART/USART
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 38
- Program Memory Size:
- 256KB (256K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 24K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.6V ~ 5.5V
- Data Converters:
- A/D 12x8/10b; D/A 2x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F104JJAFA#V0 FAQ
1.How can I place an order for R5F104JJAFA#V0 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F104JJAFA#V0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F104JJAFA#V0 reliable?
The price and inventory of R5F104JJAFA#V0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F104JJAFA#V0 is usually 5 days.
3.What payment methods are accepted for R5F104JJAFA#V0?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F104JJAFA#V0 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F104JJAFA#V0?
R5F104JJAFA#V0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F104JJAFA#V0 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F104JJAFA#V0?
For technical support, including R5F104JJAFA#V0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F104JJAFA#V0 requirements.
6.How does Aetrix verify that R5F104JJAFA#V0 is sourced from the original manufacturer or authorized distributors?
All R5F104JJAFA#V0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F104JJAFA#V0 meets industry standards.
7.What is the process for return or replacement of R5F104JJAFA#V0?
All R5F104JJAFA#V0 units undergo pre-shipment inspection (PSI). If there is an issue with R5F104JJAFA#V0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F104JJAFA#V0 part is unused and in its original packaging.
Return procedure for R5F104JJAFA#V0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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