Renesas R5F104LEGFA#10
- Part No.:
- R5F104LEGFA#10
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
R5F104LEGFA#10.pdf
- Description:
- IC MCU 16BIT 64KB FLASH 64LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:952
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F104LEGFA#10 from Renesas is a 48-pin LQFP-0.65 mm pitch, 512 KB flash, 48 KB RAM RL78/G14 16-bit MCU with ultra-low power consumption (66 μA/MHz active, 0.60 μA RTC+LVD), 1.6–5.5 V operation, and integrated peripherals including 12-channel 10-bit ADC, dual DAC, RTC, and multiple serial interfaces - deployed in industrial motor control and sensor node applications.
For engineers reviewing the R5F104LEGFA#10 datasheet, R5F104LEGFA#10 pinout, R5F104LEGFA#10 application, or R5F104LEGFA#10 equivalent, key selection criteria include its 512 KB code flash capacity, -40°C to +105°C industrial-grade temperature rating (G-suffix), LFQFP-48 package with 0.5 mm pitch, and support for background data flash rewriting (BGO) and event-link controller (ELC) for deterministic peripheral triggering.
Technical Context
The R5F104LEGFA#10 implements the RL78 CPU core with 3-stage pipeline CISC architecture, supporting instruction execution times from 0.03125 µs (32 MHz high-speed mode) to 30.5 µs (32.768 kHz ultra-low-speed mode). It integrates a Data Transfer Controller (DTC) with chain transfer capability and an Event Link Controller (ELC) enabling direct hardware-triggered peripheral activation without CPU intervention.
Its memory subsystem includes 512 KB on-chip flash with 1 KB block erase, 4 KB data flash with 1M-cycle endurance and BGO operation, and 48 KB RAM. Power management features HALT, STOP, and SNOOZE modes, plus on-chip POR and 14-level LVD with interrupt/reset selection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | RL78 16-bit CISC with 3-stage pipeline; enables deterministic real-time response and low-power mixed-mode operation. |
| Flash Memory | 512 KB code flash with 1 KB erase blocks; supports secure boot swapping and flash shield window protection. |
| Data Flash | 4 KB with background operation (BGO); allows concurrent program execution during data rewrite, critical for firmware updates. |
| RAM Size | 48 KB on-chip RAM; sufficient for complex control algorithms and real-time buffering in industrial automation. |
| ADC Resolution | 10-bit SAR ADC with up to 20 channels; provides precision analog sensing across voltage, temperature, and current inputs. |
| Operating Voltage | 1.6 V to 5.5 V single supply; enables direct battery operation (e.g., 3×AA, LiSOCl₂) without external regulators. |
| Temperature Range | -40°C to +105°C (G-grade); qualified for under-hood automotive sensors and factory-floor motor drives. |
| Low-Power Modes | 0.60 μA in STOP mode with RTC + LVD active; extends battery life in always-on monitoring systems beyond 10 years. |
Pinout & Package
Package: 48-pin LFQFP, 7 mm × 7 mm, 0.5 mm pitch, exposed thermal pad (recommended to connect to VSS).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P121 / X1 | Crystal input | Connects to 32.768 kHz tuning-fork crystal for RTC accuracy; requires external load capacitors. |
| P122 / X2 / EXCLK | Crystal output / external clock input | Drives crystal oscillator circuit or accepts external clock source up to 20 MHz for precise timing. |
| RESET | Active-low reset input | Asynchronous reset with internal pull-up; debounced externally for robust power-on and brownout recovery. |
| REGC | Regulator bypass capacitor terminal | Must be connected to VSS via 0.47–1 µF ceramic capacitor to stabilize internal LDO for analog/RTC domains. |
| P14 / RxD2 / SI20 / SDA20 / TRDIOD0 / (SCLA0) | Multi-function I/O | Configurable as UART receive, SPI slave input, I²C data, or LIN transceiver data line - enables flexible interface routing. |
| P60 / SCLA0 | I²C clock output | Dedicated open-drain I²C clock line supporting standard/fast-mode (100/400 kHz) communication with external sensors. |
Key Features
| Feature | Design Value |
|---|---|
| Event Link Controller (ELC) | Links 19–26 peripheral events directly to functions (e.g., ADC trigger on timer match), eliminating CPU polling overhead. |
| Background Operation (BGO) | Enables full CPU execution while rewriting data flash - essential for over-the-air firmware updates without system freeze. |
| Real-Time Clock (RTC) | Calendar function (99-year range), alarm, and clock correction; operates independently in STOP mode at 0.60 μA. |
| Dual 8-bit DAC Outputs | Two independent voltage outputs (0–VDD), each with real-time update capability - suitable for analog actuator control. |
| On-chip Voltage Detector (LVD) | 14 programmable threshold levels (1.6–4.5 V); configurable for interrupt or reset to prevent erratic behavior during brownout. |
| Peripheral I/O Redirection | PIOR0/1 registers allow dynamic remapping of serial, timer, and analog functions to alternate pins - simplifies PCB layout reuse. |
Applications
| Industrial Motor Control | Smart Sensor Node |
|---|---|
|
Use Scenario: Closed-loop BLDC motor drive with current sensing, PWM generation, and thermal monitoring in HVAC blowers. IC Role / Device Role / Timing Role: Main controller executing FOC algorithm, managing 3-phase gate drivers via PWM timers, and sampling 6 ADC channels synchronously. Use Value: 12-channel 10-bit ADC with hardware trigger synchronization ensures precise current sampling; ELC reduces jitter in PWM dead-time insertion. |
Use Scenario: Battery-powered environmental monitor logging temperature, humidity, and CO₂ via I²C sensors and transmitting via UART/LIN. IC Role / Device Role / Timing Role: System-on-chip integrating sensor interface, RTC-timestamped data logging, and low-power wake-up on interrupt or timer. Use Value: 0.60 μA STOP mode with RTC + LVD enables >10-year battery life; BGO allows firmware patching without halting sensor acquisition. |
| Automotive Body Control | Home Appliance UI Controller |
|
Use Scenario: Door module managing window lift, mirror fold, and interior lighting with LIN bus communication to body ECU. IC Role / Device Role / Timing Role: LIN transceiver interface (UART + GPIO), PWM dimming control, and wake-on-LIN frame detection. Use Value: Integrated LIN support (UART with break-detect and sync-field handling) eliminates external transceiver; G-grade temp rating covers under-dash mounting. |
Use Scenario: Front-panel controller for washing machine with touch keys, buzzer feedback, display driver interface, and safety interlock monitoring. IC Role / Device Role / Timing Role: Key interrupt handler, PCLBUZ-driven audio feedback, segment LCD driver interface, and real-time fault detection. Use Value: On-chip key interrupt and buzzer output controller reduce external components; 48 KB RAM buffers UI state and error logs during power loss. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F104LKGFA#30 | Same 512 KB flash, 48 KB RAM, G-grade, but in 64-pin LQFP-0.65 mm package with 20 ADC channels and additional UART/I²C channels. | Required when more I/O, ADC inputs, or serial interfaces are needed - e.g., multi-sensor gateway with dual CAN/LIN. | Select R5F104LKGFA#30 if board layout allows larger footprint and higher peripheral count is mandatory. |
| R5F104LEGLF#30 | Identical flash/RAM/peripherals, but in 48-pin LFQFP-0.5 mm pitch (FB suffix) instead of FA (0.65 mm); same G-grade temp rating. | Used where tighter PCB trace spacing is acceptable and existing 0.5 mm pitch assembly lines are leveraged. | Choose R5F104LEGLF#30 only if manufacturing infrastructure supports 0.5 mm pitch and no redesign for 0.65 mm is feasible. |
Compared with R5F104LKGFA#30 and R5F104LEGLF#30, the R5F104LEGFA#10 offers optimal balance of high memory density, industrial temperature range, and standard 0.65 mm pitch packaging - reducing assembly cost and simplifying layout while retaining full RL78/G14 feature set.
Availability
R5F104LEGFA#10 is available at Aetrix Electronics and suitable for industrial motor control, smart sensor nodes, and automotive body electronics requiring stable component supply, long-term lifecycle assurance, and G-grade reliability.
Supply support for R5F104LEGFA#10 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for industrial, automotive, and IoT markets.
The RL78/G14 product line delivers true low-power 16-bit MCUs optimized for cost-sensitive, energy-constrained applications requiring rich peripheral integration and long operational lifetime - especially in motor control, sensing, and human-machine interface systems.
FAQ
What is the maximum operating frequency and corresponding power consumption of the R5F104LEGFA#10?
The R5F104LEGFA#10 operates up to 32 MHz with a typical active current of 66 μA/MHz at VDD = 3.3 V and TA = 25°C. At full speed, this equates to ~2.1 mA total supply current. Its ultra-low-power STOP mode draws just 0.60 μA when only RTC and LVD remain active - verified per R01DS0053EJ0370 Rev. 3.70 Section 1.1.
Does the R5F104LEGFA#10 support in-system programming and secure firmware updates?
Yes, the R5F104LEGFA#10 supports full in-system programming via on-chip debug interface and includes flash shield window protection to prevent unauthorized readout. It enables secure firmware updates using boot swapping and background data flash rewriting (BGO), allowing uninterrupted operation during field upgrades - confirmed in Section 1.1 "Code Flash Memory" of R01DS0053EJ0370.
What are the key differences between the FA and FB package suffixes for the R5F104LEGFA#10?
The FA suffix denotes 48-pin LFQFP with 0.65 mm pitch, while FB indicates the same pin count in LFQFP with 0.5 mm pitch. Both share identical electrical specs, memory, and peripherals. The R5F104LEGFA#10 uses FA packaging; switching to FB requires PCB redesign due to tighter land pattern and stencil requirements - detailed in Table 1-1 of R01DS0053EJ0370.
Can the R5F104LEGFA#10 drive an LCD directly, and what interface options are available?
The R5F104LEGFA#10 does not integrate a dedicated LCD segment driver. However, it supports software-based static or multiplexed LCD driving using general-purpose I/O pins with precise timing control via its 12-bit interval timer and ELC. For hardware-assisted display control, external drivers (e.g., RA4W1 companion ICs) are recommended - per RL78/G14 peripheral overview in Section 1.1.
Is the R5F104LEGFA#10 qualified for automotive applications, and what AEC-Q200 compliance does it hold?
The R5F104LEGFA#10 carries the 'G' grade (TA = -40°C to +105°C), qualifying it for under-hood and cabin automotive body electronics, but it is not AEC-Q200 certified. Renesas positions RL78/G14 for industrial and consumer automotive-adjacent use cases; for AEC-Q200-compliant alternatives, consider RL78/F14 or RH850 families - as clarified in Renesas ordering information notes (R01DS0053EJ0370 Page 4).
R5F104LEGFA#10 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 64-LQFP
- Series:
- RL78/G14
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RL78
- Core Size:
- 16-Bit
- Speed:
- 32MHz
- Connectivity:
- CSI, I2C, LINbus, UART/USART
- Peripherals:
- LVD, POR, PWM, WDT
- Number of I/O:
- 52
- Program Memory Size:
- 64KB (64K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 4K x 8
- RAM Size:
- 5.5K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.4V ~ 5.5V
- Data Converters:
- A/D 12x8/10b; D/A 2x8b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F104LEGFA#10 FAQ
1.How can I place an order for R5F104LEGFA#10 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F104LEGFA#10 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F104LEGFA#10 reliable?
The price and inventory of R5F104LEGFA#10 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F104LEGFA#10 is usually 5 days.
3.What payment methods are accepted for R5F104LEGFA#10?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F104LEGFA#10 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F104LEGFA#10?
R5F104LEGFA#10 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F104LEGFA#10 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F104LEGFA#10?
For technical support, including R5F104LEGFA#10 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F104LEGFA#10 requirements.
6.How does Aetrix verify that R5F104LEGFA#10 is sourced from the original manufacturer or authorized distributors?
All R5F104LEGFA#10 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F104LEGFA#10 meets industry standards.
7.What is the process for return or replacement of R5F104LEGFA#10?
All R5F104LEGFA#10 units undergo pre-shipment inspection (PSI). If there is an issue with R5F104LEGFA#10, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F104LEGFA#10 part is unused and in its original packaging.
Return procedure for R5F104LEGFA#10:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F104LEGFA#10 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

