Renesas R5F104LGAFA#10
- Part No.:
- R5F104LGAFA#10
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
R5F104LGAFA#10.pdf
- Description:
- IC MCU 16BIT 128KB FLASH 64LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:952
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Product details
Overview
R5F104LGAFA#10 from Renesas is a 64-pin LQFP-0.65mm, 512 KB flash, 8 KB data flash, 20 KB RAM RL78/G14 16-bit microcontroller with ultra-low power consumption (66 μA/MHz active, 0.60 μA RTC+LVD), 32 MHz max CPU speed, and integrated peripherals including 12-channel 10-bit ADC, dual DAC, RTC, and multiple serial interfaces for industrial control and sensor node applications.
For engineers reviewing the R5F104LGAFA#10 datasheet, R5F104LGAFA#10 pinout, R5F104LGAFA#10 application, or R5F104LGAFA#10 equivalent, key selection criteria include its industrial-grade temperature range (−40 to +105°C), LQFP-64 0.65 mm pitch package compatibility, 512 KB code flash with security features, and support for LIN/UART/I²C/CSI interfaces in resource-constrained embedded designs.
Technical Context
The R5F104LGAFA#10 implements the RL78 CPU core with CISC architecture, 3-stage pipeline, and configurable instruction timing (0.03125 µs @ 32 MHz to 30.5 µs @ 32.768 kHz). It integrates a high-accuracy ±1.0% on-chip oscillator (1–64 MHz selectable) and supports HALT/STOP/SNOOZE low-power modes.
Peripheral integration includes an Event Link Controller (ELC) for hardware-triggered peripheral chaining, Data Transfer Controller (DTC) with block/repeat transfer modes, and background operation (BGO) for concurrent code execution during data flash rewriting - enabling deterministic real-time behavior in safety-aware firmware.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | RL78 16-bit CISC CPU with 3-stage pipeline and multiply/divide/accumulate instructions |
| Max Clock Speed | 32 MHz - delivers 44 DMIPS performance for deterministic real-time control loops |
| Flash Memory | 512 KB code flash with 1 KB block erase, security lock, and self-programming with boot swapping |
| Data Flash | 8 KB with 1,000,000 write cycles and background operation (BGO) for zero-interrupt latency updates |
| RAM | 20 KB on-chip SRAM - sufficient for RTOS stacks, communication buffers, and sensor fusion algorithms |
| ADC | 10-bit resolution, 20-channel SAR ADC with internal 1.45 V reference and temperature sensor |
| DAC | Two 8-bit voltage-output DACs (0 V to VDD), supporting real-time analog waveform generation |
| Operating Temp | −40 to +105°C (G-grade industrial) - qualified for under-hood automotive and factory automation environments |
Pinout & Package
Package: 64-pin LQFP, 12 × 12 mm body, 0.65 mm pitch, exposed pad not present (standard LQFP).
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| P00–P01 | General-purpose I/O / UART1 TX/RX | Configurable TTL/CMOS I/O with on-chip pull-up; support asynchronous serial communication at up to 32 MHz baud rate |
| P10–P15 | Multi-function serial interface pins | Support CSI (SPI-like), I²C, and UART across 3 independent channels with programmable pin redirection |
| P16–P17 | Timer I/O / UART0 RX/TX | Hardware timer capture/compare outputs and full-duplex UART0 interface with interrupt-driven operation |
| P20–P27 | Analog input / AVREFP/AVREFM | 20-channel ADC inputs with dedicated analog reference pins enabling ratiometric sensor measurements |
| P30–P31 | Interrupt / RTC / Timer I/O | Support external wake-up interrupts, RTC 1 Hz output, and 16-bit timer capture/compare functions |
| P60–P62 | I²C / SSI / SDAA/SCLA | Dedicated I²C bus (SCLA0/SDAA0) and synchronous serial interface (SSI00) for EEPROM and sensor communication |
| P121–P122 | Crystal oscillator inputs (X1/X2) | Support 32.768 kHz crystal for RTC accuracy and optional main system clock source |
| RESET, REGC, VDD, VSS | Power and reset management | On-chip POR/LVD with 14-level detection; REGC requires 0.47–1 µF capacitor to VSS for stable internal regulator operation |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low power HALT/STOP modes | Reduces current to 0.60 μA (RTC + LVD active), enabling battery life >10 years in metering applications |
| Background data flash rewrite | Enables firmware updates or calibration storage without halting CPU execution - critical for continuous monitoring systems |
| Event Link Controller (ELC) | Eliminates software overhead by directly linking peripheral events (e.g., ADC end-of-conversion → DMA trigger) |
| On-chip debug with SWD | Full real-time debugging via single-wire interface, no dedicated debug pins required - saves PCB space |
| Integrated LIN physical layer support | UART channel configured for LIN 2.2 protocol with automatic sync-break detection and checksum handling |
| Temperature sensor & 1.45 V reference | Enables self-calibration and ambient temperature compensation without external components |
Applications
| Industrial Motor Control | Smart Energy Metering |
|---|---|
Use Scenario: Closed-loop control of BLDC motors in HVAC blowers and pump drives using PWM, current sensing, and thermal monitoring. IC Role / Device Role / Timing Role: Main controller executing FOC algorithm, managing gate drivers via PWM outputs, and sampling current/voltage via 10-bit ADC with hardware averaging. Use Value: 20 KB RAM accommodates motor control library and PID buffers; 512 KB flash stores field-upgradable firmware; 0.60 μA STOP mode enables rapid wake-on-fault response. | Use Scenario: Residential electricity meter with metrology IC interface, tamper detection, LCD display, and IR/RF communication. IC Role / Device Role / Timing Role: System manager coordinating metrology data acquisition, real-time clock logging, secure data storage in data flash, and communication stack execution. Use Value: Integrated RTC with calendar function maintains billing accuracy; BGO allows firmware updates during meter operation; LIN/UART interfaces support utility-side diagnostics. |
| Automotive Body Electronics | IoT Sensor Node Hub |
Use Scenario: Door module controlling window lift, mirror adjustment, and interior lighting with LIN bus connectivity to central ECU. IC Role / Device Role / Timing Role: LIN slave node processing switch inputs, driving DC motors and LEDs, and reporting status over LIN physical layer. Use Value: On-chip LIN support eliminates external transceiver; −40 to +105°C rating meets AEC-Q100 Grade 2 requirements; 64-pin LQFP provides ample I/O for multi-function integration. | Use Scenario: Battery-powered environmental sensor hub aggregating temperature, humidity, and CO₂ readings for smart building HVAC control. IC Role / Device Role / Timing Role: Low-power aggregator reading sensors via I²C/ADC, performing local threshold logic, and transmitting data via UART-to-LoRaWAN bridge. Use Value: 66 μA/MHz active current extends coin-cell life; integrated temperature sensor calibrates external sensors; 8 KB data flash stores calibration coefficients across 1M write cycles. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F104LGAFB#30 | Same core, memory, and peripherals but in 48-pin LFQFP-0.5 mm package; 384 KB flash, 20 KB RAM, 8 KB data flash | Reduced I/O count (48 vs. 64 pins); lacks 4 analog inputs and 2 timer channels present in R5F104LGAFA#10 | Select when board space is constrained and full 64-pin I/O is unnecessary; verify pin mapping for existing layout reuse. |
| R5F104LJGFA#10 | Identical 64-pin LQFP-0.65 mm package and 512 KB flash, but rated for −40 to +85°C (A-grade) and with 16 KB RAM instead of 20 KB | Lower temperature grade limits use in under-hood or high-ambient industrial enclosures; reduced RAM may constrain RTOS footprint | Choose only for cost-sensitive consumer-grade applications where extended temperature range and extra RAM are not required. |
Compared with R5F104LGAFB#30 and R5F104LJGFA#10, the R5F104LGAFA#10 uniquely combines industrial temperature rating, maximum RAM capacity, and full 64-pin I/O in the LQFP-0.65 mm package - making it optimal for new designs requiring long-term reliability and peripheral headroom.
Availability
R5F104LGAFA#10 is available at Aetrix Electronics and suitable for industrial motor control, smart energy metering, automotive body electronics, and IoT sensor node applications requiring stable component supply across extended product lifecycles.
Supply support for R5F104LGAFA#10 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The RL78/G14 family is designed for ultra-low-power general-purpose embedded control - balancing performance, integration, and energy efficiency in cost-sensitive industrial and consumer applications.
FAQ
What is the operating temperature range for the R5F104LGAFA#10?
The R5F104LGAFA#10 is rated for −40 to +105°C (G-grade industrial), validated per Renesas specification R01DS0053EJ0370. This extended range supports deployment in demanding environments such as factory automation controllers, automotive under-hood modules, and outdoor energy infrastructure where thermal stability is critical. The device maintains full functionality-including ADC accuracy, flash programming, and real-time clock operation-across this entire span.
Does the R5F104LGAFA#10 support LIN bus communication?
Yes, the R5F104LGAFA#10 supports LIN 2.2 protocol through its UART peripheral, with hardware-assisted features including automatic sync-break detection, checksum generation/verification, and configurable baud rates down to 1.2 kbps. No external LIN transceiver is required for basic slave-node operation, though a compliant physical layer IC (e.g., TJA1020) is needed for bus termination and ESD protection in production systems.
How much RAM is available for user application code on the R5F104LGAFA#10?
The R5F104LGAFA#10 provides 20 KB of on-chip RAM, all accessible for user application code, stack, heap, and peripheral buffers. This includes space reserved for the flash self-programming library (starting at address F3F00H), which uses a fixed 256-byte region. Engineers can allocate the remaining ~19.75 KB for RTOS tasks, communication stacks, or sensor fusion algorithms without external memory dependency.
What debug interface does the R5F104LGAFA#10 use?
The R5F104LGAFA#10 uses Renesas' Single-Wire Debug (SWD) interface via the RESET pin, requiring only one physical signal plus VDD and VSS for full JTAG-equivalent debugging. This eliminates dedicated debug pins, preserving I/O for application use. SWD supports real-time breakpoints, register inspection, flash programming, and live variable monitoring using E2 studio or CS+ IDE with compatible debug probes (e.g., E2 Lite or Segger J-Link).
Can the R5F104LGAFA#10 operate from a single 1.8 V supply?
Yes, the R5F104LGAFA#10 operates from a single supply ranging from 1.6 V to 5.5 V, fully functional at 1.8 V. At this voltage, the maximum CPU frequency is 16 MHz (per electrical characteristics table), and all peripherals-including 10-bit ADC, DAC, and serial interfaces-remain operational. The on-chip voltage detector (LVD) supports 14 programmable threshold levels, enabling precise brown-out detection down to 1.6 V.
R5F104LGAFA#10 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 64-LQFP
- Series:
- RL78/G14
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- RL78
- Core Size:
- 16-Bit
- Speed:
- 32MHz
- Connectivity:
- CSI, I2C, LINbus, UART/USART
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 48
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 16K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.6V ~ 5.5V
- Data Converters:
- A/D 12x8/10b; D/A 2x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F104LGAFA#10 FAQ
1.How can I place an order for R5F104LGAFA#10 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F104LGAFA#10 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F104LGAFA#10 reliable?
The price and inventory of R5F104LGAFA#10 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F104LGAFA#10 is usually 5 days.
3.What payment methods are accepted for R5F104LGAFA#10?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F104LGAFA#10 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F104LGAFA#10?
R5F104LGAFA#10 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F104LGAFA#10 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F104LGAFA#10?
For technical support, including R5F104LGAFA#10 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F104LGAFA#10 requirements.
6.How does Aetrix verify that R5F104LGAFA#10 is sourced from the original manufacturer or authorized distributors?
All R5F104LGAFA#10 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F104LGAFA#10 meets industry standards.
7.What is the process for return or replacement of R5F104LGAFA#10?
All R5F104LGAFA#10 units undergo pre-shipment inspection (PSI). If there is an issue with R5F104LGAFA#10, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F104LGAFA#10 part is unused and in its original packaging.
Return procedure for R5F104LGAFA#10:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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