Renesas R5F104LJAFA#70
- Part No.:
- R5F104LJAFA#70
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
R5F104LJAFA#70.pdf
- Description:
- 16-BIT GENERAL MCU RL78/G14 256K
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
R5F104LJAFA#70 from Renesas Electronics is a 64-pin LQFP-0.65mm-pitch 16-bit RL78/G14 microcontroller with 192 KB flash, 20 KB RAM, and 8 KB data flash, operating from 1.6 V to 5.5 V at up to 32 MHz (44 DMIPS), featuring ultra-low-power HALT/STOP/SNOOZE modes, integrated RTC, 12-bit A/D converter (20-channel), and UART/I²C/CSI interfaces for industrial control and sensor node applications.
For engineers reviewing the R5F104LJAFA#70 datasheet, R5F104LJAFA#70 pinout, R5F104LJAFA#70 application, or R5F104LJAFA#70 equivalent, key selection criteria include its -40°C to +85°C industrial-grade temperature range (D-grade), 64-pin LQFP package with 0.65 mm pitch, 192 KB code flash with self-programming and security lock, and peripheral integration including Event Link Controller (ELC) and Data Transfer Controller (DTC) for deterministic real-time response.
Technical Context
The R5F104LJAFA#70 implements the RL78 CPU core with CISC architecture, 3-stage pipeline, and configurable instruction timing (0.03125 µs min @ 32 MHz to 30.5 µs @ 32.768 kHz). It integrates a high-accuracy ±1.0% on-chip oscillator (selectable 1–64 MHz), hardware DTC for zero-CPU-load memory transfers, and ELC for direct peripheral event chaining without CPU intervention.
Its analog subsystem includes an 8/10-bit A/D converter with internal 1.45 V reference and temperature sensor, dual 8-bit D/A outputs (0–VDD), and up to two comparators with window mode and selectable internal/external reference. Power management supports HALT (66 µA/MHz), STOP (0.60 µA), and SNOOZE modes for battery-sensitive deployments.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | RL78 16-bit CISC CPU with 3-stage pipeline and 1 MB address space |
| Max Clock Speed | 32 MHz (44 DMIPS); high-accuracy ±1.0% on-chip oscillator supports 1–64 MHz selection |
| Memory | 192 KB code flash (1 KB block size, security lock), 20 KB RAM, 8 KB data flash (1M rewrite cycles, BGO support) |
| Operating Voltage | 1.6 V to 5.5 V - enables direct interface with 1.8 V, 2.5 V, 3.3 V, and 5 V logic domains |
| Temperature Range | -40°C to +85°C (D-grade industrial qualification per ordering code) |
| Analog Peripherals | 20-channel 8/10-bit A/D converter (VDD-referenced), two 8-bit D/A outputs (0–VDD), two comparators with window mode |
| Low-Power Modes | HALT (66 µA/MHz), STOP (0.60 µA with RTC+LVD active), SNOOZE (peripheral-triggered wake-up without CPU restart) |
Pinout & Package
Package: 64-pin LQFP, 12 × 12 mm body, 0.65 mm pitch, lead-free, RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P121/X1 | Crystal input | Connects to low-frequency crystal (32.768 kHz) for RTC and low-power clock source |
| P122/X2/EXCLK | Crystal output / external clock input | Drives external crystal; alternatively accepts external clock signal up to 20 MHz |
| RESET | Active-low reset input | Asynchronous reset with internal pull-up; compatible with external reset ICs or manual push-button |
| VDD / VSS | Power supply / ground | Dual VDD/VSS pairs ensure stable core and I/O rail decoupling; REGC capacitor required (0.47–1 µF) |
| P60/SCLA0, P61/SDAA0 | I²C bus interface | Hardware I²C master/slave channel 0 with programmable clock stretching and arbitration |
| P10–P15 | Multi-function serial interface pins | Configurable CSI (SPI-compatible), UART, LIN, and I²C functions via peripheral I/O redirection registers |
Key Features
| Feature | Design Value |
|---|---|
| Event Link Controller (ELC) | Links 19–26 peripheral events directly (e.g., timer overflow → ADC trigger → DTC transfer) without CPU latency or ISR overhead |
| Data Transfer Controller (DTC) | Performs memory-to-peripheral, peripheral-to-memory, and memory-to-memory transfers autonomously during HALT/STOP modes |
| Real-Time Clock (RTC) | Full calendar (99-year range), alarm, periodic interrupt, and auto clock correction - operates in STOP mode at 0.60 µA |
| Flash Security | Block-wise erase/write prohibition and flash shield window prevent unauthorized read/write access to code and data flash |
| Low-Voltage Detection (LVD) | 14-level programmable threshold with interrupt or reset output - ensures safe brown-out response across full 1.6–5.5 V range |
Applications
| Industrial Motor Control | Smart Sensor Node |
|---|---|
|
Use Scenario: Brushless DC motor commutation with current sensing, thermal monitoring, and field-oriented control loop execution. IC Role / Device Role / Timing Role: Main system controller executing real-time PWM generation (via TAU timers), ADC sampling (20-channel, 10-bit), and closed-loop computation at ≤100 µs intervals. Use Value: SNOOZE mode enables background ADC acquisition while CPU sleeps; ELC synchronizes timer triggers with ADC start and DTC moves results to RAM - reducing jitter and CPU load by >40%. |
Use Scenario: Battery-powered environmental sensor hub collecting temperature, humidity, and CO₂ via I²C sensors and transmitting over UART/LIN to gateway. IC Role / Device Role / Timing Role: Low-power system manager handling sensor polling, RTC-timed wake-ups, data aggregation, and serial protocol framing. Use Value: STOP mode draws only 0.60 µA while maintaining RTC and LVD; 8 KB data flash stores calibration coefficients and logs with 1M-cycle endurance - enabling 10+ year field deployment. |
| Home Appliance UI | PLC I/O Module |
|
Use Scenario: Touch-button interface and LED display driver for washing machine control panel with buzzer feedback and power fault detection. IC Role / Device Role / Timing Role: Dedicated UI controller managing capacitive touch scan, 8-bit D/A-driven buzzer tone, and segmented LED drive via GPIO/PCLBUZ. Use Value: On-chip key interrupt detects button press in STOP mode; built-in buzzer output controller eliminates external driver; LVD interrupts on brown-out prevent erratic UI behavior. |
Use Scenario: DIN-rail mounted digital input/output expansion module for industrial PLCs, supporting 16-channel opto-isolated inputs and 8-channel relay drivers. IC Role / Device Role / Timing Role: Deterministic I/O processor handling high-speed edge detection (INTP0–INTP9), pulse-width measurement, and isolated communication via UART with error-checking. Use Value: DTC offloads input status polling to hardware; ELC chains external interrupt → timer capture → memory store - achieving <1 µs input-to-register latency independent of CPU load. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 16-bit microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F104LGAFA#70 | Same 64-pin LQFP-0.65mm package, but 128 KB flash / 16 KB RAM / 8 KB data flash | Lower memory footprint suits simpler control tasks (e.g., basic timer-based sequencers) where 192 KB is unnecessary | Select when firmware size remains under 120 KB and cost optimization is prioritized without sacrificing package or peripheral compatibility |
| R5F104LKAFA#70 | Same 64-pin LQFP-0.65mm package, but 256 KB flash / 24 KB RAM / 8 KB data flash | Higher memory headroom supports larger RTOS images, OTA update partitions, or complex communication stacks (e.g., Modbus TCP with TLS) | Select when future firmware growth, dual-bank flashing, or enhanced data logging (e.g., extended waveform capture) is required |
Compared with R5F104LGAFA#70 and R5F104LKAFA#70, the R5F104LJAFA#70 delivers optimal balance of flash capacity (192 KB), RAM (20 KB), and industrial temperature rating in the same LQFP-64 package - making it ideal for mid-complexity control applications requiring field-proven reliability without over-provisioning memory resources.
Availability
R5F104LJAFA#70 is available at Aetrix Electronics and suitable for industrial motor control, smart sensor nodes, home appliance UIs, and PLC I/O modules requiring stable component supply, long-term lifecycle support, and RoHS-compliant manufacturing.
Supply support for R5F104LJAFA#70 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The RL78/G14 product line delivers true low-power 16-bit MCUs optimized for cost-sensitive industrial and consumer equipment, combining energy efficiency (66 µA/MHz), rich analog integration, and robust real-time peripherals for deterministic control.
FAQ
What is the maximum operating frequency and corresponding performance of the R5F104LJAFA#70?
The R5F104LJAFA#70 operates at up to 32 MHz with a peak performance of 44 DMIPS. Its high-accuracy on-chip oscillator maintains ±1.0% stability across 1.8–5.5 V and -20°C to +85°C, eliminating need for external crystals in many timing-critical applications. The RL78 core achieves this with a 3-stage pipeline and optimized instruction set including multiply/divide operations.
Does the R5F104LJAFA#70 support in-system programming and secure firmware updates?
Yes, the R5F104LJAFA#70 supports full in-system programming via on-chip debug interface and boot swapping. Its flash shield window and block-wise erase/write prohibition enable secure firmware updates - preventing unauthorized access to code flash during field upgrades. Self-programming is supported at VDD = 1.8–5.5 V with background operation for data flash writes.
What low-power modes are available on the R5F104LJAFA#70, and what is the lowest current draw?
The R5F104LJAFA#70 offers HALT (66 µA/MHz), STOP (0.60 µA), and SNOOZE modes. In STOP mode with only RTC and LVD active, it draws just 0.60 µA - verified across -40°C to +85°C. Wake-up sources include external interrupts, RTC alarms, and peripheral events routed via ELC, enabling rapid resumption without full CPU restart.
How many analog-to-digital converter channels does the R5F104LJAFA#70 provide, and what resolution options are supported?
The R5F104LJAFA#70 integrates an 8/10-bit successive-approximation A/D converter with up to 20 input channels. Resolution is software-selectable per conversion, and the converter operates across the full 1.6–5.5 V supply range. It includes internal 1.45 V reference and on-die temperature sensor - enabling accurate sensor readings without external references.
Is the R5F104LJAFA#70 pin-compatible with other RL78/G14 variants in the same package?
Yes, all RL78/G14 devices in the 64-pin LQFP-0.65mm package (e.g., R5F104LGAFA#70, R5F104LKAFA#70, R5F104LJAFA#70) share identical pinouts and electrical characteristics. Firmware and PCB designs are interchangeable across these variants - allowing seamless memory scaling (128 KB → 192 KB → 256 KB) without layout changes or signal re-routing.
R5F104LJAFA#70 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 64-LQFP
- Series:
- RL78/G14
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RL78
- Core Size:
- 16-Bit
- Speed:
- 32MHz
- Connectivity:
- CSI, I2C, LINbus, UART/USART
- Peripherals:
- LVD, POR, PWM, WDT
- Number of I/O:
- 52
- Program Memory Size:
- 256KB (256K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 24K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.6V ~ 5.5V
- Data Converters:
- A/D 12x8/10b; D/A 2x8b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F104LJAFA#70 FAQ
1.How can I place an order for R5F104LJAFA#70 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F104LJAFA#70 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F104LJAFA#70 reliable?
The price and inventory of R5F104LJAFA#70 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F104LJAFA#70 is usually 5 days.
3.What payment methods are accepted for R5F104LJAFA#70?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F104LJAFA#70 transactions.
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4.How is shipping managed for R5F104LJAFA#70?
R5F104LJAFA#70 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F104LJAFA#70 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F104LJAFA#70?
For technical support, including R5F104LJAFA#70 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F104LJAFA#70 requirements.
6.How does Aetrix verify that R5F104LJAFA#70 is sourced from the original manufacturer or authorized distributors?
All R5F104LJAFA#70 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F104LJAFA#70 meets industry standards.
7.What is the process for return or replacement of R5F104LJAFA#70?
All R5F104LJAFA#70 units undergo pre-shipment inspection (PSI). If there is an issue with R5F104LJAFA#70, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F104LJAFA#70 part is unused and in its original packaging.
Return procedure for R5F104LJAFA#70:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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