Renesas R5F104MFAFA#10
- Part No.:
- R5F104MFAFA#10
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 80-LQFP
- Datasheet:
-
R5F104MFAFA#10.pdf
- Description:
- IC MCU 16BIT 96KB FLASH 80LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:720
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Product details
Overview
R5F104MFAFA#10 from Renesas is a 80-pin LQFP-0.65mm MCU in the RL78/G14 family, featuring 96 KB flash, 12 KB RAM, and 1.6–5.5 V operation. It delivers 44 DMIPS at 32 MHz, integrates 10-bit ADC (16 ch), UART/SCI/I²C interfaces (4×), and real-time clock with calendar support - deployed in industrial motor control and sensor node firmware.
For engineers reviewing the R5F104MFAFA#10 datasheet, R5F104MFAFA#10 pinout, R5F104MFAFA#10 application, or R5F104MFAFA#10 equivalent, key selection criteria include its -40°C to +85°C industrial temperature grade (D-grade), 80-pin LQFP package with 0.65 mm pitch, and integrated DTC/ELC peripherals enabling deterministic low-latency peripheral chaining without CPU intervention.
Technical Context
The R5F104MFAFA#10 implements the RL78 CPU core with 3-stage pipeline CISC architecture, supporting instruction execution times from 0.03125 µs (32 MHz high-speed mode) to 30.5 µs (32.768 kHz ultra-low-power mode). It includes on-chip debug, self-programming flash with boot swapping, and background data flash rewriting (BGO).
Its power management features HALT, STOP, and SNOOZE modes, achieving 66 μA/MHz active current and 0.60 μA RTC+LVD retention. The ELC links 19–26 event sources to peripherals, while the DTC supports block, repeat, and chain transfers triggered by interrupts - critical for deterministic sensor data acquisition and actuator control loops.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | RL78 16-bit CISC CPU with 3-stage pipeline, 44 DMIPS @ 32 MHz |
| Flash / Data Flash | 96 KB code flash (1 KB blocks), 4 KB data flash with 1M rewrite cycles and BGO support |
| RAM | 12 KB on-chip SRAM, including dedicated areas for flash library operations |
| ADC | 10-bit resolution, 16-channel analog input, internal 1.45 V reference and temperature sensor |
| Timers | 12× 16-bit timers (TAU/Timer RJ/RD/RG), 1× 12-bit interval timer, 1× RTC with calendar/alarm |
| Serial Interfaces | 4× UART/SCI (LIN-capable), 4× I²C/simplified I²C, 3–8× CSI (SPI-compatible) |
| Supply & Temp | 1.6–5.5 V single supply; industrial grade (-40°C to +85°C, D-field application) |
Pinout & Package
Package: 80-pin LQFP, 14 × 14 mm body, 0.65 mm pitch, exposed pad not present (non-HWQFN).
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| P00–P01 | General-purpose I/O / UART1 TX/RX | Primary serial interface for host communication; TTL/CMOS compatible, configurable pull-up |
| P10–P15 | Multi-function serial I/O (CSI1, I²C1, UART2) | Shared pins for SPI-like CSI, I²C, and UART2 - requires PIOR register configuration for function assignment |
| P30–P31 | RTC interrupt / Timer I/O / Key interrupt | Supports RTC 1 Hz output, external trigger input, and capacitive touch sensing via KR inputs |
| P60–P61 | I²C bus interface (SCLA0/SDAA0) | Dedicated hardware I²C master/slave with clock stretching and arbitration; no software bit-banging required |
| P121–P122 | Crystal oscillator inputs (X1/X2) | Supports 32.768 kHz crystal for RTC accuracy or external 1–20 MHz clock source |
| RESET / REGC / VDD / VSS | Reset control / Regulator bypass / Power rails | REGC requires 0.47–1 µF capacitor to VSS; RESET is active-low, Schmitt-triggered, with internal pull-up |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low power modes | HALT (66 μA/MHz), STOP (0.60 μA w/ RTC+LVD), SNOOZE (peripheral wake-up without CPU restart) |
| Data Flash BGO | Execute code from flash while rewriting 4 KB data flash - enables seamless firmware parameter updates |
| Event Link Controller (ELC) | Hardware routing of 19–26 peripheral events (e.g., ADC end-of-conversion → DMA trigger) without CPU overhead |
| On-chip debug & security | Fully compliant with Renesas E2 emulator; flash block erase/write prohibition prevents unauthorized firmware access |
| Peripheral I/O redirection | PIOR0/PIOR1 registers remap up to 16 functions across 32 pins - simplifies PCB layout and pin conflict resolution |
Applications
| Industrial Motor Control | Smart Sensor Node |
|---|---|
Use Scenario: Closed-loop BLDC motor drive with current sensing, PWM generation, and thermal monitoring. IC Role / Device Role / Timing Role: Main controller executing FOC algorithm, generating complementary 16-bit PWM outputs, sampling ADC channels synchronously with timer triggers. Use Value: Integrated 16-bit TAU timers with dead-time insertion and 10-bit ADC with hardware averaging reduce external component count and improve current-sensing accuracy. |
Use Scenario: Battery-powered environmental sensor hub collecting temperature, humidity, and CO₂ via I²C sensors and transmitting via UART to gateway. IC Role / Device Role / Timing Role: System-on-chip managing sensor polling, RTC-based wakeup scheduling, low-power sleep transitions, and UART packet framing. Use Value: 0.60 μA STOP mode with RTC alarm enables multi-day battery life; BGO allows logging sensor data to data flash during active measurement without interrupting acquisition. |
| Home Appliance UI | Industrial PLC I/O Module |
Use Scenario: Touch-sensitive front panel for washing machine with LED indicators, buzzer feedback, and button debounce. IC Role / Device Role / Timing Role: Dedicated UI controller handling capacitive touch (KR inputs), PCLBUZ0/1 for audible alerts, and GPIO-driven LED drivers. Use Value: On-chip key interrupt and programmable buzzer output eliminate external touch controller ICs and driver transistors. |
Use Scenario: DIN-rail mounted digital I/O expansion module with isolated inputs and relay drivers, communicating via Modbus RTU over RS-485. IC Role / Device Role / Timing Role: Protocol engine and I/O manager - parsing Modbus frames via UART, scanning discrete inputs, and updating relay states with precise timing. Use Value: ELC links UART receive interrupt to DTC transfer, enabling zero-CPU-cycle frame reception; multiple UARTs support dual-port RS-485 and debug console simultaneously. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F104MGAFB#30 | Same 96 KB flash/12 KB RAM, but 48-pin LFQFP (0.5 mm pitch), lower I/O count (38 vs 64), no KR inputs | Suitable for space-constrained designs where full 80-pin I/O and capacitive touch are unnecessary | Select when board area is critical and peripheral count fits within 48-pin footprint |
| R5F104LEAFA#10 | 64-pin LQFP-0.65mm, identical memory (96 KB/12 KB), same D-grade temp, but fewer serial interfaces (3× UART vs 4×) | Targeted at cost-optimized industrial control with reduced communication channel requirements | Choose when 64-pin layout suffices and one UART channel can be omitted |
Compared with R5F104MFAFA#10, R5F104MGAFB#30 trades I/O scalability and capacitive touch capability for compact packaging, while R5F104LEAFA#10 retains full feature parity except for one UART channel and uses a smaller 64-pin footprint - both serve distinct mechanical and interface constraints without compromising core RL78/G14 functionality.
Availability
R5F104MFAFA#10 is available at Aetrix Electronics and suitable for industrial motor control, smart sensor nodes, home appliance UIs, and PLC I/O modules requiring stable component supply, long-term lifecycle assurance, and automotive-grade traceability.
Supply support for R5F104MFAFA#10 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, and power solutions for industrial, automotive, and IoT markets.
The RL78/G14 product line targets cost-sensitive, ultra-low-power general-purpose embedded systems - balancing performance, integration, and energy efficiency for industrial controls and consumer appliances.
FAQ
What is the operating temperature range for the R5F104MFAFA#10?
The R5F104MFAFA#10 is rated for industrial applications with an ambient operating temperature range of -40°C to +85°C (D-field grade). This specification is validated across all electrical parameters in the datasheet and applies to the full 96 KB flash/12 KB RAM configuration in the 80-pin LQFP package.
Does the R5F104MFAFA#10 support in-circuit debugging?
Yes, the R5F104MFAFA#10 supports full on-chip debugging via Renesas E2/E2 Lite emulators using the standard SWD interface. Debug features include real-time variable watch, breakpoint setting, and flash programming - all accessible through the dedicated TOOL0/TOOLRxD/TOOLTxD pins.
How many UART interfaces does the R5F104MFAFA#10 include?
The R5F104MFAFA#10 integrates four UART/SCI modules, each supporting LIN bus protocol. These are mapped across multiple pin groups (e.g., UART0 on P50/P51, UART1 on P00/P01, UART2 on P13/P14, UART3 on P15/P16), enabling concurrent communication with multiple peripherals.
What is the maximum ADC sampling rate achievable on the R5F104MFAFA#10?
The R5F104MFAFA#10 ADC achieves a maximum conversion time of 1.2 μs per sample (up to 833 kSPS) in high-speed mode with internal clock. Actual sustained throughput depends on trigger source and result storage method - using DTC to auto-store results to RAM enables continuous streaming without CPU intervention.
Is the R5F104MFAFA#10 pin-compatible with other RL78/G14 variants?
No - the R5F104MFAFA#10 is an 80-pin LQFP device and is not pin-compatible with smaller-package RL78/G14 variants (e.g., 48-pin or 64-pin). Pin compatibility exists only within the same pin-count family (e.g., R5F104MGAFA#10 shares the same 80-pin LQFP footprint but differs in flash/RAM size).
R5F104MFAFA#10 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 80-LQFP
- Series:
- RL78/G14
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- RL78
- Core Size:
- 16-Bit
- Speed:
- 32MHz
- Connectivity:
- CSI, I2C, LINbus, UART/USART
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 64
- Program Memory Size:
- 96KB (96K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 12K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.6V ~ 5.5V
- Data Converters:
- A/D 17x8/10b; D/A 2x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F104MFAFA#10 FAQ
1.How can I place an order for R5F104MFAFA#10 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F104MFAFA#10 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F104MFAFA#10 reliable?
The price and inventory of R5F104MFAFA#10 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F104MFAFA#10 is usually 5 days.
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R5F104MFAFA#10 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F104MFAFA#10 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F104MFAFA#10?
For technical support, including R5F104MFAFA#10 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F104MFAFA#10 requirements.
6.How does Aetrix verify that R5F104MFAFA#10 is sourced from the original manufacturer or authorized distributors?
All R5F104MFAFA#10 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F104MFAFA#10 meets industry standards.
7.What is the process for return or replacement of R5F104MFAFA#10?
All R5F104MFAFA#10 units undergo pre-shipment inspection (PSI). If there is an issue with R5F104MFAFA#10, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F104MFAFA#10 part is unused and in its original packaging.
Return procedure for R5F104MFAFA#10:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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