Renesas R5F104PGGFB#10
- Part No.:
- R5F104PGGFB#10
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
R5F104PGGFB#10.pdf
- Description:
- IC MCU 16BIT 128KB FLSH 100LFQFP
- Quantity:
- Payment:

- Shipping:

Inventory:1,440
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Product details
Overview
R5F104PGGFB#10 from Renesas Electronics is a 48-pin LFQFP-packaged 16-bit RL78/G14 microcontroller with 96 KB flash, 12 KB RAM, and industrial-grade temperature support (−40°C to +105°C). It delivers 44 DMIPS at 32 MHz, features ultra-low-power operation (66 μA/MHz active, 0.60 μA in RTC+LVD mode), and integrates dual UART, I²C, SPI, 12-channel 10-bit ADC, RTC, and on-chip debug - deployed in motor control and sensor interface modules.
For engineers reviewing the R5F104PGGFB#10 datasheet, R5F104PGGFB#10 pinout, R5F104PGGFB#10 application, or R5F104PGGFB#10 equivalent, key selection criteria include its G-grade industrial temp rating, 48-pin 0.5 mm pitch LFQFP package, integrated event link controller (ELC) for peripheral coordination, and support for background data flash rewriting without CPU stall.
Technical Context
The R5F104PGGFB#10 implements the RL78 CPU core with 3-stage pipeline CISC architecture, supporting instruction execution times from 0.03125 µs (32 MHz high-speed mode) to 30.5 µs (32.768 kHz ultra-low-speed mode). It includes multiply/divide/accumulate instructions and a 1 MB address space.
Its peripheral set is coordinated via Event Link Controller (ELC), enabling direct hardware-triggered transfers between 19–26 event sources and peripherals without CPU intervention. The Data Transfer Controller (DTC) supports normal, repeat, and block transfer modes with chain transfer capability.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | RL78 16-bit CISC with 3-stage pipeline; enables deterministic real-time response and low-energy per instruction. |
| Max Operating Frequency | 32 MHz; delivers 44 DMIPS performance while maintaining sub-100 μA/MHz power efficiency. |
| Flash Memory | 96 KB code flash (1 KB block size); supports self-programming, boot swapping, and flash shield window security. |
| Data Flash | 8 KB; supports background operation (BGO), 1M rewrite cycles, and VDD = 1.8–5.5 V reprogramming. |
| ADC | 10-bit resolution, 12-channel analog input; includes internal 1.45 V reference and temperature sensor for embedded sensing. |
| Operating Voltage | 1.6 V to 5.5 V single supply; allows direct interfacing with 1.8 V, 2.5 V, and 3.3 V logic domains. |
| Temperature Range | −40°C to +105°C (G-grade); qualified for industrial motor drives and HVAC control environments. |
Pinout & Package
Package: 48-pin LFQFP, 7 mm × 7 mm, 0.5 mm pitch, exposed pad not present (distinct from HWQFN variants).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P121 / X1 | Crystal oscillator input | Connects to 32.768 kHz tuning-fork crystal for RTC timing; enables calendar-mode operation with ±20 ppm accuracy. |
| P122 / X2 / EXCLK | Crystal oscillator output / external clock input | Drives external crystal; alternatively accepts external clock up to 20 MHz for system clock source flexibility. |
| P30 / INTP3 / RTC1HZ / SCK00 / SCL00 / TRJO0 | Multi-function I/O | Configurable as RTC 1 Hz output, I²C/SPI clock, or JTAG reset; enables low-pin-count debugging and timekeeping signals. |
| P16 / TI01 / TO01 / INTP5 / TRDIOC0 / IVREF0 | Timer/Interrupt/Reference I/O | Supports input capture (TI01), PWM output (TO01), interrupt triggering (INTP5), and internal voltage reference routing (IVREF0). |
| REGC | Regulator bypass capacitor terminal | Requires 0.47–1 µF capacitor to VSS; stabilizes internal LDO for consistent low-power operation across voltage/temp range. |
Key Features
| Feature | Design Value |
|---|---|
| SNOOZE mode | Permits selective peripheral wake-up (e.g., UART RX, ADC trigger) while CPU remains halted - reduces average system power in polling-based protocols. |
| Event Link Controller (ELC) | Hardware-level linkage of 19–26 event sources (e.g., timer overflow, ADC end-of-conversion) to peripherals - eliminates software latency in sensor-to-actuator chains. |
| Background Data Flash Rewrite (BGO) | Enables full CPU execution from program memory during 8 KB data flash erase/write - critical for over-the-air firmware updates without service interruption. |
| Dual UART with LIN support | Two independent UART channels with built-in LIN bus protocol handling (break detection, sync field, checksum) - simplifies automotive body electronics integration. |
| On-chip voltage detector (LVD) | 14-level programmable reset/interrupt threshold (1.6–4.2 V); provides fail-safe brown-out protection for battery-powered industrial sensors. |
Applications
| Motor Control Interface | Industrial Sensor Hub |
|---|---|
|
Use Scenario: Compact BLDC motor driver board requiring commutation timing, current sensing, and UART telemetry. IC Role / Device Role / Timing Role: Main controller executing FOC algorithms, sampling 12-channel ADC for phase currents/voltage, generating PWM via TAU timers, and reporting status via LIN-capable UART. Use Value: Integrated ELC synchronizes ADC sampling with PWM zero-crossing events; SNOOZE mode extends battery life during idle periods without sacrificing real-time responsiveness. |
Use Scenario: Multi-sensor environmental node (temperature, humidity, CO₂) with local calibration and wireless gateway interface. IC Role / Device Role / Timing Role: Central acquisition unit managing I²C sensor reads, RTC-stamped logging to data flash, and UART-to-LoRaWAN bridge communication. Use Value: Background data flash writes preserve sensor history during active transmission; 10-bit ADC with internal reference ensures stable readings across 1.6–5.5 V supply variation. |
| Smart HVAC Actuator | Programmable Power Supply Monitor |
|
Use Scenario: Thermostat-controlled damper actuator with position feedback, thermal protection, and building management system (BMS) connectivity. IC Role / Device Role / Timing Role: Real-time actuator controller using TO01/TO02 for bidirectional motor drive, ANI0–ANI3 for thermistor inputs, and UART for BACnet MS/TP framing. Use Value: G-grade −40°C to +105°C operation ensures reliability inside hot ductwork; LVD with 14 thresholds enables precise brown-out recovery at varying line voltages. |
Use Scenario: DIN-rail mounted AC/DC PSU monitoring module tracking output voltage/current/temperature with fault logging. IC Role / Device Role / Timing Role: Dedicated supervisor IC performing periodic ADC measurements, RTC-timestamped fault storage in data flash, and isolated UART alert transmission. Use Value: 8 KB data flash with 1M rewrite cycles supports 10+ years of timestamped fault logs; HALT/STOP modes reduce standby consumption to <1 µA. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 16-bit microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F104LGGB#10 | 512 KB flash, 48 KB RAM, same 48-pin LFQFP package and G-grade temp range. | Targets feature-rich designs requiring larger firmware image (e.g., USB stack, OTA bootloader) and extended data buffering. | Select when firmware growth exceeds 96 KB or additional RAM is needed for complex state machines or communication buffers. |
| R5F104PGGFB#30 | Identical electrical and functional specification; differs only in packaging specification (#30 = embossed tape vs. #10 = tray). | No functional or application difference; used interchangeably in production where tape-and-reel feeding is required. | Choose #30 for automated SMT lines; #10 for manual prototyping or low-volume assembly. |
Compared with R5F104LGGB#10, the R5F104PGGFB#10 offers optimized cost and footprint for fixed-function industrial control, while R5F104PGGFB#30 provides identical silicon in tape format for high-throughput manufacturing - both retain full ELC, BGO, and G-grade qualification.
Availability
R5F104PGGFB#10 is available at Aetrix Electronics and suitable for motor control interfaces, industrial sensor hubs, smart HVAC actuators, and programmable power supply monitors requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for R5F104PGGFB#10 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, and power management solutions for industrial, automotive, and IoT applications.
The RL78/G14 family targets cost-sensitive, ultra-low-power general-purpose embedded systems - balancing performance, peripheral richness, and energy efficiency for industrial controls and sensor nodes.
FAQ
What is the maximum operating frequency and corresponding DMIPS rating for the R5F104PGGFB#10?
The R5F104PGGFB#10 operates at up to 32 MHz and delivers 44 DMIPS performance. This metric is measured under standard conditions (VDD = 3.3 V, TA = 25°C) using the EEMBC CoreMark benchmark and reflects real-world throughput for mixed computational and I/O workloads in the RL78/G14 architecture.
Does the R5F104PGGFB#10 support background data flash rewriting while executing code from main flash?
Yes, the R5F104PGGFB#10 supports background operation (BGO) for its 8 KB data flash memory. During BGO, the CPU can execute instructions from program flash while simultaneously erasing or writing data flash - enabling seamless firmware updates and non-volatile parameter storage without system interruption.
What is the industrial temperature grade of the R5F104PGGFB#10, and how is it indicated in the part number?
The R5F104PGGFB#10 is rated for −40°C to +105°C operation (G-grade), confirmed by the seventh character 'G' in the part number R5F104PGGFB#10. This grade qualifies the device for deployment in demanding industrial environments such as motor drives, power supplies, and factory automation equipment.
Which communication interfaces with LIN bus support are integrated into the R5F104PGGFB#10?
The R5F104PGGFB#10 integrates two UART channels (UART0 and UART2) with native LIN bus protocol support, including automatic break detection, sync field generation, and checksum calculation. These interfaces meet ISO 17987-4 requirements and eliminate external LIN transceiver dependency in basic node implementations.
How does the Event Link Controller (ELC) in the R5F104PGGFB#10 improve real-time system responsiveness?
The ELC in the R5F104PGGFB#10 enables hardware-level linking of up to 26 event sources (e.g., timer overflow, ADC conversion complete) directly to target peripherals (e.g., DTC trigger, PWM reload), bypassing CPU interrupt latency. This reduces jitter in time-critical signal chains - for example, synchronizing ADC sampling to PWM dead-time insertion within one clock cycle.
R5F104PGGFB#10 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 100-LQFP
- Series:
- RL78/G14
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- RL78
- Core Size:
- 16-Bit
- Speed:
- 32MHz
- Connectivity:
- CSI, I2C, LINbus, UART/USART
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 82
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 16K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.4V ~ 5.5V
- Data Converters:
- A/D 20x8/10b; D/A 2x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F104PGGFB#10 FAQ
1.How can I place an order for R5F104PGGFB#10 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F104PGGFB#10 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F104PGGFB#10 reliable?
The price and inventory of R5F104PGGFB#10 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F104PGGFB#10 is usually 5 days.
3.What payment methods are accepted for R5F104PGGFB#10?
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R5F104PGGFB#10 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F104PGGFB#10 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F104PGGFB#10?
For technical support, including R5F104PGGFB#10 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F104PGGFB#10 requirements.
6.How does Aetrix verify that R5F104PGGFB#10 is sourced from the original manufacturer or authorized distributors?
All R5F104PGGFB#10 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F104PGGFB#10 meets industry standards.
7.What is the process for return or replacement of R5F104PGGFB#10?
All R5F104PGGFB#10 units undergo pre-shipment inspection (PSI). If there is an issue with R5F104PGGFB#10, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F104PGGFB#10 part is unused and in its original packaging.
Return procedure for R5F104PGGFB#10:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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