Renesas R5F10Y47DSP#70
- Part No.:
- R5F10Y47DSP#70
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 16-SSOP (0.173", 4.40mm Width)
- Datasheet:
-
R5F10Y47DSP#70.pdf
- Description:
- 16-BIT GENERAL MCU RL78/G10 4K 1
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
R5F10Y47DSP#70 from Renesas Electronics is a 16-pin SSOP 8-bit RL78/G10 microcontroller with 4 KB flash, 512 B RAM, 7-channel 10-bit ADC, and integrated high-speed on-chip oscillator (20 MHz ±2%). It operates from 2.0 to 5.5 V and delivers ultra-low power consumption (46 µA/MHz active, 0.61 µA STOP mode), targeting battery-powered sensor nodes and industrial control interfaces.
For engineers reviewing the R5F10Y47DSP#70 datasheet, R5F10Y47DSP#70 pinout, R5F10Y47DSP#70 application, or R5F10Y47DSP#70 equivalent, key selection criteria include its 16-pin SSOP package, 7-channel analog input capability, I²C/SPI/UART interface support, and industrial-grade -40°C to +85°C operation with selectable power-on reset.
Technical Context
The R5F10Y47DSP#70 implements the RL78-S1 core-a CISC Harvard architecture with 3-stage pipeline-enabling 78% of instructions in 1–2 clock cycles. Its timer array unit (TAU0) provides four 16-bit channels supporting PWM, capture, and compare functions, while the serial array unit (SAU0) delivers two CSI (SPI-compatible) channels plus one I²C master and one UART.
It integrates a 15 kHz low-speed on-chip oscillator for watchdog and interval timing, a 12-bit interval timer (16-pin only), and comparator with internal reference (IVREF0/IVCMP0/VCOUT0). All peripherals-including ADC, key interrupt (KR0–KR5), and programmable clock/buzzer output (PCLBUZ0)-are mapped to dedicated pins in the 16-pin SSOP layout with full peripheral I/O redirection via PIOR register.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | RL78-S1 CISC Harvard with 3-stage pipeline; enables deterministic 1–2 cycle instruction execution for real-time control loops. |
| Flash / RAM | 4 KB flash memory (rewritable at 4.5–5.5 V); 512 B RAM with backup retention in all low-power modes. |
| Operating Voltage | 2.0 to 5.5 V supply range; supports direct connection to Li-ion, alkaline, or regulated 3.3 V/5 V rails without external LDO. |
| Power Consumption | 46 µA/MHz active current; 0.61 µA STOP mode (RAM retained); enables multi-year battery life in wake-on-interrupt designs. |
| Analog Peripherals | 7-channel 10-bit ADC (3.4 µs conversion, 2.4 V reference support); 1-channel comparator with internal reference (IVREF0). |
| Communication Interfaces | 1× I²C master, 2× CSI (SPI-compatible), 1× UART (7-/8-bit); sufficient for sensor fusion and host MCU communication. |
| Timers & Outputs | 4-channel 16-bit TAU with PWM; 12-bit interval timer; PCLBUZ0 output (2.44 kHz–10 MHz) for buzzer or clock generation. |
Pinout & Package
Package: 16-pin plastic SSOP (4.4 × 5.0 mm, 0.65 mm pitch), industrial-grade (-40°C to +85°C), lead-free and RoHS compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P00 | Port 0 bit 0 / UART TXD0 / INT1 | Primary serial transmit pin; also serves as external interrupt source for event-driven wake-up. |
| P01 | Port 0 bit 1 / ADC ANI0 / I²C SDA00 / INT1 | Analog input channel 0 with I²C data line sharing; enables compact sensor interface with minimal pin count. |
| P02 | Port 0 bit 2 / ADC ANI1 / I²C SCL00 / PCLBUZ0 / KR3 | Shared clock line and buzzer output; supports simultaneous I²C bus control and audible feedback generation. |
| P03 | Port 0 bit 3 / ADC ANI2 / TAU TO00 / KR4 / INT1 | Timer output and key return pin; allows hardware-debounced keypad scanning with timer-synchronized sampling. |
| P04 | Port 0 bit 4 / ADC ANI3 / TAU TI01/TO01 / KR5 / IVREF0 | Comparator reference voltage input and dual-function timer I/O; enables precision threshold detection with internal reference. |
| P05 | Port 0 bit 5 / ADC ANI4 / TAU TI02/TO02 / SAU SO01 | Second timer channel and SPI output; supports dual PWM outputs or synchronous serial data transmission. |
| P06 | Port 0 bit 6 / ADC ANI5 / INT3 / SAU SI01 / I²C SCLA0 | I²C addressable slave clock line and analog input; permits mixed-mode I²C peripheral expansion with local sensing. |
| P07 | Port 0 bit 7 / ADC ANI6 / TAU TO03 / SAU SCK01 / SDAA0 | Final ADC channel and secondary SPI clock/data; completes 7-channel analog acquisition with dedicated serial interface. |
| P40 | Port 4 bit 0 / TOOL0 / KR0 / TAU TI01/TO01 | On-chip debug interface pin; enables programming and real-time trace without external JTAG adapter. |
| P41 | Port 4 bit 1 / INT2 / TAU TI03 | Dedicated external interrupt and timer input; supports high-priority edge-triggered event capture. |
| P125 | Port 12 bit 5 / RESET / KR1 | Active-low reset with key return function; allows shared reset/key matrix routing to reduce BOM count. |
| P137 | Port 13 bit 7 / INT0 / TAU TI00 | Primary external interrupt and timer input; used for system wake-up or pulse-width measurement. |
| P121/P122 | X1/X2 / EXCLK | Crystal oscillator or external clock inputs; supports 1–20 MHz main system clock with optional crystal-less operation. |
| VDD | Power supply | Single 2.0–5.5 V supply powers core, peripherals, and I/O; eliminates need for multiple rail regulators. |
| VSS | Ground | Common reference for analog/digital domains; decoupling capacitor placement critical for ADC accuracy. |
| VCOUT0 | Comparator output | Open-drain digital output reflecting comparator decision; directly drives LED or logic-level input without pull-up. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-Low Power Operation | 46 µA/MHz active current and 0.61 µA STOP mode enable >5-year battery life in wireless sensor endpoints. |
| Integrated Analog Front-End | 7-channel 10-bit ADC with 3.4 µs conversion and internal 0.815 V reference supports standalone temperature/humidity sensing. |
| Flexible Timer Architecture | Four 16-bit TAU channels support simultaneous PWM generation, input capture, and interval timing-reducing need for external timers. |
| Hardware Key Interrupt | Six key return (KR) inputs with built-in debouncing eliminate software polling overhead in keypad-based HMI designs. |
| On-Chip Debug Interface | 1-wire TOOL0 pin enables full programming, breakpoint, and trace capability using only two pins (TOOL0 + VDD/VSS). |
| Selectable Power-On Reset | Four SPOR voltage thresholds (2.25/2.68/3.02/4.45 V) allow precise brown-out detection matching diverse power supply profiles. |
Applications
| Smart Thermostat Sensor Node | Industrial Motor Control Panel |
|---|---|
Use Scenario: Compact, battery-powered HVAC sensor node measuring temperature, humidity, and occupancy via analog and digital sensors. IC Role / Device Role / Timing Role: Primary controller managing ADC sampling, I²C sensor reads, UART telemetry upload, and low-power sleep/wake scheduling. Use Value: 4 KB flash stores firmware + calibration tables; 7-channel ADC acquires all sensor inputs simultaneously; STOP mode extends battery life to 7+ years. | Use Scenario: Local control panel for 3-phase motor drives with pushbutton interface, status LEDs, and fault monitoring. IC Role / Device Role / Timing Role: HMI coordinator handling key scan, LED PWM dimming, fault flag latching, and UART communication with main drive controller. Use Value: Six KR inputs support 6-key matrix; four TAU PWM channels drive LEDs and buzzer; industrial temp range ensures reliability in cabinet environments. |
| Portable Medical Glucometer | Asset Tracking Beacon |
Use Scenario: Handheld blood glucose meter requiring precise analog measurement, LCD driving, and USB/Bluetooth companion interface. IC Role / Device Role / Timing Role: Signal conditioner and protocol bridge-digitizing test strip current, managing display timing, and formatting data for host transfer. Use Value: 10-bit ADC with 2.4 V reference enables accurate current-to-voltage conversion; internal comparator validates test strip insertion. | Use Scenario: GPS-denied indoor asset tracker using BLE beaconing, motion detection, and periodic temperature logging. IC Role / Device Role / Timing Role: System manager coordinating accelerometer wake-up, 10-second ADC temperature sampling, and BLE advertising packet generation. Use Value: 0.61 µA STOP mode minimizes quiescent drain; 7-channel ADC reserves capacity for future sensor expansion; SSOP package fits tight PCB footprints. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F10Y46DSP#70 | 2 KB flash, 256 B RAM, 4-channel ADC, no comparator or interval timer | Suitable for simpler control tasks without analog-intensive sensing or precision timing | Select when firmware size <2 KB and only basic ADC or timer functions are required. |
| R5F10Y44DSP#70 | 1 KB flash, 128 B RAM, 4-channel ADC, no comparator or interval timer | Targeted at ultra-low-cost, single-function devices like basic timers or LED controllers | Choose for cost-sensitive volume production where memory and peripheral headroom are minimal. |
Compared with R5F10Y46DSP#70 and R5F10Y44DSP#70, the R5F10Y47DSP#70 provides double the flash and RAM of the Y46 variant and triple that of the Y44, along with full 7-channel ADC, comparator, and 12-bit interval timer-making it the only option among the three capable of autonomous analog sensor processing and deterministic low-latency timing.
Availability
R5F10Y47DSP#70 is available at Aetrix Electronics and suitable for industrial motor control panels, portable medical devices, smart building sensor nodes, and asset tracking beacons requiring stable component supply across multi-year production cycles.
Supply support for R5F10Y47DSP#70 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader delivering trusted embedded solutions for automotive, industrial, infrastructure, and IoT applications.
The RL78/G10 product line delivers true low-power 8-bit MCUs optimized for cost-sensitive, battery-operated industrial and consumer control systems requiring robust analog integration and long operational life.
FAQ
What is the maximum operating frequency of the R5F10Y47DSP#70?
The R5F10Y47DSP#70 supports a maximum high-speed on-chip oscillator frequency of 20 MHz with ±2% accuracy across voltage (2.0–5.5 V) and temperature (−40°C to +85°C). When using an external crystal or clock source, it accepts up to 20 MHz input on X1/X2 or EXCLK pins. The minimum instruction execution time is 0.05 µs at 20 MHz operation, enabling responsive real-time control in the R5F10Y47DSP#70.
Does the R5F10Y47DSP#70 support hardware debugging?
Yes, the R5F10Y47DSP#70 includes a 1-wire on-chip debug function accessible via the TOOL0 pin (P40). This allows full programming, real-time tracing, and breakpoint debugging without requiring a dedicated JTAG/SWD interface. The debug functionality is fully supported in Renesas' CS+ and e2 studio IDEs, and the R5F10Y47DSP#70 does not require external debug probes for development or field firmware updates.
How many analog input channels does the R5F10Y47DSP#70 have, and what is their resolution?
The R5F10Y47DSP#70 features seven analog input channels (ANI0–ANI6), each supporting 10-bit resolution with a typical conversion time of 3.4 µs. It includes internal reference voltage (0.815 V typ.) and supports external reference down to 2.4 V, enabling accurate measurements across varying supply conditions. This 7-channel capability is exclusive to the 16-pin variants like the R5F10Y47DSP#70 and is confirmed in the device's functional outline and pin configuration tables.
What low-power modes are available on the R5F10Y47DSP#70?
The R5F10Y47DSP#70 offers HALT mode (360–900 µA) and STOP mode (0.61–2.25 µA with RAM retention), both configurable via software. In STOP mode, the high-speed oscillator halts while the 15 kHz low-speed oscillator remains active for watchdog and interval timing. The R5F10Y47DSP#70 achieves 46 µA/MHz in active operation-among the lowest in its class-making it ideal for energy-constrained applications where the R5F10Y47DSP#70 must balance responsiveness and longevity.
Is the R5F10Y47DSP#70 pin-compatible with other RL78/G10 16-pin variants?
Yes, the R5F10Y47DSP#70 shares identical 16-pin SSOP pinout and electrical characteristics with other 16-pin RL78/G10 devices including R5F10Y44DSP#70 and R5F10Y46DSP#70. All share the same peripheral mapping, I/O redirection register (PIOR) behavior, and package dimensions (4.4 × 5.0 mm, 0.65 mm pitch), enabling hardware reuse across firmware variants. This pin compatibility simplifies design scalability and reduces qualification effort for the R5F10Y47DSP#70.
R5F10Y47DSP#70 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 16-SSOP (0.173", 4.40mm Width)
- Series:
- RL78/G10
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RL78
- Core Size:
- 8-Bit
- Speed:
- 20MHz
- Connectivity:
- CSI, I2C, LINbus, UART/USART
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 10
- Program Memory Size:
- 4KB (4K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 512 x 8
- Voltage - Supply (Vcc/Vdd):
- 2V ~ 5.5V
- Data Converters:
- A/D 7x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F10Y47DSP#70 FAQ
1.How can I place an order for R5F10Y47DSP#70 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F10Y47DSP#70 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F10Y47DSP#70 reliable?
The price and inventory of R5F10Y47DSP#70 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F10Y47DSP#70 is usually 5 days.
3.What payment methods are accepted for R5F10Y47DSP#70?
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R5F10Y47DSP#70 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F10Y47DSP#70 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F10Y47DSP#70?
For technical support, including R5F10Y47DSP#70 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F10Y47DSP#70 requirements.
6.How does Aetrix verify that R5F10Y47DSP#70 is sourced from the original manufacturer or authorized distributors?
All R5F10Y47DSP#70 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F10Y47DSP#70 meets industry standards.
7.What is the process for return or replacement of R5F10Y47DSP#70?
All R5F10Y47DSP#70 units undergo pre-shipment inspection (PSI). If there is an issue with R5F10Y47DSP#70, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F10Y47DSP#70 part is unused and in its original packaging.
Return procedure for R5F10Y47DSP#70:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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