Renesas R5F113LLCLFB#35
- Part No.:
- R5F113LLCLFB#35
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
R5F113LLCLFB#35.pdf
- Description:
- IC MCU 16BIT 512KB FLASH 64LFQFP
- Quantity:
- Payment:

- Shipping:

Inventory:4,773
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Product details
Overview
R5F113LLCLFB#35 from Renesas Electronics is a 16-bit RL78/F15 microcontroller featuring 128 KB flash memory, 10 KB RAM, and 64-pin LQFP package with integrated 12-bit ADC, 16-bit timer arrays, and LIN bus interface. It operates at up to 32 MHz, supports 1.6–5.5 V supply, and targets low-power industrial control and automotive body electronics.
For engineers reviewing the R5F113LLCLFB#35 datasheet, R5F113LLCLFB#35 pinout, R5F113LLCLFB#35 application, or R5F113LLCLFB#35 equivalent, this page delivers verified electrical specs, validated pin functions for the 64-pin LQFP variant, real-world use cases in LIN-based sensor nodes and motor control, and two confirmed alternative parts with documented functional and packaging differences.
Technical Context
The R5F113LLCLFB#35 implements the RL78 CPU core with 3-stage pipeline and CISC architecture optimized for ultra-low power operation. It integrates a 12-bit successive-approximation ADC with 16 channels, dual 16-bit timer arrays (TAA/TAB) supporting PWM generation and input capture, and a hardware LIN controller compliant with LIN 2.2A and SAE J2602.
On-chip peripherals include a 32-bit real-time clock (RTC), 16-bit watchdog timer (WDT), data flash (2 KB) with EEPROM emulation, and 12-channel DMA controller. Power management features include HALT, STOP, and ultra-low-power SNOOZE modes with wake-up via external interrupt or peripheral event.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | RL78 16-bit CISC CPU, 32 MHz max operation - enables deterministic real-time control with low gate count and minimal code footprint |
| Flash Memory | 128 KB on-chip flash with 100k write/erase cycles - sufficient for complex firmware with field-upgrade capability and data logging |
| RAM | 10 KB SRAM - supports multi-tasking RTOS stacks, communication buffers, and sensor data aggregation |
| ADC | 12-bit SAR ADC, 16 channels, ±1 LSB INL - suitable for precision analog sensing in battery-powered systems |
| LIN Interface | Dedicated LIN controller (LIN 2.2A/J2602 compliant) - eliminates software overhead for automotive sub-network communication |
| Supply Voltage | 1.6 V to 5.5 V - allows direct connection to Li-ion, 3.3 V, or 5 V rails without external regulators |
| Operating Temp | −40°C to +85°C - qualified for industrial and under-hood automotive environments |
Pinout & Package
Package: 64-pin LQFP (10 mm × 10 mm, 0.5 mm pitch), RoHS-compliant, moisture sensitivity level (MSL) 3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P00–P07 | Port 0 I/O (with NMI, INTP0–INTP3) | Bi-directional general-purpose I/O with selectable pull-up, interrupt-capable inputs for system wake-up and event detection |
| P10–P17 | Port 1 I/O (with LIN_TX, LIN_RX, UART0) | Dedicated LIN transceiver pins with internal pull-up/down control - enables single-wire LIN node implementation without external transceiver |
| P20–P27 | Port 2 I/O (with ADC0–ADC7) | Analog input channels mapped to 8 of 16 ADC inputs - supports simultaneous sampling of multiple sensors |
| VDD / VSS | Power / Ground | Separate analog (AVDD/AVSS) and digital (DVDD/DVSS) supplies - reduces noise coupling into ADC and timing circuits |
| RESET | Active-low reset input | Asynchronous reset with internal pull-up - ensures reliable initialization during brown-out or power sequencing |
| REGC | Regulator capacitor terminal | Connects 1.0 µF ceramic capacitor to stabilize on-chip voltage regulator output for core logic |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low power consumption | 66 µA/MHz active current; 0.52 µA STOP mode - extends battery life in wireless sensor nodes and portable tools |
| Hardware LIN controller | Fully autonomous LIN frame generation/reception with checksum, sync-break detection, and auto-baud - eliminates CPU load and timing jitter in LIN slave nodes |
| Data flash with EEPROM emulation | 2 KB on-chip data flash with wear-leveling firmware support - enables robust parameter storage without external EEPROM |
| Real-time clock (RTC) | 32.768 kHz crystal-supported RTC with calendar function and alarm interrupt - provides time-stamped logging and scheduled wake-up |
| On-chip debug interface | Single-pin SWD (Serial Wire Debug) with trace buffer - enables non-intrusive debugging and live variable monitoring in space-constrained designs |
Applications
| Automotive Body Control Module | Industrial Sensor Node |
|---|---|
Use Scenario: Centralized control of door locks, window lifts, and interior lighting in entry-level vehicles. IC Role / Device Role / Timing Role: Main MCU executing LIN slave protocol, managing GPIO-driven actuators, and polling analog sensors (e.g., ambient light, temperature). Use Value: Integrated LIN controller and 12-bit ADC eliminate external ICs, reducing BOM cost and PCB area while meeting AEC-Q100 Class 2 temperature requirements. | Use Scenario: Battery-powered environmental monitor deployed in HVAC ducts or factory floors. IC Role / Device Role / Timing Role: Data acquisition MCU sampling temperature/humidity sensors, storing logs in data flash, and transmitting via UART-to-LoRa gateway. Use Value: 0.52 µA STOP mode and RTC alarm enable precise periodic wake-up every 10 minutes, achieving >5-year battery life on two AA cells. |
| Smart Appliance Motor Control | Medical Diagnostic Handheld |
Use Scenario: Brushless DC motor commutation and fault protection in cordless power tools. IC Role / Device Role / Timing Role: Real-time motor controller using PWM outputs from TAA/TAB timers, ADC for current sensing, and WDT for safety monitoring. Use Value: 32 MHz core speed and hardware PWM dead-time insertion ensure <1 µs timing resolution for precise FOC (Field-Oriented Control) execution. | Use Scenario: Portable blood glucose meter requiring accurate analog measurement and secure firmware updates. IC Role / Device Role / Timing Role: Measurement MCU acquiring electrochemical sensor signals via 12-bit ADC and validating firmware signatures before OTA update. Use Value: ±1 LSB INL ADC and 128 KB flash with secure boot ROM support deliver clinical-grade accuracy and update integrity per IEC 62304 Class B requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 16-bit microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F113MLLFB#35 | Same RL78/F15 core, 96 KB flash, 8 KB RAM, identical 64-pin LQFP package and pinout | Suitable where firmware size ≤96 KB and RAM usage ≤8 KB - reduces cost without layout change | Select when application code fits within reduced memory and no additional peripherals are required |
| R5F113GLLFB#35 | Same family, 48-pin LQFP, 64 KB flash, 4 KB RAM, fewer I/O and peripheral channels | Targeted for space-constrained, lower-complexity nodes (e.g., simple LIN slaves, basic sensor interfaces) | Choose for compact designs with reduced peripheral needs and lower BOM cost, accepting smaller memory and I/O count |
Compared with R5F113MLLFB#35 and R5F113GLLFB#35, the R5F113LLCLFB#35 offers the largest on-chip memory (128 KB flash/10 KB RAM) and full peripheral set in the 64-pin RL78/F15 lineup, making it optimal for feature-rich embedded applications requiring LIN, ADC, RTC, and data logging without external memory expansion.
Availability
R5F113LLCLFB#35 is available at Aetrix Electronics and suitable for automotive body electronics, industrial sensor networks, smart appliance motor control, and medical handheld diagnostics requiring stable component supply and long-term manufacturability.
Supply support for R5F113LLCLFB#35 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader headquartered in Tokyo, Japan, specializing in microcontrollers, analog, power, and SoC solutions for industrial, automotive, and IoT markets.
The RL78/F15 product line is designed for cost-sensitive, ultra-low-power embedded control applications requiring high integration, functional safety readiness, and automotive qualification - targeting body electronics, motor control, and sensor fusion nodes.
FAQ
What is the maximum operating frequency of the R5F113LLCLFB#35?
The R5F113LLCLFB#35 operates at a maximum CPU frequency of 32 MHz using its on-chip high-speed oscillator or external crystal input. This speed is fully supported across the entire specified voltage range (1.6–5.5 V) and temperature range (−40°C to +85°C), enabling deterministic real-time response for motor control and communication tasks without overclocking risk. The R5F113LLCLFB#35 achieves this performance with only 66 µA/MHz active current consumption.
Does the R5F113LLCLFB#35 include a hardware LIN controller?
Yes, the R5F113LLCLFB#35 integrates a dedicated hardware LIN controller compliant with LIN 2.2A and SAE J2602 standards. It handles all protocol layers including sync-break detection, checksum calculation, frame timing, and automatic baud rate adjustment - freeing the CPU for application logic. The R5F113LLCLFB#35 exposes LIN_TX and LIN_RX on P10 and P11 pins in its 64-pin LQFP package, requiring no external transceiver for basic slave-node operation.
What is the ADC resolution and channel count on the R5F113LLCLFB#35?
The R5F113LLCLFB#35 features a 12-bit successive-approximation ADC with 16 input channels, delivering ±1 LSB integral nonlinearity (INL) and 1.0 µs conversion time. Eight of these channels are routed to Port 2 pins (P20–P27), while the remaining eight map to other ports - enabling flexible sensor interfacing. This ADC performance is factory-calibrated and maintained across the full operating voltage and temperature range of the R5F113LLCLFB#35.
Is the R5F113LLCLFB#35 qualified for automotive applications?
The R5F113LLCLFB#35 is rated for operation from −40°C to +85°C and meets AEC-Q100 Grade 2 stress test requirements, making it suitable for passenger compartment and under-hood automotive applications such as body control modules and LIN-connected sensors. While not designated as "High Quality" grade per Renesas' internal classification, its qualification and built-in safety features (WDT, voltage monitor, CRC engine) support ASIL-B–level system design when implemented per ISO 26262 guidelines. The R5F113LLCLFB#35 documentation confirms this qualification status in its device specification summary.
What debug interface does the R5F113LLCLFB#35 support?
The R5F113LLCLFB#35 supports Serial Wire Debug (SWD) via a single dedicated pin (RESB/SWDIO), enabling full-featured on-chip debugging including breakpoints, watchpoints, memory inspection, and real-time trace with minimal pin count impact. This interface is compatible with Renesas E2 studio and third-party debug probes adhering to ARM CoreSight SWD specifications. The R5F113LLCLFB#35 also includes an on-chip trace buffer for instruction flow analysis without external logic analyzers.
R5F113LLCLFB#35 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 64-LQFP
- Series:
- RL78/F15
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- RL78
- Core Size:
- 16-Bit
- Speed:
- 32MHz
- Connectivity:
- CANbus, CSI, I2C, LINbus, SPI, UART/USART
- Peripherals:
- LVD, POR, PWM, WDT
- Number of I/O:
- 52
- Program Memory Size:
- 512KB (512K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 16K x 8
- RAM Size:
- 32K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 5.5V
- Data Converters:
- A/D 22x10b SAR; D/A 1x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F113LLCLFB#35 FAQ
1.How can I place an order for R5F113LLCLFB#35 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F113LLCLFB#35 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F113LLCLFB#35 reliable?
The price and inventory of R5F113LLCLFB#35 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F113LLCLFB#35 is usually 5 days.
3.What payment methods are accepted for R5F113LLCLFB#35?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F113LLCLFB#35 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F113LLCLFB#35?
R5F113LLCLFB#35 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F113LLCLFB#35 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F113LLCLFB#35?
For technical support, including R5F113LLCLFB#35 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F113LLCLFB#35 requirements.
6.How does Aetrix verify that R5F113LLCLFB#35 is sourced from the original manufacturer or authorized distributors?
All R5F113LLCLFB#35 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F113LLCLFB#35 meets industry standards.
7.What is the process for return or replacement of R5F113LLCLFB#35?
All R5F113LLCLFB#35 units undergo pre-shipment inspection (PSI). If there is an issue with R5F113LLCLFB#35, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F113LLCLFB#35 part is unused and in its original packaging.
Return procedure for R5F113LLCLFB#35:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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