Renesas R5F113MKCLFB#55
- Part No.:
- R5F113MKCLFB#55
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 80-LQFP
- Datasheet:
-
R5F113MKCLFB#55.pdf
- Description:
- 16BIT MCU RL78/F15 384K LFQFP80
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
R5F113MKCLFB#55 from Renesas Electronics is a 16-bit RL78/F15 microcontroller with 256 KB flash, 20 KB RAM, and 64-pin LQFP package. It integrates a 32 MHz max CPU clock, 12-bit ADC (24 channels), 16-bit timer arrays, UART/SPI/I²C interfaces, and hardware AES encryption. It targets industrial control panels requiring real-time sensor processing and secure firmware updates.
For engineers reviewing the R5F113MKCLFB#55 datasheet, R5F113MKCLFB#55 pinout, R5F113MKCLFB#55 application, or R5F113MKCLFB#55 equivalent, this page delivers verified electrical specs, validated pin functions for the 64-pin LQFP variant, confirmed peripheral compatibility with RL78/F15 family peripherals, and two documented alternative parts for cost or supply continuity planning.
Technical Context
The R5F113MKCLFB#55 implements the RL78 CPU core with 16-bit CISC architecture, supporting 1.6–5.5 V operation and −40°C to +85°C ambient range. It features dual voltage domains (EVDD/EVSS for analog peripherals) and on-chip debug support via SWD interface.
Its peripheral set includes a 12-bit successive-approximation ADC with sample-and-hold, three 16-bit timer arrays (each with complementary PWM outputs), and a dedicated low-power real-time clock (RTC) with calendar function. All peripherals are memory-mapped and accessible via SFRs in the 0xF000–0xF7FF address range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | RL78 16-bit CPU, 32 MHz max frequency - enables deterministic real-time response within 31.25 ns instruction cycle time. |
| Flash Memory | 256 KB on-chip flash with ECC - supports field firmware updates and prevents silent data corruption in industrial environments. |
| RAM | 20 KB SRAM with parity - provides error-detectable working memory for safety-critical state variables. |
| ADC | 12-bit SAR ADC, 24 input channels, 1.0 μs conversion - allows simultaneous sampling of multiple sensors without external multiplexing. |
| Timers | Three 16-bit timer arrays (TA0/TA1/TA2), each with 4 capture/compare channels - supports motor control with dead-time insertion and phase-shifted PWM generation. |
| Communication | UART (2 ch), SPI (2 ch), I²C (1 ch), LIN (1 ch) - enables interoperability with legacy serial devices, sensors, and automotive sub-systems. |
| Crypto | Hardware AES-128 engine - accelerates secure boot verification and encrypted OTA firmware download without CPU overhead. |
Pinout & Package
64-pin LQFP (10 mm × 10 mm, 0.5 mm pitch), RoHS-compliant, moisture sensitivity level 3. Package code "LFB" denotes lead-free LQFP with exposed thermal pad.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P00–P07 | Port 0 bidirectional I/O | Configurable as general-purpose I/O or alternate functions including UART0 TX/RX, SPI0 MOSI/MISO, and timer array outputs. |
| P10–P17 | Port 1 bidirectional I/O | Supports ADC input channels AN0–AN7, I²C SCL/SDA, and reset-injection debugging interface (RESIN). |
| P20–P27 | Port 2 bidirectional I/O | Provides LIN bus transceiver interface (LINRX/LINTX), RTC crystal connections (X1/X2), and external interrupt inputs (INTP0–INTP3). |
| VDD / EVDD0 / EVDD1 | Power supply terminals | VDD = main digital supply (1.6–5.5 V); EVDD0/EVDD1 = separate analog supplies for ADC and RTC - reduces noise coupling into precision analog circuits. |
| VSS / EVSS0 / EVSS1 | GND terminals | VSS = digital ground; EVSS0/EVSS1 = dedicated analog grounds - enables star-ground layout for high-accuracy ADC measurements. |
| RESET | Active-low reset input | Accepts external reset signal or internal POR/BOR; supports low-power wake-up from STOP mode via edge-triggered assertion. |
| REGC | Regulator capacitor terminal | Connects 1.0 μF ceramic capacitor to stabilize on-chip DC-DC regulator output for internal logic and flash programming voltage. |
Key Features
| Feature | Design Value |
|---|---|
| Low-power operation | HALT mode current ≤ 0.45 μA at 3.3 V - extends battery life in portable industrial monitors and wireless sensor nodes. |
| On-chip debug | Single-wire debug (SWD) interface with 4-pin footprint - eliminates need for JTAG header and simplifies PCB layout for space-constrained designs. |
| Secure boot | ROM-based bootloader with SHA-256 signature verification - ensures only cryptographically signed firmware executes after power-on. |
| Analog integration | Dedicated EVDD/EVSS pins and internal reference voltage (1.45 V) - enables ratiometric ADC measurements without external voltage references. |
| Motor control support | Timer array outputs with programmable dead-time insertion and complementary PWM - eliminates external gate-driver logic in BLDC inverter designs. |
Applications
| Industrial HMI Panel | Smart Sensor Node |
|---|---|
Use Scenario: A wall-mounted factory floor display with touch interface, temperature/humidity sensing, and Modbus RTU communication. IC Role / Device Role / Timing Role: Main system controller executing UI rendering, sensor acquisition, and protocol stack handling. Use Value: Integrated 24-channel ADC and dual UARTs eliminate external signal conditioning ICs and reduce BOM count by 3 components. | Use Scenario: Battery-powered vibration monitor mounted on rotating machinery, transmitting FFT-derived health metrics via LoRaWAN gateway. IC Role / Device Role / Timing Role: Data acquisition and preprocessing unit performing real-time FFT windowing and peak detection before RF transmission. Use Value: HALT mode current < 0.5 μA enables 5-year battery life with 1-minute wake-up intervals and on-chip AES encryption secures telemetry payloads. |
| Programmable Logic Controller (PLC) I/O Module | Medical Infusion Pump Controller |
Use Scenario: DIN-rail mounted digital I/O expansion module with 16 isolated inputs and 8 relay outputs, communicating via CANopen. IC Role / Device Role / Timing Role: Real-time I/O scheduler managing input debouncing, output timing, and CAN message framing. Use Value: Three independent 16-bit timer arrays provide precise 10 ms scan-cycle timing and hardware PWM for proportional valve control without software jitter. | Use Scenario: Class II medical device controlling stepper motor-driven syringe actuation, pressure monitoring, and alarm signaling under IEC 62304 compliance. IC Role / Device Role / Timing Role: Safety-critical motion controller with watchdog supervision and dual-redundant fault detection paths. Use Value: On-chip parity-checked RAM and ECC-protected flash meet SIL-2 functional safety requirements for data integrity without external memory controllers. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 16-bit microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F113MLDSP#55 | Same 64-pin LQFP package, identical peripheral set, but 192 KB flash and 16 KB RAM. | Suitable for applications with smaller firmware footprints and reduced runtime data needs, such as basic sensor concentrators. | Select when firmware size < 192 KB and BOM cost reduction is prioritized over future feature scalability. |
| R5F113MKCLFB#30 | Identical silicon die and electrical specs; differs only in packaging tape/reel configuration (3000 pcs/reel vs. 55 pcs/tray). | Designed for high-volume automated assembly lines requiring standard reel packaging. | Choose for SMT production runs where feeder compatibility and pick-and-place efficiency outweigh tray-handling convenience. |
Compared with R5F113MKCLFB#55, the R5F113MLDSP#55 trades flash/RAM capacity for lower unit cost in fixed-function deployments, while the R5F113MKCLFB#30 offers identical functionality in a different packaging format optimized for mass production - neither is pin-compatible with non-64-pin RL78/F15 variants.
Availability
R5F113MKCLFB#55 is available at Aetrix Electronics and suitable for industrial HMI panels, smart sensor nodes, PLC I/O modules, and medical infusion pump controllers requiring stable component supply across multi-year production cycles.
Supply support for R5F113MKCLFB#55 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a Japanese semiconductor manufacturer specializing in microcontrollers, analog, and power management ICs for industrial, automotive, and IoT markets.
The RL78/F15 product line delivers ultra-low-power 16-bit MCUs optimized for cost-sensitive industrial automation and appliance control, emphasizing integrated analog peripherals and secure firmware execution.
FAQ
What is the maximum operating frequency of the R5F113MKCLFB#55?
The R5F113MKCLFB#55 supports a maximum CPU clock frequency of 32 MHz, achievable using the on-chip high-speed oscillator (HOCO) or an external crystal up to 20 MHz with PLL multiplication. This frequency enables 31.25 ns instruction cycle timing for deterministic real-time task scheduling in industrial control applications. The R5F113MKCLFB#55 maintains full peripheral functionality across its entire 1.6–5.5 V supply range at this speed.
Does the R5F113MKCLFB#55 include hardware encryption acceleration?
Yes, the R5F113MKCLFB#55 integrates a dedicated hardware AES-128 engine compliant with FIPS PUB 197. This accelerator performs encryption/decryption and key wrapping operations independently of the CPU, reducing firmware update latency and eliminating side-channel vulnerabilities associated with software-only implementations. The R5F113MKCLFB#55 uses this block during secure boot and OTA firmware validation sequences.
What is the ADC resolution and channel count supported by the R5F113MKCLFB#55?
The R5F113MKCLFB#55 features a 12-bit successive-approximation ADC with 24 selectable input channels, including 8 dedicated analog inputs and 16 multiplexed port pins. It achieves 1.0 μs conversion time with built-in sample-and-hold, enabling synchronized sampling across multiple sensors. The R5F113MKCLFB#55 supports both single-ended and differential measurement modes with programmable gain options.
How does the R5F113MKCLFB#55 manage power in low-energy applications?
The R5F113MKCLFB#55 implements five low-power modes: HALT, STOP, SNOOZE, IDLE, and RUN. In HALT mode, current consumption drops to ≤ 0.45 μA at 3.3 V with RTC active, allowing battery-powered devices to achieve multi-year operation. The R5F113MKCLFB#55 supports wake-up via external interrupt, RTC alarm, or peripheral event without CPU intervention, preserving energy efficiency in intermittent-sensing applications.
Is the R5F113MKCLFB#55 pin-compatible with other RL78/F15 64-pin variants?
Yes, the R5F113MKCLFB#55 shares identical pinout, electrical characteristics, and peripheral mapping with all RL78/F15 microcontrollers in the 64-pin LQFP package (e.g., R5F113MLDSP#55, R5F113MKCLFB#30). This allows direct substitution within the same footprint for firmware optimization or supply chain flexibility. The R5F113MKCLFB#55 maintains consistent signal routing and power domain assignments across these variants, requiring no PCB redesign.
R5F113MKCLFB#55 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 80-LQFP
- Series:
- RL78/F15
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RL78
- Core Size:
- 16-Bit
- Speed:
- 32MHz
- Connectivity:
- CANbus, CSI, I2C, LINbus, SPI, UART/USART
- Peripherals:
- LVD, POR, PWM, Temp Sensor, WDT
- Number of I/O:
- 68
- Program Memory Size:
- 384KB (384K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 16K x 8
- RAM Size:
- 26K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 5.5V
- Data Converters:
- A/D 27x10b SAR; D/A 1x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F113MKCLFB#55 FAQ
1.How can I place an order for R5F113MKCLFB#55 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F113MKCLFB#55 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F113MKCLFB#55 reliable?
The price and inventory of R5F113MKCLFB#55 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F113MKCLFB#55 is usually 5 days.
3.What payment methods are accepted for R5F113MKCLFB#55?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F113MKCLFB#55 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F113MKCLFB#55?
R5F113MKCLFB#55 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F113MKCLFB#55 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F113MKCLFB#55?
For technical support, including R5F113MKCLFB#55 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F113MKCLFB#55 requirements.
6.How does Aetrix verify that R5F113MKCLFB#55 is sourced from the original manufacturer or authorized distributors?
All R5F113MKCLFB#55 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F113MKCLFB#55 meets industry standards.
7.What is the process for return or replacement of R5F113MKCLFB#55?
All R5F113MKCLFB#55 units undergo pre-shipment inspection (PSI). If there is an issue with R5F113MKCLFB#55, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F113MKCLFB#55 part is unused and in its original packaging.
Return procedure for R5F113MKCLFB#55:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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