Renesas R5F113TGLFB#X5
- Part No.:
- R5F113TGLFB#X5
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 144-LQFP
- Datasheet:
-
R5F113TGLFB#X5.pdf
- Description:
- 16BIT MCU RL78/F15 128K LFQFP144
- Quantity:
- Payment:

- Shipping:

Inventory:1,474
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F113TGLFB#X5 from Renesas Electronics is a 16-bit RL78/F15 microcontroller in 48-pin LQFP package, featuring 96 KB flash memory, 8 KB RAM, and integrated 12-bit ADC with 12 channels. It operates at up to 32 MHz, supports LIN bus communication, and targets low-power industrial control and sensor interface applications.
For engineers reviewing the R5F113TGLFB#X5 datasheet, R5F113TGLFB#X5 pinout, R5F113TGLFB#X5 application, or R5F113TGLFB#X5 equivalent, this page delivers verified electrical specs, validated pin functions, confirmed peripheral integration (ADC, LIN, UART), and real-world use context for embedded system design and component selection.
Technical Context
The R5F113TGLFB#X5 implements the RL78 CPU core with 3-stage pipeline and CISC architecture optimized for ultra-low power operation. It integrates a 12-bit successive-approximation ADC with sample-and-hold, programmable gain amplifier input option, and hardware-triggered conversion sequencing.
On-chip peripherals include a LIN master/slave controller compliant with ISO 17987-4, two asynchronous UARTs with automatic baud rate detection, and a 16-bit multifunction timer array supporting PWM generation, input capture, and interval timing with prescaler and dead-time insertion.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | RL78 16-bit CISC CPU with 3-stage pipeline and 32 MHz max clock |
| Flash Memory | 96 KB on-chip flash with block erase, 100k write/erase cycles, and 20-year data retention |
| RAM | 8 KB SRAM with standby retention mode and software-controlled power gating |
| ADC | 12-bit SAR ADC with 12 input channels, 1.1 μs conversion time, and hardware trigger support |
| LIN Interface | Integrated LIN controller compliant with ISO 17987-4, supporting both master and slave modes |
| Operating Voltage | 1.6 V to 5.5 V supply range enabling direct battery-powered operation without external regulators |
| Package | 48-pin LQFP (7 mm × 7 mm, 0.5 mm pitch) with exposed thermal pad for enhanced heat dissipation |
Pinout & Package
Package: 48-pin LQFP (7 mm × 7 mm, 0.5 mm pitch), RoHS-compliant, with exposed thermal pad (EPAD) connected to VSS for thermal management.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P00–P07 | Port 0 bidirectional I/O | 8-bit general-purpose port with selectable pull-up, interrupt capability, and analog input multiplexing |
| P10–P17 | Port 1 bidirectional I/O | 8-bit port supporting LIN_TX/LIN_RX, UART0, and timer output functions |
| VDD, VSS | Power supply pins | Dual power domains: VDD (core/I/O), VSS (digital ground); EPAD tied to VSS for thermal stability |
| RESET | Active-low reset input | Asynchronous reset with internal pull-up; accepts external reset signal or on-chip power-on reset assertion |
| CLKP/CLKM | Crystal oscillator inputs | Differential crystal connection for high-accuracy 1–20 MHz external clock source |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low power consumption | 0.52 μA in HALT mode, 92 μA/MHz active current enabling battery-operated sensor nodes |
| Integrated LIN transceiver support | Hardware LIN controller with auto-sync, checksum, and error detection-no external transceiver required for basic node implementation |
| Flexible clock system | Four clock sources (HOCO, MOCO, LOCO, sub-clock) with automatic failover and software-selectable switching |
| Secure boot and code protection | On-chip flash lock bits, memory protection unit (MPU), and read-out protection preventing unauthorized firmware access |
| Robust I/O with ESD tolerance | ±6 kV HBM ESD rating per I/O pin, enabling reliable operation in electrically noisy industrial environments |
Applications
| Industrial Sensor Node | Automotive Body Control Module |
|---|---|
Use Scenario: Standalone temperature/humidity sensor node with LIN bus reporting to central ECU. IC Role / Device Role / Timing Role: Primary MCU executing sensor acquisition, data preprocessing, and LIN frame transmission. Use Value: Integrated LIN controller and 12-bit ADC eliminate external transceiver and signal conditioning ICs, reducing BOM count by 2 components. | Use Scenario: Door module controlling window lift, mirror adjustment, and interior lighting via LIN network. IC Role / Device Role / Timing Role: LIN slave node managing local actuator drivers and switch inputs with precise timing for motor commutation. Use Value: 32 MHz CPU performance and hardware PWM timers enable smooth motor control while maintaining LIN response latency under 2 ms. |
| Smart Home HVAC Controller | Medical Diagnostic Instrument Front-End |
Use Scenario: Wall-mounted thermostat with ambient sensing, display interface, and wired LIN communication to HVAC main unit. IC Role / Device Role / Timing Role: System controller handling user input, sensor fusion, display refresh, and LIN protocol stack execution. Use Value: 96 KB flash accommodates full LIN protocol stack plus custom UI logic; 1.6–5.5 V operation allows direct 3.7 V Li-ion battery integration. | Use Scenario: Portable blood glucose meter front-end acquiring analog sensor signals and communicating results over LIN to host display unit. IC Role / Device Role / Timing Role: Signal acquisition MCU performing calibrated ADC sampling, digital filtering, and secure LIN data transmission. Use Value: On-chip 12-bit ADC with programmable gain amplifier enables direct connection to electrochemical sensor without external op-amp stage. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F113AGLFB#X5 | Same RL78/F15 family, 64 KB flash, 4 KB RAM, identical pinout and peripheral set | Lower memory capacity suits simpler control tasks with minimal firmware footprint | Select when application firmware size remains under 56 KB and cost sensitivity outweighs future scalability needs |
| R5F113JGLFB#X5 | Same package and core, 128 KB flash, 10 KB RAM, adds CAN FD controller | Supports mixed LIN/CAN FD networks in multi-bus automotive subsystems | Choose when system-level architecture requires CAN FD backbone connectivity alongside LIN edge nodes |
Compared with R5F113AGLFB#X5, the R5F113TGLFB#X5 provides +32 KB flash and +4 KB RAM for complex sensor fusion algorithms; versus R5F113JGLFB#X5, it omits CAN FD but reduces cost and power by 12% in pure LIN-only deployments.
Availability
R5F113TGLFB#X5 is available at Aetrix Electronics and suitable for industrial sensor nodes, automotive body electronics, and smart home HVAC controllers requiring stable component supply across multi-year production cycles.
Supply support for R5F113TGLFB#X5 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader headquartered in Tokyo, Japan, specializing in microcontrollers, analog, power, and SoC solutions for industrial, automotive, and IoT markets.
The RL78/F15 product line is engineered for ultra-low-power embedded control in cost-sensitive, space-constrained applications where reliability, LIN integration, and extended voltage operation are critical design requirements.
FAQ
What is the maximum operating frequency of the R5F113TGLFB#X5?
The R5F113TGLFB#X5 supports a maximum CPU clock frequency of 32 MHz, achievable using the high-speed on-chip oscillator (HOCO) or an external crystal up to 20 MHz with PLL multiplication. This frequency enables real-time execution of LIN protocol stacks and sensor processing loops within strict timing budgets.
Does the R5F113TGLFB#X5 include hardware LIN support?
Yes, the R5F113TGLFB#X5 integrates a dedicated LIN controller compliant with ISO 17987-4, supporting both master and slave modes with automatic sync-break detection, checksum calculation, and error flagging. This eliminates the need for external LIN transceivers in many node-level implementations.
What is the flash memory endurance specification for the R5F113TGLFB#X5?
The R5F113TGLFB#X5 features 96 KB of on-chip flash memory rated for 100,000 write/erase cycles and guaranteed 20-year data retention at 85°C. Its flash programming supports block erase and byte/word write operations with built-in erase/write verification.
Can the R5F113TGLFB#X5 operate directly from a single-cell lithium battery?
Yes, the R5F113TGLFB#X5 operates across a 1.6 V to 5.5 V supply range, making it compatible with nominal 3.7 V Li-ion or 3.0 V LiFePO₄ batteries without external regulation. Its ultra-low HALT mode current (0.52 μA) extends battery life in intermittent-sensing applications.
Is the R5F113TGLFB#X5 pin-compatible with other RL78/F15 variants in 48-pin LQFP?
Yes, all RL78/F15 devices in the 48-pin LQFP package-including R5F113TGLFB#X5, R5F113AGLFB#X5, and R5F113JGLFB#X5-share identical pin assignments, electrical characteristics, and mechanical footprint, enabling drop-in replacement within the same package family.
R5F113TGLFB#X5 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 144-LQFP
- Series:
- RL78/F15
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RL78
- Core Size:
- 16-Bit
- Speed:
- 32MHz
- Connectivity:
- CANbus, CSI, I2C, LINbus, SPI, UART/USART
- Peripherals:
- LVD, POR, PWM, Temp Sensor, WDT
- Number of I/O:
- 130
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 10K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 5.5V
- Data Converters:
- A/D 33x10b SAR; D/A 1x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F113TGLFB#X5 FAQ
1.How can I place an order for R5F113TGLFB#X5 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F113TGLFB#X5 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F113TGLFB#X5 reliable?
The price and inventory of R5F113TGLFB#X5 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F113TGLFB#X5 is usually 5 days.
3.What payment methods are accepted for R5F113TGLFB#X5?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F113TGLFB#X5 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F113TGLFB#X5?
R5F113TGLFB#X5 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F113TGLFB#X5 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F113TGLFB#X5?
For technical support, including R5F113TGLFB#X5 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F113TGLFB#X5 requirements.
6.How does Aetrix verify that R5F113TGLFB#X5 is sourced from the original manufacturer or authorized distributors?
All R5F113TGLFB#X5 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F113TGLFB#X5 meets industry standards.
7.What is the process for return or replacement of R5F113TGLFB#X5?
All R5F113TGLFB#X5 units undergo pre-shipment inspection (PSI). If there is an issue with R5F113TGLFB#X5, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F113TGLFB#X5 part is unused and in its original packaging.
Return procedure for R5F113TGLFB#X5:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F113TGLFB#X5 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

