Renesas R5F117GAGFB#30
- Part No.:
- R5F117GAGFB#30
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 48-LQFP
- Datasheet:
-
R5F117GAGFB#30.pdf
- Description:
- IC MCU 16BIT 16KB FLASH 48LFQFP
- Quantity:
- Payment:

- Shipping:

Inventory:1,000
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Product details
Overview
R5F117GAGFB#30 from Renesas is a 48-pin LFQFP-packaged RL78/I1D 16-bit microcontroller for industrial applications (TA = −40 to +105°C), featuring 32 KB code flash, 2 KB data flash, 3 KB RAM, 17-channel 12-bit ADC, and ultra-low power consumption (0.64 μA in RTC+LVD-only mode). It integrates four operational amplifiers, two comparators, dual I²C/SPI interfaces, and real-time clock with calendar function - deployed in smart sensors and programmable logic controllers.
For engineers reviewing the R5F117GAGFB#30 datasheet, R5F117GAGFB#30 pinout, R5F117GAGFB#30 application, or R5F117GAGFB#30 equivalent, key selection criteria include its 48-pin LFQFP-0.5 mm pitch package, industrial-grade temperature range, integrated analog front-end (4 op-amps, 2 comparators, 17 ADC channels), and support for background data flash rewriting with 1M-cycle endurance.
Technical Context
The R5F117GAGFB#30 implements the RL78 CPU core with CISC architecture, 3-stage pipeline, and selectable instruction execution time (0.04167 μs at 24 MHz high-speed on-chip oscillator or 66.6 μs at 15 kHz low-speed mode). It supports multiple clock sources: high-speed on-chip oscillator (±1.0% accuracy at 1.8–3.6 V), subsystem crystal (32.768 kHz), and external main clock up to 20 MHz.
Its peripheral set includes Event Link Controller (ELC) with 20 event inputs and 7 trigger outputs, Data Transfer Controller (DTC) with 22 activation sources, and Serial Array Unit supporting two CSI (SPI-compatible) and two simplified I²C channels - enabling deterministic, low-CPU-overhead peripheral coordination in closed-loop industrial control systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | RL78 16-bit CISC with 3-stage pipeline and multiply/divide/accumulate instructions |
| Flash Memory | 32 KB code flash (1 KB block size) with security lock and self-programming capability |
| Data Flash | 2 KB data flash with background operation (BGO) and 1,000,000 write cycles (TYP.) |
| RAM | 3 KB on-chip RAM, including FF300H start address used by flash library |
| ADC | 12-bit resolution A/D converter with 17 analog input channels and internal 1.45 V reference |
| Power Modes | Halt (58.3 μA/MHz), Stop (0.64 μA with RTC2 + LVD active), SNOOZE for low-latency wake-up |
| Operating Voltage | 1.6 V to 3.6 V supply range with on-chip POR and 12-level voltage detector (LVD) |
| Temperature Range | Industrial grade: −40°C to +105°C ambient operating temperature |
Pinout & Package
Package: 48-pin plastic LFQFP (7 × 7 mm, 0.5 mm pitch), RoHS-compliant, tray or tube packaging per #30 suffix.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P00–P04 | Analog input / general-purpose I/O | Supports ANI16–ANI18 analog inputs; CMOS I/O with TTL input buffer and pull-up options |
| P10–P17 | Analog input / op-amp interface | Hosts ANI0–ANI7, AMP0+/AMP0−, AMP1+/AMP1−, AVREFP/AVREFM references |
| P20–P25 | Analog input / op-amp interface | Provides ANI8–ANI13, AMP2+/AMP2−, AMP3+/AMP3−, IVCMP0/IVCMP1 comparator inputs |
| P30–P33 | Serial interface / timer / RTC | Configurable as SCK00/SCL00, TI00/TO01, IVREF0/IVREF1, RTC1HZ output |
| P50–P57 | UART / SPI / I²C / interrupt | Hosts RxD0/TxD0, SO00/SI00/SCK00, SDA00/SCL00, INTP1–INTP4, VCOUT0/VCOUT1 |
| P60–P63 | Serial interface / general I/O | Includes SSI00 chip select and additional CMOS I/O with 6 V tolerant N-ch open-drain capability |
| VDD / VSS / AVDD / AVSS | Power and ground domains | Dual-domain supply: digital (VDD/VSS) and analog (AVDD/AVSS) with mandatory 0.47–1 μF REGC capacitor |
| X1/X2, XT1/XT2 | Clock inputs | Main system crystal (1–20 MHz) and subsystem crystal (32.768 kHz) connections with EXCLK/EXCLKS alternatives |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low power HALT/STOP modes | Enables battery-powered operation down to 0.64 μA while retaining RTC2 and LVD functionality |
| Integrated analog front-end | Four independent operational amplifiers + two comparators + 17-channel 12-bit ADC eliminate external signal conditioning ICs |
| Background data flash rewrite | Allows firmware or calibration data updates without halting program execution (BGO mode) |
| Event Link Controller (ELC) | Direct hardware linking of 20 peripheral events to 7 trigger destinations reduces CPU polling overhead |
| Dual serial interface sets | Two independent CSI (SPI-compatible) and two simplified I²C channels support concurrent sensor and actuator communication |
| Real-time clock with calendar | 99-year calendar, alarm, and clock correction functions enable time-stamped logging without external RTC IC |
Applications
| Smart Industrial Sensor Node | Programmable Logic Controller (PLC) I/O Module |
|---|---|
Use Scenario: Compact, battery-backed environmental sensor node measuring temperature, humidity, and vibration in factory machinery. IC Role / Device Role / Timing Role: Central controller executing sensor fusion, local decision logic, and secure wireless telemetry via UART-to-LoRa bridge. Use Value: 17-channel ADC + 4 op-amps enable direct connection of thermistors, RTDs, and piezoelectric transducers; STOP mode extends battery life beyond 5 years. | Use Scenario: DIN-rail mounted digital I/O expansion module for legacy PLC systems requiring isolated inputs/outputs. IC Role / Device Role / Timing Role: Local intelligence hub managing opto-isolated inputs, relay drivers, and Modbus RTU over RS-485. Use Value: Dual simplified I²C interfaces configure isolated I/O ASICs; ELC synchronizes input sampling and output update within 100 ns jitter. |
| Energy Metering Subsystem | Industrial HMI Touch Controller |
Use Scenario: Metrology-grade sub-metering unit monitoring three-phase current/voltage in building management systems. IC Role / Device Role / Timing Role: Analog acquisition engine with simultaneous sampling, RMS calculation, and tamper-detection logic. Use Value: 12-bit ADC with internal 1.45 V reference and temperature sensor enables drift-compensated measurements; data flash stores calibration coefficients with 1M-cycle endurance. | Use Scenario: Resistive/capacitive touch panel controller for operator panels in harsh industrial environments. IC Role / Device Role / Timing Role: Touch scan processor with noise-immune capacitive sensing, button debouncing, and LED backlight PWM generation. Use Value: Four op-amps condition touch electrode signals; 8-bit interval timers generate precise 1–32.768 kHz buzzer tones and PWM dimming waveforms. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F117GCGFB#30 | Same package and pinout; 32 KB code flash but only 2 KB RAM (vs. 3 KB in R5F117GAGFB#30) | Lower RAM headroom limits complex state machines or large protocol stacks | Select when application fits within 2 KB RAM and requires identical peripheral set and footprint |
| R5F117BCGNA#00 | 32-pin HVQFN (5×5 mm); 32 KB flash, 2 KB RAM, 12-channel ADC, 2 op-amps, no RTC calendar | Lacks RTC calendar, fewer ADC channels, and no 4-op-amp front-end | Choose for space-constrained designs where RTC/calendar and full analog integration are non-critical |
Compared with R5F117GCGFB#30 and R5F117BCGNA#00, the R5F117GAGFB#30 uniquely delivers 3 KB RAM, 17-channel ADC, full 4-op-amp analog front-end, and RTC calendar in a 48-pin LFQFP - making it optimal for feature-rich industrial edge nodes requiring local data processing and time-aware control.
Availability
R5F117GAGFB#30 is available at Aetrix Electronics and suitable for smart sensor nodes, PLC I/O modules, energy metering subsystems, and industrial HMI touch controllers requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for R5F117GAGFB#30 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader delivering microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The RL78/I1D product line targets cost-sensitive, ultra-low-power industrial control applications - integrating rich analog peripherals, robust timing, and secure flash into compact packages for deployment in harsh environments.
FAQ
What is the maximum operating frequency and clock source flexibility of the R5F117GAGFB#30?
The R5F117GAGFB#30 supports a maximum system clock of 24 MHz using its high-speed on-chip oscillator (±1.0% accuracy at 1.8–3.6 V), or up to 20 MHz via external crystal (X1) or clock input (EXCLK). It also provides middle-speed (up to 4 MHz) and low-speed (15 kHz) on-chip oscillators, plus a 32.768 kHz subsystem crystal (XT1) for RTC - enabling dynamic clock switching to optimize performance versus power in the R5F117GAGFB#30.
Does the R5F117GAGFB#30 support background data flash rewriting while executing application code?
Yes, the R5F117GAGFB#30 supports Background Operation (BGO) for data flash memory: instructions can be fetched and executed from code flash while simultaneously rewriting data flash. This enables seamless firmware updates, calibration storage, or event logging without interrupting real-time tasks - a confirmed capability documented in the R5F117GAGFB#30 datasheet section 1.1.
How many operational amplifiers and comparators are integrated into the R5F117GAGFB#30, and what are their key electrical characteristics?
The R5F117GAGFB#30 integrates four independent operational amplifiers (AMP0–AMP3) and two comparators (IVCMP0, IVCMP1). Each op-amp supports rail-to-rail input/output, selectable gain configurations, and dedicated ± inputs/outputs. Comparators offer high-speed and low-speed modes plus window mode - all verified in the R5F117GAGFB#30 functional outline (Section 1.6) and electrical specifications (Section 2).
What is the analog input channel count and resolution supported by the R5F117GAGFB#30 ADC?
The R5F117GAGFB#30 features a 12-bit resolution A/D converter with 17 analog input channels (ANI0–ANI13, ANI16–ANI18), internal 1.45 V reference voltage, and integrated temperature sensor. This configuration is explicitly listed for 48-pin RL78/I1D variants including the R5F117GAGFB#30 in Section 1.6 "Outline of Functions" of the datasheet.
Is the R5F117GAGFB#30 qualified for industrial temperature operation, and what packaging option does the #30 suffix indicate?
Yes, the R5F117GAGFB#30 is rated for industrial temperature operation from −40°C to +105°C (denoted by the 'G' in the part number). The '#30' suffix specifies tray or tube packaging for LFQFP packages - confirmed in Figure 1-1 and Section 1.2 "Ordering Information" of the R5F117GAGFB#30 datasheet.
R5F117GAGFB#30 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 48-LQFP
- Series:
- RL78/I1D
- Packaging:
- Tray
- Product Status:
- Last Time Buy
- Programmable:
- Not Verified
- Core Processor:
- RL78
- Core Size:
- 16-Bit
- Speed:
- 24MHz
- Connectivity:
- CSI, I2C, UART/USART
- Peripherals:
- LVD, POR, WDT
- Number of I/O:
- 33
- Program Memory Size:
- 16KB (16K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 2K x 8
- RAM Size:
- 2K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.6V ~ 3.6V
- Data Converters:
- A/D 17x8/12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F117GAGFB#30 FAQ
1.How can I place an order for R5F117GAGFB#30 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F117GAGFB#30 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F117GAGFB#30 reliable?
The price and inventory of R5F117GAGFB#30 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F117GAGFB#30 is usually 5 days.
3.What payment methods are accepted for R5F117GAGFB#30?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F117GAGFB#30 transactions.
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4.How is shipping managed for R5F117GAGFB#30?
R5F117GAGFB#30 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F117GAGFB#30 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F117GAGFB#30?
For technical support, including R5F117GAGFB#30 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F117GAGFB#30 requirements.
6.How does Aetrix verify that R5F117GAGFB#30 is sourced from the original manufacturer or authorized distributors?
All R5F117GAGFB#30 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F117GAGFB#30 meets industry standards.
7.What is the process for return or replacement of R5F117GAGFB#30?
All R5F117GAGFB#30 units undergo pre-shipment inspection (PSI). If there is an issue with R5F117GAGFB#30, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F117GAGFB#30 part is unused and in its original packaging.
Return procedure for R5F117GAGFB#30:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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