Renesas R5F21348UNFP#V0
- Part No.:
- R5F21348UNFP#V0
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 48-LQFP
- Datasheet:
-
R5F21348UNFP#V0.pdf
- Description:
- IC MCU 16BIT 64KB FLASH 48LFQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
R5F21348UNFP#V0 from Renesas is a 16-bit R8C CPU core microcontroller with 64 KB program ROM, 8 KB RAM, and 4 KB data flash (1 KB × 4 blocks) supporting background operation (BGO). It integrates USB 2.0 full-speed (12 Mbps) function controller + transceiver, 10-bit A/D converter (12 channels), LIN module, and multiple timers (RA/RB/RC/RF) for embedded control in resource-constrained USB-peripheral applications.
For engineers reviewing the R5F21348UNFP#V0 datasheet, R5F21348UNFP#V0 pinout, R5F21348UNFP#V0 application, or R5F21348UNFP#V0 equivalent, this MCU is selected for cost-sensitive, low-power USB device implementations requiring integrated analog sensing, LIN communication, and deterministic real-time interrupt handling (69 vectors, 7 priority levels) without external USB PHY or timing components.
Technical Context
The R5F21348UNFP#V0 implements the R8C CPU core with 89 fundamental instructions, 16×16→32-bit hardware multiplier, and multiply-accumulate capability. Its memory map spans 1 Mbyte (00000h–FFFFFh), with fixed interrupt vector table at 0FFDCh–0FFFFh and data flash at 03000h–03FFFh.
USB functionality is implemented as a dedicated function controller with 5-pipe architecture (DCP + PIPE4–7), 448-byte FIFO (64/128/64 bytes per pipe), and full-speed transceiver - no host-mode or OTG support. Clock system includes XIN/XOUT oscillator, high-/low-speed on-chip oscillators, PLL frequency synthesizer, and programmable dividers (1/2/4/8/16).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | R8C 16-bit core with 89 instructions, 50 ns min instruction time @ 20 MHz, 16×16→32-bit multiplier |
| Memory | 64 KB program ROM + 8 KB RAM + 4 KB data flash (1 KB × 4 blocks, BGO supported) |
| USB Interface | USB 2.0 full-speed (12 Mbps) device controller + integrated transceiver; 5 pipes, 448-byte FIFO |
| A/D Converter | 10-bit resolution × 12 channels with sample-and-hold and sweep mode |
| Timers | Timer RA (8-bit), RB (8-bit PWM), RC (16-bit, 4 capture/compare), RF (16-bit, 4-output compare) |
| Operating Range | −20°C to +85°C (N version), VCC = 1.8–5.5 V; typ. 7.0 mA @ 5 V/20 MHz, 4.0 µA in wait mode |
| Package | 48-pin LQFP (PLQP0048KB-A), 7 mm × 7 mm, 0.5 mm pitch |
Pinout & Package
48-pin LQFP (PLQP0048KB-A) package with exposed pad; 36 CMOS I/O ports (all with selectable pull-up), 12 analog inputs (AN0–AN11), dedicated USB D+/D−, VBUS, VCC, and transceiver control pins (USB_DPUPE, USB_VBUSEN not present).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1–8 (P6_0, P3_0, VREF, MODE, P4_3, P4_4, RESET, XOUT) | Reset, clock output, reference voltage, mode configuration | RESET is active-low reset input; VREF sets A/D reference; MODE must be tied to VCC via resistor |
| 9–11 (VSS/AVSS, XIN, VCC/AVCC) | Power and clock input | VSS/AVSS = digital/analog ground; XIN accepts crystal/resonator or external clock; AVCC requires decoupling to AVSS |
| 12–15 (P3_7, P3_5, P3_4, P3_3) | I2C/SSU/serial interface | P3_7 = SDA/SSO/TRAO; P3_5 = SCL/SSCK; P3_4 = SSI/IVREF3; P3_3 = SCS/CTS2/RTS2 |
| 16–24 (P7_7, P7_6, USB_VBUS, USB_DM, USB_DP, USB_VCC, USB_DPUPE, USB_DPRPD, USB_DRPD) | USB physical layer | USB_DM/DP = differential data lines; USB_VBUS monitors cable connection; USB_DPUPE enables 1.5 kΩ D+ pull-up for device mode |
| 25–48 (P6_7–P8_0) | Interrupts, timers, serial I/O, analog inputs | P6_7 = INT3/USB_ID (not used); P1_0–P1_3 = KI0–KI3 key inputs + AN8–AN11; P0_0–P0_7 = AN0–AN7 + TRCIOx |
Key Features
| Feature | Design Value |
|---|---|
| Background Operation (BGO) | Data flash erasure/programming while CPU executes main code - enables seamless firmware updates |
| Integrated USB Transceiver | Eliminates need for external PHY; supports full-speed device operation with 448-byte FIFO and pipe-level transfer control |
| LIN Module | Hardware LIN 2.0 implementation using Timer RA and UART0 - reduces CPU overhead for automotive sub-networks |
| Low-Power Modes | Wait mode (4.0 µA) and stop mode (2.0 µA) with selective peripheral wake-up - extends battery life in portable devices |
| Multi-Source Interrupt System | 69 interrupt vectors with 7 priority levels and 30 DTC activation sources - ensures deterministic real-time response |
Applications
| USB Peripheral Controller | Industrial Sensor Node |
|---|---|
Use Scenario: Embedded USB HID device such as barcode scanner or USB-to-serial adapter requiring local processing and bus-powered operation. IC Role / Device Role / Timing Role: Primary MCU executing firmware, managing USB enumeration, buffering data, and controlling I/O peripherals. Use Value: Integrated USB transceiver and BGO-capable data flash enable compact, self-contained design with field-upgradable firmware. | Use Scenario: Remote environmental monitoring node with analog sensors (temperature, humidity) and LIN-connected actuators in factory automation. IC Role / Device Role / Timing Role: Central sensor aggregator and LIN master, performing A/D conversion, data preprocessing, and scheduled LIN message transmission. Use Value: 12-channel 10-bit A/D with sample-and-hold and hardware LIN reduce component count and timing jitter vs. discrete solutions. |
| Consumer Audio Accessory | Home Appliance Control |
Use Scenario: USB-powered audio accessory (e.g., DAC dongle or microphone array) needing low-latency audio streaming and power management. IC Role / Device Role / Timing Role: USB audio class device controller with DMA-like DTC transfers and precise clock domain isolation between USB and audio sampling. Use Value: Dedicated USB FIFO and PLL-based clock synthesis ensure stable 48 kHz audio frame timing without software intervention. | Use Scenario: Smart washing machine control board managing motor drivers, water valves, and user interface with safety-critical reset supervision. IC Role / Device Role / Timing Role: Main system controller with voltage detection (power-on reset, VDD monitor), watchdog timer, and multi-level interrupt prioritization. Use Value: Dual-voltage detection circuit and 14-bit watchdog timer with selectable oscillator provide robust fault recovery in noisy appliance environments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F21348KNFP | Same R8C/34K Group: adds USB OTG support, USB_ID/USB_EXICEN pins, and host-mode capability | Required for dual-role USB designs (e.g., USB host + device switching) | Select when OTG or host functionality is mandatory; not pin-compatible due to added USB control signals |
| R5F21346UNFP | Same R8C/34U Group: 32 KB ROM, 4 KB RAM, identical USB/peripheral set and pinout | Suitable for simpler firmware with lower memory footprint | Drop-in replacement if code size ≤32 KB; shares same PLQP0048KB-A package and USB timing behavior |
Compared with R5F21348KNFP, R5F21348UNFP#V0 lacks OTG and host features but offers tighter BOM control for pure device roles; versus R5F21346UNFP, it doubles ROM/RAM for complex USB descriptors, HID reports, or LIN protocol stacks without layout change.
Availability
R5F21348UNFP#V0 is available at Aetrix Electronics and suitable for USB peripheral controllers, industrial sensor nodes, consumer audio accessories, and home appliance control systems requiring stable component supply across production lifecycles.
Supply support for R5F21348UNFP#V0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The R8C/34U Group, including R5F21348UNFP#V0, was designed for cost-optimized, low-power USB device applications where integrated analog interfaces, LIN connectivity, and deterministic real-time control are required without host-mode complexity.
FAQ
What USB speed and device class does R5F21348UNFP#V0 support?
R5F21348UNFP#V0 supports USB 2.0 full-speed (12 Mbps) exclusively as a device - not host or OTG. It implements a hardware USB function controller with 5 configurable pipes and 448-byte FIFO. The R5F21348UNFP#V0 does not include USB class-specific firmware; users implement HID, CDC, or custom classes in application code using Renesas-provided USB API libraries.
Does R5F21348UNFP#V0 support in-system programming of its data flash?
Yes, R5F21348UNFP#V0 supports background operation (BGO) for data flash, enabling erase/write operations while the CPU executes main program code. Data flash is organized as four 1 KB blocks (A–D), each independently erasable. Programming and erasure endurance is rated at 10,000 cycles, and security is enforced via ROM code protect and ID code check features.
What is the operating temperature range and supply voltage for R5F21348UNFP#V0?
R5F21348UNFP#V0 is an N-version part rated for −20°C to +85°C ambient temperature. It operates across VCC = 1.8 V to 5.5 V, with typical current consumption of 7.0 mA at 5.0 V/20 MHz, 3.5 mA at 3.0 V/10 MHz, 4.0 µA in wait mode, and 2.0 µA in stop mode. Voltage detection circuit provides power-on reset and configurable level monitoring.
How many analog input channels and what A/D resolution does R5F21348UNFP#V0 provide?
R5F21348UNFP#V0 integrates a 10-bit successive-approximation A/D converter with 12 analog input channels (AN0–AN11), all accessible on dedicated pins. It includes sample-and-hold functionality and sweep mode for automatic channel scanning. Reference voltage is selectable via internal or external source (VREF pin), and conversion results are stored in 16-bit registers for direct CPU or DTC access.
Is R5F21348UNFP#V0 pin-compatible with other R8C/34U Group MCUs?
Yes, R5F21348UNFP#V0 is pin-compatible with all R8C/34U Group variants in the same PLQP0048KB-A package, including R5F21346UNFP and R5F21346UDFP. Pin assignments, electrical characteristics, and peripheral register maps are identical. Memory size differences (32 KB vs. 64 KB ROM) do not affect pin behavior or PCB layout - only firmware image size constraints differ.
R5F21348UNFP#V0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 48-LQFP
- Series:
- R8C/3x/34U
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- R8C
- Core Size:
- 16-Bit
- Speed:
- 20MHz
- Connectivity:
- I2C, LINbus, SIO, SSU, UART/USART, USB
- Peripherals:
- POR, PWM, Voltage Detect, WDT
- Number of I/O:
- 36
- Program Memory Size:
- 64KB (64K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 4K x 8
- RAM Size:
- 8K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 5.5V
- Data Converters:
- A/D 12x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -20°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F21348UNFP#V0 FAQ
1.How can I place an order for R5F21348UNFP#V0 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F21348UNFP#V0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F21348UNFP#V0 reliable?
The price and inventory of R5F21348UNFP#V0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F21348UNFP#V0 is usually 5 days.
3.What payment methods are accepted for R5F21348UNFP#V0?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F21348UNFP#V0 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F21348UNFP#V0?
R5F21348UNFP#V0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F21348UNFP#V0 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F21348UNFP#V0?
For technical support, including R5F21348UNFP#V0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F21348UNFP#V0 requirements.
6.How does Aetrix verify that R5F21348UNFP#V0 is sourced from the original manufacturer or authorized distributors?
All R5F21348UNFP#V0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F21348UNFP#V0 meets industry standards.
7.What is the process for return or replacement of R5F21348UNFP#V0?
All R5F21348UNFP#V0 units undergo pre-shipment inspection (PSI). If there is an issue with R5F21348UNFP#V0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F21348UNFP#V0 part is unused and in its original packaging.
Return procedure for R5F21348UNFP#V0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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