Renesas R5F21368CNFP#30
- Part No.:
- R5F21368CNFP#30
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
R5F21368CNFP#30.pdf
- Description:
- IC MCU 16BIT 64KB FLASH 64LFQFP
- Quantity:
- Payment:

- Shipping:

Inventory:4,506
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F21368CNFP#30 from Renesas Electronics is a 16-bit R8C CPU core microcontroller with 64 KB program ROM, 6 KB RAM, and 4 × 1 KB data flash blocks supporting background operation (BGO). It operates at up to 20 MHz (VCC = 2.7–5.5 V), integrates 12-channel 10-bit ADC, dual 8-bit DACs, LIN hardware module, and six independent timer units (RA–RG) for motor control and real-time signal generation. It targets embedded control in consumer audio and office equipment.
For engineers reviewing the R5F21368CNFP#30 datasheet, R5F21368CNFP#30 pinout, R5F21368CNFP#30 application, or R5F21368CNFP#30 equivalent, key selection criteria include its 64-pin LQFP (PLQP0064KB-A) package, −20°C to +85°C industrial temperature grade, integrated LIN transceiver support via UART0+TimerRA, and BGO-enabled data flash for firmware updates without halting execution.
Technical Context
The R5F21368CNFP#30 implements the R8C CPU core with 89 fundamental instructions, 16×16→32-bit hardware multiplier, and multiply-accumulate capability. Its memory map spans 1 Mbyte, with fixed interrupt vector table at 0FFDCh–0FFFFh and data flash at 03000h–03FFFh.
Peripheral integration includes three UART/serial interfaces (UART0–2), I²C bus (shared with SSU), 16-bit Timer RD with complementary PWM for three-phase motor drive, and DTC for autonomous data transfers triggered by 39 sources - enabling low-CPU-overhead sensor acquisition and actuator control.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | R8C 16-bit core with 89 instructions, 16×16→32-bit multiplier, and MAC support - enables efficient digital filtering and motor commutation math. |
| Memory | 64 KB program ROM, 6 KB RAM, 4 × 1 KB data flash with BGO - allows field firmware patching while maintaining real-time operation. |
| ADC/DAC | 12-channel 10-bit ADC with sample-and-hold and sweep mode; dual 8-bit DACs - supports analog sensor interfacing and audio waveform generation. |
| Timers | Timer RA/RB (8-bit), RC/RD/RF/RG (16-bit); RD supports complementary PWM, reset-synchronous PWM, and three-phase waveform output - suitable for BLDC motor control. |
| Serial Interfaces | UART0/1/2 (UART2 supports I²C mode), SSU, LIN hardware module (using UART0 + TimerRA) - enables local interconnect and automotive-grade communication. |
| Supply & Power | VCC = 1.8–5.5 V; 7.0 mA typical @ 5 V/20 MHz; 4.0 µA wait mode @ 3 V/32 kHz - meets battery-backed and energy-conscious appliance requirements. |
| Package & Temp | 64-pin LQFP (PLQP0064KB-A), −20°C to +85°C operating range - compatible with standard SMT assembly and industrial ambient conditions. |
Pinout & Package
Package: 64-pin LQFP (PLQP0064KB-A), 10 mm × 10 mm, 0.5 mm pitch, exposed pad not specified. RoHS-compliant, moisture sensitivity level (MSL) per Renesas standard.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P0_0–P0_7 | Analog input / DA output / Timer I/O | AN0–AN7 inputs for ADC; DA0/DA1 outputs; TRCIOx pins for Timer RC capture/compare - enables mixed-signal front-end design. |
| P1_0–P1_3 | Analog input / Key interrupt | AN8–AN11 + KI0–KI3 - supports touch-key interface with hardware debouncing and wake-on-key functionality. |
| P2_0–P2_7 | Timer RD I/O | TRDIOA0–TRDIOD1 (8 pins) - provides full 6-pin complementary PWM output for three-phase inverter gate drive. |
| P3_4/P3_5/P3_7 | I²C bus | SDA2/SCL2/SSO - shared I²C/SSU interface for EEPROM, sensors, or display controllers with software-configurable pull-up. |
| P4_3/P4_4 | 32 kHz crystal oscillator | XCIN/XCOUT - drives low-power real-time clock (Timer RE) independent of main system clock for accurate timekeeping. |
| P6_0/P6_3/P6_4 | LIN physical layer | TREO (LIN TX), TXD1 (LIN TX), RXD1 (LIN RX) - combined with UART0 and TimerRA, forms complete LIN 2.1 transceiver per specification. |
Key Features
| Feature | Design Value |
|---|---|
| Background Operation (BGO) | Data flash erase/write during program execution - enables seamless firmware updates without interrupting motor control loops or audio playback. |
| Hardware LIN Module | UART0 + TimerRA co-implementation - eliminates external LIN transceiver for cost-sensitive appliance nodes (e.g., HVAC actuators). |
| Complementary PWM (Timer RD) | 6-pin output with dead-time insertion and synchronous reset - directly drives 3-phase inverter bridges with shoot-through protection. |
| DTC (Data Transfer Controller) | 1-channel, 39 activation sources - offloads ADC sampling, UART DMA, and timer register transfers from CPU, reducing ISR latency. |
| Voltage Detection Circuit | Configurable VDD monitor with POR and selectable voltage detection levels - ensures reliable reset behavior across varying supply conditions in consumer power supplies. |
Applications
| Audio Equipment Control | Office Equipment Motor Drive |
|---|---|
|
Use Scenario: Digital audio amplifier subsystem managing volume, tone, and input source selection in home theater receivers. IC Role / Device Role / Timing Role: Main system controller executing audio processing firmware, reading rotary encoder inputs, driving DACs for analog output, and communicating via I²C with DSP ICs. Use Value: Integrated 12-channel ADC reads potentiometers and sensors; dual 8-bit DACs generate bias voltages; BGO allows firmware updates during playback without audible glitches. |
Use Scenario: Paper feed and scanning motor control in multifunction printers. IC Role / Device Role / Timing Role: Dedicated motion controller generating synchronized PWM waveforms for stepper/servo drivers and monitoring encoder feedback via Timer RG phase counting. Use Value: Timer RD's complementary PWM with reset-synchronous mode ensures precise three-phase current control; 16-bit Timer RF captures encoder pulses with sub-millisecond resolution. |
| Consumer Appliance UI | Industrial Sensor Node |
|
Use Scenario: Touch-sensitive control panel in microwave ovens or washing machines. IC Role / Device Role / Timing Role: Front-end interface MCU scanning capacitive or resistive key matrix, managing LED indicators, and communicating status via UART to main controller. Use Value: Four dedicated KI0–KI3 interrupt pins enable low-power wake-on-touch; 10-bit ADC measures thermistor temperature for cooking cycle adjustment. |
Use Scenario: Battery-powered environmental monitor logging temperature/humidity and transmitting over UART to gateway. IC Role / Device Role / Timing Role: Low-power data acquisition node using wait/stop modes, ADC sweep mode for multi-sensor polling, and UART2 in I²C mode for sensor hub communication. Use Value: 4.0 µA wait mode @ 32 kHz XCIN clock extends battery life; data flash BGO stores calibration coefficients without suspending measurement cycles. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F21367CNFP | 48 KB program ROM, 4 KB RAM, same peripheral set and package - 16 KB smaller code space. | Suitable for simpler appliance UIs or sensor nodes with reduced firmware footprint. | Select when application firmware fits within 48 KB and no additional data logging or feature expansion is planned. |
| R5F21368CNFA | Identical memory and peripherals, but PLQP0064GA-A package (different lead finish and thermal pad design). | Same functional use case; differs only in mechanical mounting and reflow profile compatibility. | Choose based on PCB assembly line requirements - CNFA uses alternate LQFP variant with distinct land pattern and solder paste recommendations. |
Compared with R5F21367CNFP, the R5F21368CNFP#30 provides 16 KB more ROM for enhanced feature sets and larger data buffers; compared with R5F21368CNFA, it shares identical electrical behavior but requires verification of solder mask and stencil design for the PLQP0064KB-A footprint.
Availability
R5F21368CNFP#30 is available at Aetrix Electronics and suitable for audio equipment control, office equipment motor drive, consumer appliance UI, and industrial sensor node applications requiring stable component supply and long-term production continuity.
Supply support for R5F21368CNFP#30 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, and power solutions for automotive, industrial, and IoT markets.
The R8C/36C Group is designed for cost-sensitive, high-integration embedded control in consumer electronics - emphasizing low power, mixed-signal capability, and communication peripherals like LIN and I²C.
FAQ
What is the maximum operating frequency and supply voltage range for the R5F21368CNFP#30?
The R5F21368CNFP#30 operates at up to 20 MHz when supplied at 2.7–5.5 V, and supports reduced-frequency operation down to 5 MHz at 1.8–5.5 V. Its minimum supply voltage of 1.8 V enables compatibility with single-cell Li-ion or multi-cell alkaline systems where brownout resilience is critical.
Does the R5F21368CNFP#30 support hardware LIN communication, and how is it implemented?
Yes, the R5F21368CNFP#30 implements LIN 2.1 via dedicated hardware combining UART0 and TimerRA - eliminating need for external transceivers. The TREO pin serves as LIN TX output, while RXD1/TXD1 handle physical layer signaling, all managed by on-chip LIN protocol logic.
How does the Background Operation (BGO) function work in the R5F21368CNFP#30 data flash?
The R5F21368CNFP#30 supports BGO on its four 1-KB data flash blocks, allowing erase/write operations to proceed asynchronously while CPU executes foreground code. This enables live firmware updates, parameter storage, or calibration data logging without halting real-time tasks like motor control or audio processing.
What timer resources are available for three-phase motor control on the R5F21368CNFP#30?
Timer RD provides two 16-bit channels with four capture/compare registers, supporting complementary PWM output on six pins (TRDIOA0–TRDIOD1), reset-synchronous PWM for synchronized commutation, and triangular/sawtooth modulation - making it suitable for BLDC and PMSM inverter control without external timers.
Is the R5F21368CNFP#30 pin-compatible with other members of the R8C/36C Group?
Yes, all R8C/36C Group MCUs in the PLQP0064KB-A package - including R5F21364CNFP through R5F2136CCNFP - share identical 64-pin LQFP pinout and peripheral mapping. Firmware portability is supported across the family via memory size and feature enablement configuration.
R5F21368CNFP#30 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 64-LQFP
- Series:
- R8C/3x/36C
- Packaging:
- Tray
- Product Status:
- Not For New Designs
- Programmable:
- Not Verified
- Core Processor:
- R8C
- Core Size:
- 16-Bit
- Speed:
- 20MHz
- Connectivity:
- I2C, LINbus, SIO, SSU, UART/USART
- Peripherals:
- POR, PWM, Voltage Detect, WDT
- Number of I/O:
- 59
- Program Memory Size:
- 64KB (64K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 4K x 8
- RAM Size:
- 6K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 5.5V
- Data Converters:
- A/D 12x10b; D/A 2x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -20°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F21368CNFP#30 FAQ
1.How can I place an order for R5F21368CNFP#30 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F21368CNFP#30 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F21368CNFP#30 reliable?
The price and inventory of R5F21368CNFP#30 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F21368CNFP#30 is usually 5 days.
3.What payment methods are accepted for R5F21368CNFP#30?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F21368CNFP#30 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F21368CNFP#30?
R5F21368CNFP#30 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F21368CNFP#30 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F21368CNFP#30?
For technical support, including R5F21368CNFP#30 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F21368CNFP#30 requirements.
6.How does Aetrix verify that R5F21368CNFP#30 is sourced from the original manufacturer or authorized distributors?
All R5F21368CNFP#30 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F21368CNFP#30 meets industry standards.
7.What is the process for return or replacement of R5F21368CNFP#30?
All R5F21368CNFP#30 units undergo pre-shipment inspection (PSI). If there is an issue with R5F21368CNFP#30, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F21368CNFP#30 part is unused and in its original packaging.
Return procedure for R5F21368CNFP#30:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F21368CNFP#30 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

