My Inquiry
My Account
Renesas R5F21368SNFP#30
- Part No.:
- R5F21368SNFP#30
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
R5F21368SNFP#30.pdf
- Description:
- IC MCU 16BIT 64KB FLASH 64LFQFP
- Quantity:
- Payment:
- Shipping:
Inventory:3,078
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F21368SNFP#30 from Renesas Electronics is a 16-bit R8C CPU core microcontroller with 64 KB flash program memory, 6 KB RAM, and 4 KB data flash (1 KB × 4 blocks) supporting background operation (BGO). It integrates a 28-channel electrostatic capacitive touch sensor control unit (TSCU), 10-bit 12-channel ADC, hardware LIN module, UART0/UART2/SSU/I²C serial interfaces, and four independent timers including PWM-capable RC_0 and programmable waveform generator RB2_0 - deployed in consumer appliance control panels requiring low-power, high-EMI-immunity embedded sensing.
For engineers reviewing the R5F21368SNFP#30 datasheet, R5F21368SNFP#30 pinout, R5F21368SNFP#30 application, or R5F21368SNFP#30 equivalent, key selection criteria include its -20°C to +85°C operating range (N version), 64-pin LQFP package (PLQP0064KB-A), on-chip voltage detection with three selectable thresholds, and support for wait/stop low-power modes down to 2.2 µA.
Technical Context
The R5F21368SNFP#30 implements the R8C CPU core with 89 fundamental instructions, 20-bit address space (1 Mbyte), and a dedicated 16×16→32-bit multiplier with multiply-accumulate capability. Its clock system includes dual on-chip oscillators (high-speed adjustable and low-speed 32 kHz), XIN/XOUT and XCIN/XCOUT crystal inputs, and programmable frequency dividers (÷1, ÷2, ÷4, ÷8, ÷16).
Peripheral integration centers on event-driven architecture: the Event Link Controller (ELC) enables 30 sources × 10 event link operations without CPU intervention; the Data Transfer Controller (DTC) provides single-channel DMA with 27 activation sources; and the TSCU supports floating capacitance measurement across 28 dedicated channels using CHxA0–CHxC and CH00–CH35 pins.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | R8C 16-bit core with 89 instructions, 20-bit addressing (1 Mbyte space), 50 ns min instruction time at 20 MHz |
| Memory | 64 KB flash ROM, 6 KB RAM, 4 KB data flash (1 KB × 4 blocks) with BGO and 10,000 erase cycles |
| Operating Voltage | 1.8 V to 5.5 V supply; supports 5 MHz operation down to 1.8 V, 20 MHz up to 5.5 V |
| Power Consumption | Typ. 6.5 mA @ 5.0 V/20 MHz; 4.0 µA in wait mode (32 kHz XCIN); 2.2 µA in stop mode |
| Analog Peripherals | 10-bit 12-channel ADC with sample-and-hold and sweep mode; two comparator B circuits |
| Touch Sensing | Integrated TSCU with 28-channel electrostatic capacitive touch detection (CHxA0–CHxC, CH00–CH35) |
| Timers | Timer RJ_0 (16-bit periodic/pulse output), RB2_0 (16-bit PWM/one-shot), RC_0 (16-bit with 4 capture/compare registers, 3-pin PWM), RE2 (8-bit real-time clock mode) |
| Serial Interfaces | UART0 (2 channels), UART2 (1 channel, I²C-bus mode), SSU_0/I²C_0 (shared function), HW-LIN_0 (1 channel) |
Pinout & Package
Package: 64-pin LQFP (PLQP0064KB-A), 0.5 mm pitch, 10 mm × 10 mm body size, N-version (-20°C to +85°C).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P0_0–P0_7 | CMOS I/O / AN0–AN7 | 8-bit port with analog input capability (AN0–AN7), pull-up resistor selectable, high-current drive |
| P1_0–P1_7 | CMOS I/O / AN8–AN11 / KI0–KI3 | 8-bit port supporting analog inputs (AN8–AN11), key interrupt inputs (KI0–KI3), and LED drive |
| P2_0–P2_7 | CMOS I/O / CH16–CH23 | 8-bit port assigned to TSCU channels CH16–CH23; TRCIOx pins enable touch electrode control |
| P3_0–P3_7 | CMOS I/O / INT1–INT3 / SCL_0 / SDA_0 | 8-bit port with external interrupts (INT1–INT3), I²C bus (SCL_0/SDA_0), SSU (SSI_0/SSCK_0/SSO_0), and LIN interface signals |
| P4_2–P4_7 | VREF / XCIN / XCOUT / XIN / XOUT / RESET | Voltage reference input (VREF), crystal oscillator inputs (XCIN/XCOUT, XIN/XOUT), and active-low reset input |
| P5_0–P5_4, P5_6–P5_7 | CMOS I/O / TRCCLK_0 / TRCTRG_0 | TSCU clock (TRCCLK_0) and trigger (TRCTRG_0) inputs; 9 pins support touch channel routing and timing control |
| P6_0–P6_7 | CMOS I/O / CH31–CH35 / INT4 | 8-bit port with TSCU channels CH31–CH35 and external interrupt INT4; TMRE2O provides divided clock output |
| P8_0–P8_6 | CMOS I/O / CH06–CH08 / CHxA0–CHxC | 7-bit port supporting TSCU channels CH06–CH08 and dedicated touch control pins CHxA0–CHxC |
Key Features
| Feature | Design Value |
|---|---|
| Background Operation (BGO) | Data flash programming/erasing while CPU executes code - enables seamless firmware updates without halting operation |
| Electrostatic Capacitive Touch Control Unit (TSCU) | Hardware-accelerated 28-channel touch sensing with no external components required - reduces BOM and improves noise immunity |
| Event Link Controller (ELC) | 30 peripheral event sources linked to 10 operation types without CPU involvement - lowers latency and frees CPU for application logic |
| Low-Power Operating Modes | Wait mode (4.0 µA @ 32 kHz) and stop mode (2.2 µA) with selective peripheral wake-up - extends battery life in portable appliances |
| Hardware LIN Module | Dedicated LIN 2.1-compliant transceiver using UART0_0/UART0_1 or timer RJ_0 - eliminates need for external LIN transceiver IC |
| Voltage Detection Circuit | Three-point monitoring (VDD, VDET0, VDET1) with programmable thresholds - ensures reliable power-on reset and brown-out protection |
Applications
| Appliance Control Panel | Home Audio System |
|---|---|
Use Scenario: Embedded control of microwave oven or washing machine UI with capacitive touch buttons and status LEDs. IC Role / Device Role / Timing Role: Primary MCU executing user interface logic, managing touch input via TSCU, driving display/LEDs via high-current I/O ports, and communicating with motor controller over UART. Use Value: Integrated TSCU eliminates external touch controller; 64 KB flash accommodates feature-rich UI firmware; low-power modes reduce standby consumption. | Use Scenario: Volume, source selection, and equalizer control in compact stereo receivers with tactile feedback. IC Role / Device Role / Timing Role: System controller handling IR remote decoding, rotary encoder input, audio codec configuration via I²C, and front-panel LED dimming via PWM outputs. Use Value: Dual UART and I²C interfaces enable simultaneous communication with IR receiver, DAC, and display driver; RC_0 timer provides precise 3-pin PWM for LED current control. |
| Office Equipment Keypad | Consumer IoT Hub Interface |
Use Scenario: Keypad and status indicator subsystem in multifunction printers or fax machines. IC Role / Device Role / Timing Role: Dedicated keypad controller scanning matrix keys via P1_0–P1_3 (KI0–KI3), managing paper-jam alerts via comparator B, and relaying status over UART2 to main processor. Use Value: Key interrupt inputs (KI0–KI3) provide immediate response to button press; comparator B monitors analog sensor signals without CPU polling. | Use Scenario: Local control interface for smart home hubs with capacitive sliders and multi-function buttons. IC Role / Device Role / Timing Role: Touch interface processor acquiring raw capacitance data from CHxA0–CHxC and CH00–CH35, performing baseline calibration, and transmitting gesture events via UART0 to host SoC. Use Value: 28-channel TSCU supports complex slider + button layouts; BGO allows touch firmware updates during active use. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F2136ASNFP#30 | 96 KB program ROM, 8 KB RAM - 32 KB more flash and 2 KB more RAM than R5F21368SNFP#30 | Suitable for applications requiring larger firmware image or more runtime variables (e.g., OTA update stack + UI) | Select when firmware size exceeds 64 KB or additional RAM buffers are needed for communication protocols |
| R5F21368SDFP#30 | D-version (-40°C to +85°C) with same memory and peripherals - differs only in extended temperature rating | Required for industrial or automotive cabin environments where ambient temperature drops below -20°C | Choose for deployments outside commercial temperature range; pinout and firmware are identical |
Compared with R5F2136ASNFP#30 and R5F21368SDFP#30, the R5F21368SNFP#30 offers optimal cost/performance balance for consumer-grade appliances operating within -20°C to +85°C, with sufficient memory for touch-enabled UIs and proven EMI/EMS robustness in noisy household environments.
Availability
R5F21368SNFP#30 is available at Aetrix Electronics and suitable for electronic household appliances, office equipment, and audio equipment requiring stable component supply and long-term production continuity.
Supply support for R5F21368SNFP#30 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and consumer markets.
The R8C/36T-A Group, including the R5F21368SNFP#30, was designed for cost-sensitive, EMI-robust embedded control in consumer appliances - integrating touch sensing, LIN, and low-power operation without external support components.
FAQ
What is the maximum CPU clock frequency supported by the R5F21368SNFP#30?
The R5F21368SNFP#30 supports a maximum CPU clock frequency of 20 MHz when operated at VCC = 2.7 V to 5.5 V. At lower supply voltages (1.8 V to 5.5 V), the maximum frequency is reduced to 5 MHz to ensure stable operation - verified in Table 1.2 of the R01DS0055EJ0100 datasheet.
Does the R5F21368SNFP#30 include hardware support for LIN communication?
Yes, the R5F21368SNFP#30 integrates a dedicated hardware LIN module (HW-LIN_0) compliant with LIN 2.1. It uses UART0_0, UART0_1, or timer RJ_0 resources and requires no external transceiver - confirmed in Section 1.2 "Specifications (2)" and Figure 1.2 block diagram of the R01DS0055EJ0100 datasheet.
How many touch sensing channels does the R5F21368SNFP#30 support, and what pins are used?
The R5F21368SNFP#30 supports 28 electrostatic capacitive touch sensing channels via its integrated TSCU. Pins include CHxA0–CHxC (P8_2–P8_5), CH00–CH08 (P1_6, P1_7, P8_0–P8_6), CH10–CH11 (P3_1, P3_6), CH16–CH25 (P2_0–P2_7, P3_2), CH27–CH28 (P5_6–P5_7), and CH31–CH35 (P6_0–P6_4) - detailed in Tables 1.6 and 1.8 of R01DS0055EJ0100.
What low-power modes are available on the R5F21368SNFP#30, and what are their typical current draws?
The R5F21368SNFP#30 offers wait mode (typ. 4.0 µA at VCC = 3.0 V, f(XCIN) = 32 kHz) and stop mode (typ. 2.2 µA at VCC = 3.0 V). Both retain RAM content and allow wake-up via external interrupt or RTC alarm - specified in Table 1.2 "Specifications (2)" of the R01DS0055EJ0100 datasheet.
Is background operation (BGO) supported for data flash programming on the R5F21368SNFP#30?
Yes, the R5F21368SNFP#30 supports background operation (BGO) for its 4 KB data flash (1 KB × 4 blocks), allowing flash erase/program operations to execute concurrently with CPU code execution - explicitly stated in Section 1.1 "Features" and Table 1.2 of the R01DS0055EJ0100 datasheet.
R5F21368SNFP#30 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 64-LQFP
- Series:
- R8C/3x/36T-A
- Packaging:
- Tray
- Product Status:
- Not For New Designs
- Programmable:
- Not Verified
- Core Processor:
- R8C
- Core Size:
- 16-Bit
- Speed:
- 20MHz
- Connectivity:
- I2C, LINbus, SIO, SSU, UART/USART
- Peripherals:
- POR, PWM, Voltage Detect, WDT
- Number of I/O:
- 59
- Program Memory Size:
- 64KB (64K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 4K x 8
- RAM Size:
- 6K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 5.5V
- Data Converters:
- A/D 12x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -20°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F21368SNFP#30 FAQ
1.How can I place an order for R5F21368SNFP#30 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F21368SNFP#30 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F21368SNFP#30 reliable?
The price and inventory of R5F21368SNFP#30 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F21368SNFP#30 is usually 5 days.
3.What payment methods are accepted for R5F21368SNFP#30?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F21368SNFP#30 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F21368SNFP#30?
R5F21368SNFP#30 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F21368SNFP#30 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F21368SNFP#30?
For technical support, including R5F21368SNFP#30 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F21368SNFP#30 requirements.
6.How does Aetrix verify that R5F21368SNFP#30 is sourced from the original manufacturer or authorized distributors?
All R5F21368SNFP#30 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F21368SNFP#30 meets industry standards.
7.What is the process for return or replacement of R5F21368SNFP#30?
All R5F21368SNFP#30 units undergo pre-shipment inspection (PSI). If there is an issue with R5F21368SNFP#30, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F21368SNFP#30 part is unused and in its original packaging.
Return procedure for R5F21368SNFP#30:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F21368SNFP#30 Tags
-
ATTINY4-TSHR
Microchip Technology
-
ATTINY10-TSHR
Microchip Technology
-
ATTINY10-TS8R
Microchip Technology
-
ATTINY202-SSNR
Microchip Technology
-
ATTINY202-SSFR
Microchip Technology
-
ATTINY402-SSNR
Microchip Technology
-
PIC16F15213T-I/MF
Microchip Technology
-
PIC16F15213-E/MF
Microchip Technology
-
PIC10F200T-I/OT
Microchip Technology
-
ATTINY412-SSNR
Microchip Technology
-
PIC10F202T-I/OT
Microchip Technology
-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
