Renesas R5F213G6MNNP#U0

Overview

R5F213G6MNNP from Renesas Electronics is a 16-bit R8C CPU core microcontroller in the R8C/3GM Group, featuring 32 KB flash program ROM, 2.5 KB RAM, and 4 KB data flash with background operation (BGO). It operates at up to 20 MHz (VCC = 2.7–5.5 V), integrates an 10-bit 8-channel ADC, dual 8-bit DACs, LIN hardware module, and supports low-power wait/stop modes down to 2.0 µA. It targets cost-sensitive embedded control in consumer audio and appliance systems.

For engineers reviewing the R5F213G6MNNP datasheet, R5F213G6MNNP pinout, R5F213G6MNNP application, or R5F213G6MNNP equivalent, key selection criteria include its 24-pin HWQFN package, integrated LIN transceiver support via UART0 + Timer RA, BGO-enabled data flash for firmware updates without halting execution, and voltage detection with selectable thresholds for robust power management in battery-backed or wide-input-voltage designs.

Technical Context

The R5F213G6MNNP implements the R8C CPU core with 89 fundamental instructions, 16×16→32-bit hardware multiplier, and multiply-accumulate capability. Its memory map spans 1 Mbyte (00000h–FFFFFh), with program ROM mapped from 08000h–0FFFFh and data flash at 03000h–03FFFh.

It features four independent clock sources: XIN/XOUT (up to 20 MHz crystal/resonator), XCIN/XCOUT (32 kHz), high-speed on-chip oscillator (adjustable), and low-speed on-chip oscillator - all configurable via CM0/CM1 registers and supporting oscillation stop detection and programmable frequency division (1/2/4/8/16).

Key Specifications

Pinout & Package

Package: 24-pin HWQFN (PWQN0024KC-A), 4 mm × 4 mm body, 0.5 mm pin pitch, thermally enhanced with exposed pad.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 16-bit MCU applications.

Compared with R5F213G5MNNP and R5F213G4MNNP, the R5F213G6MNNP provides the largest on-chip memory headroom for future firmware expansion, full BGO-enabled data flash for safe field updates, and extra RAM for dynamic task allocation - making it optimal for products requiring long-term maintainability and feature scalability.

Availability

R5F213G6MNNP is available at Aetrix Electronics and suitable for audio equipment, home appliance control, office device UI, and consumer remote hub applications requiring stable component supply across multi-year production cycles.

Supply support for R5F213G6MNNP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, and power solutions for automotive, industrial, and consumer markets.

The R8C/3GM Group was designed for cost-optimized, low-power embedded control in consumer electronics - emphasizing integration of LIN, ADC/DAC, and BGO flash to reduce system component count and simplify firmware maintenance.

FAQ

What is the maximum operating frequency and supply voltage range for the R5F213G6MNNP?

The R5F213G6MNNP operates at up to 20 MHz when supplied with 2.7–5.5 V, and supports reduced-frequency operation (5 MHz) down to 1.8 V for ultra-low-voltage applications. Its R8C CPU core achieves a minimum instruction execution time of 50 ns at 20 MHz, enabling responsive real-time control in audio and motor drive systems. The R5F213G6MNNP maintains full peripheral functionality across this entire voltage range.

Does the R5F213G6MNNP support hardware LIN communication, and how is it implemented?

Yes, the R5F213G6MNNP includes a dedicated hardware LIN module compliant with LIN 2.0/2.1 standards. It combines UART0 for serial framing and Timer RA for precise baud rate generation and synchronization, eliminating software bit-banging overhead. The R5F213G6MNNP uses pin P3_7 (TRAO) as the LIN output signal, requiring only an external LIN transceiver (e.g., TJA1020) for physical layer compliance.

How does the Background Operation (BGO) function work in the R5F213G6MNNP data flash?

The R5F213G6MNNP's data flash supports true background operation: while the CPU executes application code from program ROM, the flash controller can simultaneously erase or program any of the four 1 KB blocks (A–D). This enables safe firmware updates, calibration data storage, or parameter changes without halting system operation - critical for uninterrupted audio playback or motor control during field upgrades.

What are the low-power modes available on the R5F213G6MNNP, and what are their typical current draws?

The R5F213G6MNNP offers wait mode (3.5 µA @ 3.0 V, 32 kHz XCIN clock) and stop mode (2.0 µA @ 3.0 V), both retaining RAM content and allowing wake-up via interrupts or external events. These modes are controlled by system clock registers (CM0/CM1) and are optimized for battery-powered remotes or standby functions in appliances. The R5F213G6MNNP achieves these figures without external circuitry, using only internal oscillators.

Can the R5F213G6MNNP's ADC and DAC share the same reference voltage pin, and what is its role?

Yes, the R5F213G6MNNP uses pin 24 (P4_2/VREF) as a common reference input for both its 10-bit 8-channel ADC and dual 8-bit DACs. This pin accepts an external precision voltage (e.g., 2.5 V or 3.3 V) to define the full-scale range for analog conversions and outputs, ensuring matched gain and improved system accuracy. Using a shared VREF eliminates mismatch errors between sensing and actuation paths in closed-loop control.