Renesas R5F213J6TNNP#YC
- Part No.:
- R5F213J6TNNP#YC
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 40-XFQFN Exposed Pad
- Datasheet:
-
R5F213J6TNNP#YC.pdf
- Description:
- IC MCU 16BIT 32KB FLASH 40HXQFN
- Quantity:
- Payment:

- Shipping:

Inventory:3,412
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Product details
Overview
R5F213J6TNNP from Renesas is a 16-bit R8C/3JT Group microcontroller featuring an R8C CPU core, 32 KB flash program ROM, 2.5 KB RAM, and 4 KB data flash with background operation (BGO). It operates at up to 20 MHz (VCC = 2.7–5.5 V), integrates UART0/UART2 (with I²C mode), LIN hardware module, 10-bit × 12-channel ADC, and electrostatic capacitive touch sensing - deployed in consumer audio equipment and office automation systems.
For engineers reviewing the R5F213J6TNNP datasheet, R5F213J6TNNP pinout, R5F213J6TNNP application, or R5F213J6TNNP equivalent, key selection criteria include its 40-pin HXQFN package (PXQN0040LA-A), −20°C to +85°C industrial temperature grade, on-chip debug support, and hardware LIN compliance for automotive body electronics integration.
Technical Context
The R5F213J6TNNP implements the R8C CPU core with 89 fundamental instructions, 16×16→32-bit multiplier, and multiply-accumulate capability. Its memory map spans 1 Mbyte, with fixed interrupt vector table at 0FFDCh–0FFFFh and data flash blocks A–D mapped at 03000h–03FFFh.
Peripheral subsystems include Timer RA/RB (8-bit) and Timer RC (16-bit with 4 capture/compare registers), DTC with 22 activation sources, and dual UARTs supporting clock-synchronous serial I/O, I²C-bus (UART2), and hardware LIN protocol via shared resources (Timer RA + UART0).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | R8C 16-bit core with 89 instructions, 50 ns min instruction time at 20 MHz |
| Memory | 32 KB flash ROM, 2.5 KB RAM, 4 KB data flash (1 KB × 4 blocks) with BGO |
| Operating Voltage | 1.8 V to 5.5 V - supports low-voltage operation down to 1.8 V at 5 MHz |
| ADC | 10-bit resolution × 12 channels with sample-and-hold and sweep mode |
| Timers | Timer RA/RB (8-bit × 2), Timer RC (16-bit × 1 with 4 capture/compare registers) |
| Serial Interfaces | UART0 (asynchronous), UART2 (I²C-bus mode, SSU, multiprocessor comms), hardware LIN |
| Package | 40-pin HXQFN (PXQN0040LA-A), 5 mm × 5 mm, 0.4 mm pitch, N-grade (−20°C to +85°C) |
Pinout & Package
Package: 40-pin HXQFN (PXQN0040LA-A), 5 mm × 5 mm body, 0.4 mm pin pitch, exposed thermal pad, RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / AVCC | Power supply input / Analog reference | Dual-supply pins: VCC powers digital logic (1.8–5.5 V); AVCC isolates analog section (ADC, sensor unit) |
| VSS / AVSS | Ground return / Analog ground | Separate ground paths reduce noise coupling into ADC and touch sensing circuits |
| XIN / XOUT | Crystal oscillator interface | Supports external crystal/resonator (1–20 MHz) or external clock input on XOUT |
| RESET | Active-low reset input | Asynchronous reset assertion halts CPU and initializes peripherals; internal pull-up enabled |
| P0_0–P0_7 | General-purpose I/O ports | CMOS I/O with programmable direction, pull-up resistors, and high-current drive (LED sink/source) |
| AN0–AN11 | Analog inputs | 12 dedicated ADC input pins with internal sample-and-hold; share physical pins with P0–P3 ports |
| TRCIOA–TRCIOD | Timer RC I/O terminals | Four configurable I/O pins for capture/compare, PWM output, and external trigger routing |
Key Features
| Feature | Design Value |
|---|---|
| Data flash with BGO | Enables firmware updates or parameter storage without halting CPU execution |
| Hardware LIN module | Offloads LIN protocol handling (break detection, sync, PID, checksum) from CPU using UART0 + Timer RA |
| Electrostatic capacitive touch unit | 22-channel touch sensing with CHxA/B/C control pins and SCUTRG external trigger |
| Low-power operating modes | Wait mode (3.5 µA) and stop mode (2.0 µA) enable battery-powered appliance standby |
| On-chip debug interface | Full in-circuit debugging via single-wire interface without external emulator hardware |
Applications
| Audio Equipment Control | Office Automation Devices |
|---|---|
Use Scenario: Volume control, source selection, and display management in compact stereo receivers and Bluetooth speakers. IC Role / Device Role / Timing Role: Main system controller executing real-time UI response, ADC-based potentiometer reading, and UART-driven display updates. Use Value: Integrated 12-channel ADC and capacitive touch support eliminate external signal conditioning ICs and reduce BOM count by ≥2 components. | Use Scenario: Keypad scanning, status LED control, and sensor monitoring in multifunction printers and document scanners. IC Role / Device Role / Timing Role: Peripheral coordinator managing button interrupts (KI0–KI3), PWM-driven LEDs, and UART communication with host PC. Use Value: Hardware LIN and dual UARTs allow seamless integration with internal motor drivers and external USB-to-UART bridges without external level shifters. |
| Consumer Appliance UI | Industrial Sensor Node |
Use Scenario: Touch-sensitive control panel in microwave ovens and induction cooktops with EMI-hardened operation. IC Role / Device Role / Timing Role: Capacitive touch acquisition engine with CH0–CH21 inputs and noise-immune sweep mode timing. Use Value: On-die touch sensing eliminates external touch controller ICs and reduces PCB layer count by enabling direct electrode routing to MCU pins. | Use Scenario: Low-power environmental monitoring node collecting temperature/humidity via I²C sensors and transmitting via UART to gateway. IC Role / Device Role / Timing Role: Sensor hub with UART2 in I²C-bus mode communicating with external sensors, entering stop mode between readings. Use Value: 2.0 µA stop-mode current and integrated voltage detection circuit extend battery life beyond 5 years in coin-cell-powered deployments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F213J5TNNP | 24 KB program ROM, 2 KB RAM - 8 KB less flash and 512 B less RAM than R5F213J6TNNP | Suitable for simpler UI firmware with reduced feature set; no change in peripheral count or pinout | Select when firmware size remains under 24 KB and BOM cost optimization is prioritized over future code expansion headroom |
| R5F213J6TDNP | Identical memory and peripherals, but in 40-pin LQFP package (TDNP) instead of HXQFN (TNNP) | Preferred for through-hole prototyping or legacy PCB designs requiring larger pitch and easier rework | Choose for manual assembly, test fixture compatibility, or thermal design requiring exposed pad absence |
Compared with R5F213J5TNNP and R5F213J6TDNP, the R5F213J6TNNP delivers maximum on-chip memory in the smallest footprint, enabling higher integration density in space-constrained consumer enclosures while retaining full peripheral compatibility across the R8C/3JT family.
Availability
R5F213J6TNNP is available at Aetrix Electronics and suitable for audio equipment control, office automation devices, and consumer appliance UI requiring stable component supply and long-term industrial temperature support.
Supply support for R5F213J6TNNP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The R8C/3JT Group was designed for cost-sensitive, low-power embedded control in consumer electronics - emphasizing integrated analog peripherals, capacitive touch, and hardware protocol acceleration (LIN/I²C) to minimize external component count.
FAQ
What is the maximum operating frequency and voltage range for the R5F213J6TNNP?
The R5F213J6TNNP operates at up to 20 MHz when supplied with 2.7–5.5 V, and supports reduced-frequency operation down to 5 MHz at 1.8–5.5 V. This dual-voltage/frequency capability enables flexible power management in battery- and line-powered consumer devices while maintaining full peripheral functionality across the specified range.
Does the R5F213J6TNNP support hardware LIN communication?
Yes, the R5F213J6TNNP integrates a dedicated hardware LIN module that uses Timer RA and UART0 to implement full LIN 2.1/2.2 protocol handling - including break detection, sync field processing, identifier filtering, and checksum generation - without CPU intervention during frame transmission and reception.
How many analog input channels does the R5F213J6TNNP ADC support, and what resolution is provided?
The R5F213J6TNNP features a 10-bit successive-approximation ADC with 12 analog input channels (AN0–AN11), each supporting sample-and-hold and programmable sweep mode. All channels are multiplexed onto GPIO pins P0–P3, allowing simultaneous analog sensing and digital I/O use via software configuration.
What debug capabilities are built into the R5F213J6TNNP?
The R5F213J6TNNP includes on-chip debug support accessible via a single-wire interface, enabling full breakpoint control, register inspection, memory read/write, and flash programming without external JTAG emulators. Debug functions are retained even when ROM code protection is enabled, supporting secure field firmware updates.
Is the R5F213J6TNNP pin-compatible with other members of the R8C/3JT Group?
Yes, all R8C/3JT Group MCUs - including R5F213J4TNNP, R5F213J5TNNP, and R5F213J6TNNP - share identical 40-pin HXQFN (PXQN0040LA-A) packaging and pin assignments. Firmware and hardware designs can scale across memory variants without PCB revision, provided peripheral usage stays within the target device's resource limits.
R5F213J6TNNP#YC Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 40-XFQFN Exposed Pad
- Series:
- R8C/3x/3JT
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- R8C
- Core Size:
- 16-Bit
- Speed:
- 20MHz
- Connectivity:
- I2C, UART/USART
- Peripherals:
- POR, PWM, Voltage Detect, WDT
- Number of I/O:
- 31
- Program Memory Size:
- 32KB (32K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 4K x 8
- RAM Size:
- 2.5K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 5.5V
- Data Converters:
- A/D 12x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -20°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F213J6TNNP#YC FAQ
1.How can I place an order for R5F213J6TNNP#YC through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F213J6TNNP#YC on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
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The price and inventory of R5F213J6TNNP#YC are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F213J6TNNP#YC is usually 5 days.
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5.How can I obtain technical support or documentation for R5F213J6TNNP#YC?
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6.How does Aetrix verify that R5F213J6TNNP#YC is sourced from the original manufacturer or authorized distributors?
All R5F213J6TNNP#YC products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F213J6TNNP#YC meets industry standards.
7.What is the process for return or replacement of R5F213J6TNNP#YC?
All R5F213J6TNNP#YC units undergo pre-shipment inspection (PSI). If there is an issue with R5F213J6TNNP#YC, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F213J6TNNP#YC part is unused and in its original packaging.
Return procedure for R5F213J6TNNP#YC:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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