Renesas R5F35MCEJFF
- Part No.:
- R5F35MCEJFF
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
R5F35MCEJFF.pdf
- Description:
- IC MCU 16BIT 256KB FLASH 64LFQFP
- Quantity:
- Payment:

- Shipping:

Inventory:4,343
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F35MCEJFF from Renesas is a 16-bit microcontroller in the M16C/5M Group featuring the M16C/60 Series CPU core, 256 KB program ROM, 20 KB RAM, dual-channel CAN interface, and 64-pin LQFP (PLQP0064KB-A) package. It operates at up to 32 MHz across 3.0–5.5 V and supports automotive control, factory automation LAN, and industrial motor control with integrated LIN, 10-bit ADC (16 channels), 8-bit DAC, and three-phase motor timer.
For engineers reviewing the R5F35MCEJFF datasheet, R5F35MCEJFF pinout, R5F35MCEJFF application, or R5F35MCEJFF equivalent, key selection criteria include dual-CAN channel support, -40°C to +85°C operating temperature, on-chip E2dataFlash (100,000 write/erase cycles), and compatibility with M16C/5L and M16C/56 Group peripherals and pin assignments.
Technical Context
The R5F35MCEJFF implements the M16C/60 Series CPU core with 16×16-bit multiplier and multiply-accumulate unit, enabling high-speed deterministic control for real-time motor and communication tasks. Its dual-channel CAN module uses 32-slot message buffers per channel and supports ISO 11898-1 compliant communication with programmable bit timing.
Integrated peripherals include four UARTs (one with I²C/IEBus), multi-master I²C-bus, serial bus interface, CRC calculator (CRC-CCITT/CRC-16), and dedicated 125 kHz on-chip oscillator for watchdog timer operation - all coordinated via a 4-channel DMAC supporting cycle-steal transfers with 41 trigger sources.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | M16C/60 Series with 16×16-bit multiplier and MAC unit; enables fast arithmetic for motor control and signal processing. |
| Memory | 256 KB program ROM, 20 KB RAM, 4 KB ×2 data flash, 4 KB E2dataFlash (100,000 write/erase cycles). |
| CAN Interface | Dual-channel CAN with 32-slot message buffer per channel; supports automotive network topologies requiring redundancy or multi-bus routing. |
| Analog Peripherals | 10-bit ADC with 16 input channels; 8-bit DAC with 1 channel; voltage reference and analog supply pins (AVCC/AVSS/VREF) provided. |
| Timers | Five 16-bit Timer A units (PWM, encoder input); three 16-bit Timer B units (frequency/pulse-width measurement); one three-phase motor control timer. |
| Package & Temp | 64-pin plastic LQFP (PLQP0064KB-A); industrial-grade operating range of -40°C to +85°C (J-version). |
| Serial Interfaces | Four UARTs (UART0–UART3), one multi-master I²C-bus, one serial bus interface (4-wire, 8–16-bit programmable length), and one LIN module. |
Pinout & Package
64-pin plastic mold LQFP package (PLQP0064KB-A, previous code: 64P6Q-A), 10 mm × 10 mm body, 0.5 mm pitch, exposed pad optional.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P0_0–P0_7 | CMOS I/O port with analog input (AN0_0–AN0_7) | 8-bit bidirectional port; supports ADC channel 0 inputs and general-purpose digital I/O with pull-up resistor option. |
| P1_0–P1_3 | CMOS I/O port with analog input (AN2_0–AN2_3) | 4-bit analog-capable port; used for secondary ADC group and key interrupt inputs (KI0–KI3 on P10). |
| P9_0–P9_7 | Multi-function port (CLKOUT, TXD4/RXD4, AN2_4–AN2_7, CTX0/CRX0) | Supports UART4, clock output, analog inputs, and CAN transceiver interface signals (CTX0/CRX0 only on M16C/5M Group). |
| P10_0–P10_7 | Analog input port (AN_0–AN_7) with key interrupt (KI0–KI3) | 8-channel ADC input group; KI0–KI3 enable low-power wake-up from stop mode using external keypad events. |
| P6_0–P6_7 | UART0/UART1 control (TXD0/RXD0, TXD1/RXD1), RTCOUT, CTS/RTS | Primary UART interface with hardware flow control; RTCOUT provides real-time clock output signal. |
| P7_0–P7_7 | LIN0IN/LIN0OUT, TA0–TA4 timers, CRX1/CTX1, SDA2/SCL2 | Integrates LIN physical layer, five timer capture/compare channels, second CAN transceiver interface, and I²C-bus master/slave. |
| XIN/XOUT | Main system clock crystal oscillator input/output | Supports external crystal (1–20 MHz) for precise timing; PLL frequency synthesizer derives 32 MHz CPU clock. |
| XCIN/XCOUT | Sub-clock oscillator input/output | Connects 32.768 kHz crystal for real-time clock and low-power modes; independent of main clock domain. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-channel CAN interface | Two independent CAN controllers with 32-slot message buffers each; enables redundant bus architecture or multi-network gateway functions. |
| E2dataFlash memory | On-chip serial E²PROM-emulated data flash (4 KB) rated for 100,000 write/erase cycles; eliminates need for external nonvolatile storage in firmware updates. |
| Three-phase motor control timer | Hardware timer block using TA1, TA2, TA4, and TB2; generates complementary PWM with programmable dead time for inverter gate drivers. |
| 125 kHz watchdog oscillator | Dedicated on-chip RC oscillator powers watchdog timer independently of main clock; ensures reliable reset during clock failure or software hang. |
| Multi-master I²C-bus | Full I²C-bus implementation supporting master and slave roles; enables direct connection to sensors, EEPROMs, and display controllers without protocol translation. |
Applications
| Automotive Body Control Module | Factory Automation Gateway |
|---|---|
Use Scenario: Centralized control of door locks, lighting, wipers, and HVAC in passenger vehicles using CAN FD-compatible networks. IC Role / Device Role / Timing Role: Primary MCU executing body control logic, managing dual-CAN bus arbitration, and coordinating LIN slave nodes (e.g., mirror controls, seat modules). Use Value: Dual CAN channels allow separation of powertrain-critical and comfort-system traffic; E2dataFlash stores calibration data and fault logs without external memory. | Use Scenario: Protocol translation between PLC fieldbus (e.g., Profibus) and shop-floor Ethernet/IP devices in smart manufacturing cells. IC Role / Device Role / Timing Role: Real-time gateway processor handling CAN message filtering, I²C sensor aggregation, and UART-based serial protocol bridging. Use Value: Integrated UARTs (4), I²C, LIN, and CAN reduce external interface IC count; 32 MHz CPU ensures deterministic latency for motion control synchronization. |
| Industrial Motor Drive Controller | Home Appliance Inverter System |
Use Scenario: Closed-loop speed/torque control of 3-phase AC induction motors in pumps, compressors, and conveyors. IC Role / Device Role / Timing Role: Real-time motor controller executing FOC algorithms, generating gated PWM outputs, and sampling current/voltage feedback via 10-bit ADC. Use Value: Hardware three-phase motor timer with dead-time insertion eliminates software timing jitter; 16-channel ADC supports simultaneous current sensing and thermal monitoring. | Use Scenario: Variable-speed drive for washing machine drum and dryer blower using sensorless vector control. IC Role / Device Role / Timing Role: Main inverter MCU managing motor commutation, user interface (key interrupts), and energy metering via ADC/DAC. Use Value: Key interrupt inputs (KI0–KI3) enable ultra-low-power wake-up from stop mode; on-chip DAC generates analog reference for power supply monitoring circuits. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F35MCEKFF | Same functionality but rated for -40°C to +125°C operating temperature; K-version replaces J-version for under-hood automotive use. | Required where ambient temperature exceeds +85°C (e.g., engine bay ECUs); not suitable for cost-sensitive consumer applications needing only industrial temp grade. | Select R5F35MCEKFF when extended temperature compliance is mandatory; verify thermal design margins before substitution. |
| R5F35MB3JFE | 80-pin LQFP variant with identical dual-CAN, E2dataFlash, and CPU core but reduced memory (96 KB ROM / 8 KB RAM) and higher pin count. | Suitable for designs requiring more GPIO or peripheral signal routing flexibility; incompatible pinout prevents drop-in replacement in 64-pin layouts. | Choose R5F35MB3JFE only if additional I/O or analog channels are needed and PCB layout allows 80-pin footprint. |
Compared with R5F35MCEJFF, R5F35MCEKFF extends thermal capability without functional change, while R5F35MB3JFE trades package size for I/O scalability - neither offers pin-to-pin compatibility, so layout revision is required for either alternative.
Availability
R5F35MCEJFF is available at Aetrix Electronics and suitable for automotive body control, factory automation gateways, and industrial motor drives requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for R5F35MCEJFF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a Japanese semiconductor manufacturer specializing in microcontrollers, analog, and power management ICs for automotive, industrial, and IoT applications.
The M16C/5M Group was designed for real-time embedded control in safety-critical automotive and industrial systems, emphasizing dual-CAN reliability, motor control acceleration, and on-chip nonvolatile data storage.
FAQ
What is the maximum operating frequency and supply voltage range for the R5F35MCEJFF?
The R5F35MCEJFF operates at a maximum CPU frequency of 32 MHz with a supply voltage range of 3.0 V to 5.5 V. This wide voltage window supports direct integration with 3.3 V and 5 V system rails without level-shifting, and the internal PLL derives the 32 MHz clock from lower-frequency crystals or oscillators.
Does the R5F35MCEJFF include on-chip nonvolatile memory beyond program flash?
Yes, the R5F35MCEJFF includes 4 KB of E2dataFlash - an on-chip serial E²PROM-emulated data flash memory rated for 100,000 write/erase cycles. This memory is separate from program ROM and data flash, and is intended for storing calibration data, configuration parameters, and event logs without requiring external EEPROM.
How many CAN channels does the R5F35MCEJFF support, and what is the buffer architecture?
The R5F35MCEJFF supports two independent CAN channels, each with a 32-slot message buffer. Each slot can be configured as transmit or receive, and the hardware handles message acceptance filtering, automatic retransmission, and error confinement - enabling robust multi-bus networking in automotive and industrial applications.
What analog peripherals are integrated into the R5F35MCEJFF?
The R5F35MCEJFF integrates a 10-bit successive-approximation ADC with 16 input channels (grouped across P0, P1, P9, and P10), an 8-bit DAC with one output channel, dedicated analog supply pins (AVCC, AVSS), and a voltage reference input (VREF). These support precision sensor interfacing and analog signal generation in closed-loop control systems.
Is the R5F35MCEJFF pin-compatible with other members of the M16C/5M Group?
No, the R5F35MCEJFF is not pin-compatible with other M16C/5M Group members due to its 64-pin LQFP (PLQP0064KB-A) package. While it shares peripheral function sets and register-level compatibility with 80-pin and 100-pin variants, pin assignments differ significantly - requiring unique PCB layout and signal routing for the 64-pin footprint.
R5F35MCEJFF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 64-LQFP
- Series:
- M16C/5M
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- M16C/60
- Core Size:
- 16-Bit
- Speed:
- 32MHz
- Connectivity:
- I2C, UART/USART
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 54
- Program Memory Size:
- 256KB (256K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 12K x 8
- RAM Size:
- 20K x 8
- Voltage - Supply (Vcc/Vdd):
- 3V ~ 5.5V
- Data Converters:
- A/D 16x10b; D/A 1x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F35MCEJFF FAQ
1.How can I place an order for R5F35MCEJFF through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F35MCEJFF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F35MCEJFF reliable?
The price and inventory of R5F35MCEJFF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F35MCEJFF is usually 5 days.
3.What payment methods are accepted for R5F35MCEJFF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F35MCEJFF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F35MCEJFF?
R5F35MCEJFF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F35MCEJFF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F35MCEJFF?
For technical support, including R5F35MCEJFF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F35MCEJFF requirements.
6.How does Aetrix verify that R5F35MCEJFF is sourced from the original manufacturer or authorized distributors?
All R5F35MCEJFF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F35MCEJFF meets industry standards.
7.What is the process for return or replacement of R5F35MCEJFF?
All R5F35MCEJFF units undergo pre-shipment inspection (PSI). If there is an issue with R5F35MCEJFF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F35MCEJFF part is unused and in its original packaging.
Return procedure for R5F35MCEJFF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F35MCEJFF Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

