Renesas R5F51113ADFK#5A
- Part No.:
- R5F51113ADFK#5A
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
R5F51113ADFK#5A.pdf
- Description:
- IC MCU 32BIT 64KB FLASH 64LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:1,000
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Product details
Overview
R5F51113ADFK#5A from Renesas is a 32-bit RX CPU-based microcontroller operating at up to 32 MHz (50 DMIPS), featuring 64 KB on-chip flash, 10 KB SRAM, 8 KB data flash, 14-channel 12-bit A/D converter (1.0 µs conversion), dual 8-bit D/A outputs, USB 2.0 full-speed host/function/OTG, and RTC with calendar mode - deployed in industrial HMI and sensor gateway edge nodes.
For engineers reviewing the R5F5113ADFK#5A datasheet, R5F5113ADFK#5A pinout, R5F5113ADFK#5A application, or R5F5113ADFK#5A equivalent, key selection criteria include its 64-pin LQFP (PLQP0064GA-A) package, −40°C to +85°C temperature grade, integrated E2 data flash endurance (1M erase/write cycles), low-power software standby mode (0.44 µA), and USB OTG support with BC (Battery Charger) detection.
Technical Context
The R5F5113ADFK#5A implements a CISC Harvard-architecture RX core with five-stage pipeline, variable-length instructions, and 64-bit accumulator for single-cycle 32×32 multiply-accumulate operations. It integrates a dedicated 15 kHz IWDT oscillator and clock frequency accuracy measurement circuit (CAC) for IEC 60730 compliance.
Its peripheral set includes an Event Link Controller (ELC) enabling direct module-to-module triggering without CPU intervention, a Data Transfer Controller (DTC) supporting chain transfers across four modes, and MTU2 timers with complementary PWM and phase counting - all synchronized to independently configurable ICLK, PCLK, and FCLK domains.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RX 32-bit CISC Harvard, 32 MHz max, 50 DMIPS, 64-bit accumulator, 73 basic + 9 DSP instructions |
| Memory | 64 KB flash (no wait states @32 MHz), 10 KB SRAM, 8 KB data flash (1M erase/write cycles) |
| Analog Peripherals | 14-channel 12-bit A/D (1.0 µs min conversion), 2-channel 8-bit D/A, integrated temperature sensor |
| Communication | USB 2.0 full-speed host/function/OTG (12 Mbps), 3× SCI, 1× RIIC (400 kbps), 1× RSPI (16 Mbps) |
| Timers & Control | 6-channel MTU2 (PWM/complementary output/phase count), 2× CMT, RTC with leap-year adjustment |
| Power & Environment | 1.8–3.6 V supply, −40°C to +85°C operation, software standby current = 0.44 µA, wake-up time = 4.8 µs |
Pinout & Package
Package: 64-pin LQFP (PLQP0064GA-A), 14 × 14 mm, 0.8 mm pitch, lead-free (Sn only), RoHS compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / VSS | Power supply / Ground | Dual power domains: digital (VCC/VSS) and USB (VCC_USB/VSS_USB); AVCC0/AVSS0 isolate analog ADC reference |
| XTAL / EXTAL | Main crystal oscillator interface | Supports external 1–20 MHz crystal; internal PLL accepts 4–8 MHz input for 32 MHz system clock |
| USB0_DP / USB0_DM | USB 2.0 differential data pair | On-chip transceiver supports full-speed (12 Mbps) host/function/OTG; requires external 1.5 kΩ pull-up on DP for device mode |
| AN000–AN015 | Analog input channels | 14 of 16 pins mapped to 12-bit A/D; supports double-trigger mode for motor control current sampling |
| DA0 / DA1 | 8-bit D/A analog outputs | Only available on 64-pin packages (e.g., R5F5113ADFK#5A); output range = 0 V to VCC, rail-to-rail |
| MTIOC0A–MTIOC5W | MTU2 timer I/O | 24-pin timer resource pool enabling complementary PWM, input capture, and encoder phase counting across 6 channels |
Key Features
| Feature | Design Value |
|---|---|
| IEC 60730 Support | Integrated CAC, IWDT, RAM test assist, and voltage monitoring circuits enable Class B safety certification without external components |
| Background Operation | Data flash (E2) supports BGO: program/erase while CPU executes code from main flash - critical for firmware updates in fielded devices |
| Event-Driven Architecture | ELC links 35 event sources (e.g., timer overflows, ADC completion) directly to peripherals - eliminates interrupt latency and CPU load during real-time tasks |
| Low-Power Flexibility | Three low-power modes (sleep/deep sleep/software standby); software standby draws just 0.44 µA and wakes in 4.8 µs via RTC alarm or external IRQ |
| USB OTG + BC Detection | Single-port USB controller supports host/device/OTG roles; built-in BC 1.2 detection enables automatic charger identification and current negotiation |
Applications
| Industrial Sensor Gateway | Smart Home HMI Controller |
|---|---|
Use Scenario: Edge node aggregating RS485 Modbus sensors, local display, and USB-connected configuration tool. IC Role / Device Role / Timing Role: Main MCU executing protocol stack, driving SPI LCD, managing USB CDC virtual COM port, and timestamping sensor data via RTC. Use Value: Integrated USB OTG eliminates need for external PHY; 14-channel A/D samples multiple analog sensors simultaneously; software standby enables battery-backed operation at <1 µA average current. |
Use Scenario: Touch-enabled wall panel controlling lighting, HVAC, and security with local UI and cloud sync. IC Role / Device Role / Timing Role: Application processor handling capacitive touch decoding, RGB display timing, and encrypted Wi-Fi module communication via UART/SCI. Use Value: Dual 8-bit D/A outputs drive audio feedback tones; MTU2 complementary PWM controls LED dimming; 64 KB flash accommodates bootloader + dual-application image for OTA updates. |
| Portable Medical Monitor | Energy Meter Front-End |
Use Scenario: Battery-powered pulse oximeter acquiring photodiode signals, computing SpO₂, and logging data to SD card via SPI. IC Role / Device Role / Timing Role: Signal acquisition MCU performing synchronous dual-channel A/D sampling, real-time FFT preprocessing, and CRC-protected data storage. Use Value: 1.0 µs A/D conversion enables >1 MSPS effective sampling; temperature sensor calibrates optical path drift; 8 KB data flash stores calibration coefficients with 1M-cycle endurance. |
Use Scenario: DIN-rail meter measuring voltage/current harmonics, calculating kWh, and reporting via RS485 and USB. IC Role / Device Role / Timing Role: Metrology co-processor synchronizing 12-bit A/D conversions to zero-crossing events using MTU2-triggered sampling. Use Value: Double-trigger A/D mode captures simultaneous voltage/current samples for accurate power factor calculation; RTC calendar mode logs tamper events with date/time stamps. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F51113ADFM#3A | Same core, memory, and peripherals; differs only in package: 64-pin LFQFP (PLQP0064KB-A, 10×10 mm, 0.5 mm pitch) vs. LQFP (14×14 mm, 0.8 mm pitch) | Requires PCB layout change due to larger pad pitch and footprint; identical firmware and pin function mapping | Select for higher-density layouts where 0.5 mm pitch is preferred and thermal dissipation allows smaller body size. |
| R5F51113ADFL#3A | 48-pin LFQFP (PLQP0048KB-A); reduced I/O count (30 vs. 46), no D/A converters, only 10 A/D channels (vs. 14), no USB OTG support | Suitable for cost-sensitive, space-constrained designs omitting USB connectivity and analog output requirements | Choose when USB host/OTG and dual D/A are unnecessary, and board area or BOM cost must be minimized. |
Compared with R5F5113ADFK#5A, the R5F5113ADFM#3A offers identical functionality in a smaller 10×10 mm footprint but demands finer-pitch assembly, while R5F5113ADFL#3A sacrifices USB OTG, D/A, and 4 A/D channels to reduce pin count and cost - making it viable only where those features are excluded from the system architecture.
Availability
R5F5113ADFK#5A is available at Aetrix Electronics and suitable for industrial sensor gateways, smart home HMI controllers, and portable medical monitors requiring stable component supply, long-term lifecycle assurance, and automotive-grade reliability validation.
Supply support for R5F5113ADFK#5A includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for industrial, automotive, and IoT markets.
The RX111 Group, including R5F5113ADFK#5A, was designed for cost-sensitive, low-power embedded applications demanding USB connectivity, rich analog integration, and functional safety support - targeting industrial automation and consumer edge devices.
FAQ
What is the maximum operating frequency and core performance of the R5F5113ADFK#5A?
The R5F5113ADFK#5A operates at a maximum frequency of 32 MHz and delivers 50 DMIPS of processing performance. Its RX CPU core features a five-stage pipeline, 64-bit accumulator for single-cycle 32×32 multiply-accumulate operations, and ultra-compact variable-length instruction encoding - enabling efficient code density and deterministic real-time execution critical for R5F5113ADFK#5A-based control applications.
Does the R5F5113ADFK#5A support USB On-The-Go (OTG) and Battery Charging (BC) detection?
Yes, the R5F5113ADFK#5A integrates a USB 2.0 host/function module that fully supports OTG and BC 1.2 detection. It includes dedicated hardware for identifying downstream charging ports (SDP, CDP, DCP) and negotiating current limits without firmware overhead - a key capability confirmed in the R5F5113ADFK#5A datasheet section "USB 2.0 host/function module (USBc)" and validated in Renesas application note R01AN2313.
What are the memory resources available on the R5F5113ADFK#5A?
The R5F5113ADFK#5A provides 64 KB of on-chip flash memory (executed at full 32 MHz with zero wait states), 10 KB of SRAM, and 8 KB of data flash rated for 1,000,000 erase/write cycles. The data flash supports Background Operation (BGO), allowing concurrent code execution and nonvolatile parameter storage - a verified feature essential for firmware updates and calibration retention in R5F5113ADFK#5A deployments.
How many analog-to-digital and digital-to-analog channels does the R5F5113ADFK#5A include?
The R5F5113ADFK#5A integrates a 12-bit A/D converter with up to 14 input channels and a minimum conversion time of 1.0 µs at 32 MHz ADCLK, plus two independent 8-bit D/A converter channels. Both analog peripherals are confirmed functional only on 64-pin packages like the R5F5113ADFK#5A - per Table 1.2 "Comparison of Functions for Different Packages" in the official datasheet R01DS0190EJ0130.
What low-power modes and wake-up capabilities does the R5F5113ADFK#5A support?
The R5F5113ADFK#5A supports three low-power modes: Sleep, Deep Sleep, and Software Standby. In Software Standby mode, it draws just 0.44 µA and wakes in 4.8 µs via RTC alarm, external IRQ, or USB resume signal. This behavior is specified in the "Low power consumption functions" section of the R5F5113ADFK#5A datasheet and validated across temperature ranges from −40°C to +85°C.
R5F51113ADFK#5A Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 64-LQFP
- Series:
- RX111
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- RX
- Core Size:
- 32-Bit Single-Core
- Speed:
- 32MHz
- Connectivity:
- I2C, SCI, SPI, USB OTG
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 46
- Program Memory Size:
- 64KB (64K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 10K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 3.6V
- Data Converters:
- A/D 14x12b; D/A 2x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F51113ADFK#5A FAQ
1.How can I place an order for R5F51113ADFK#5A through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F51113ADFK#5A on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F51113ADFK#5A reliable?
The price and inventory of R5F51113ADFK#5A are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F51113ADFK#5A is usually 5 days.
3.What payment methods are accepted for R5F51113ADFK#5A?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F51113ADFK#5A transactions.
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4.How is shipping managed for R5F51113ADFK#5A?
R5F51113ADFK#5A orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F51113ADFK#5A order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F51113ADFK#5A?
For technical support, including R5F51113ADFK#5A datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F51113ADFK#5A requirements.
6.How does Aetrix verify that R5F51113ADFK#5A is sourced from the original manufacturer or authorized distributors?
All R5F51113ADFK#5A products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F51113ADFK#5A meets industry standards.
7.What is the process for return or replacement of R5F51113ADFK#5A?
All R5F51113ADFK#5A units undergo pre-shipment inspection (PSI). If there is an issue with R5F51113ADFK#5A, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F51113ADFK#5A part is unused and in its original packaging.
Return procedure for R5F51113ADFK#5A:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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