Renesas R5F51117ADFM#1A
- Part No.:
- R5F51117ADFM#1A
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
R5F51117ADFM#1A.pdf
- Description:
- IC MCU 32BIT 384KB FLASH 64LFQFP
- Quantity:
- Payment:

- Shipping:

Inventory:3,008
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F51117ADFM#1A from Renesas is a 32-bit RX CPU-based microcontroller operating at up to 32 MHz (50 DMIPS), featuring 384 KB on-chip flash, 64 KB SRAM, 8 KB data flash, 14-channel 12-bit ADC, dual 8-bit DAC, USB 2.0 full-speed host/function/OTG, RTC with calendar mode, and operation from −40°C to +85°C in a 64-pin LFQFP (10 × 10 mm, 0.5 mm pitch) package - used in industrial HMI, portable medical sensors, and USB-connected edge nodes.
For engineers reviewing the R5F51117ADFM#1A datasheet, R5F51117ADFM#1A pinout, R5F51117ADFM#1A application, or R5F51117ADFM#1A equivalent, this page delivers verified specifications, validated package mapping, confirmed peripheral integration (USBc, MTU2, RIIC, RSPI), exact memory configuration (384 KB flash / 64 KB SRAM / 8 KB E2 DataFlash), and real-world use context for rapid selection and design-in.
Technical Context
The R5F51117ADFM#1A implements a CISC Harvard-architecture RX CPU core with five-stage pipeline, variable-length instructions, and 64-bit accumulator for single-cycle 32×32 multiply-accumulate operations. It integrates an Event Link Controller (ELC) enabling direct module-to-module triggering without CPU intervention, and a Data Transfer Controller (DTC) supporting chain transfer across four modes with interrupt-source-specific configuration.
Clock management includes independent ICLK/PCLK/FCLK domains, a high-speed on-chip oscillator (32 MHz ±1% over −20°C to +85°C), sub-clock (32.768 kHz) for RTC, and Clock Accuracy Measurement Circuit (CAC) for IEC 60730 compliance. Power control supports software standby mode (0.44 μA) with 4.8 μs wake-up and three low-power operating modes.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RX 32-bit CISC Harvard architecture, 5-stage pipeline, 50 DMIPS @ 32 MHz |
| Max Operating Frequency | 32 MHz - enables real-time motor control loops and USB full-speed (12 Mbps) packet handling |
| Memory | 384 KB flash (no wait states @ 32 MHz), 64 KB SRAM, 8 KB data flash (1M erase/write cycles) |
| Analog Peripherals | 14-channel 12-bit ADC (1.0 μs min conversion), 2-channel 8-bit DAC, integrated temperature sensor |
| Communication Interfaces | USB 2.0 host/function/OTG (1 port), 3× SCI (async/clock-sync/I²C/SPI), 1× RIIC (400 kbps), 1× RSPI (16 Mbps) |
| Timers & Control | 6-channel MTU2 (PWM/complementary output/phase counting), 2× CMT, RTC with leap-year support |
| Power & Environment | 1.8–3.6 V supply, −40°C to +85°C operating range, software standby current = 0.44 μA |
Pinout & Package
Package: PLQP0064KB-A - 64-pin Low-Profile Quad Flat Package, 10 × 10 mm body, 0.5 mm pitch, lead-free (Sn only), RoHS compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / VSS | Core power supply / ground | Dual 3.3 V domains (VCC/VSS and VCC_USB/VSS_USB) isolate USB analog transceiver noise from digital logic |
| USB0_DP / USB0_DM | USB 2.0 differential data pair | On-chip full-speed transceiver supports host/function/OTG without external PHY; requires 27 Ω series termination |
| AN000–AN015 | Analog input channels | 14 dedicated ADC inputs with selectable reference (VREFH0/VREFL0); AVCC0/AVSS0 must be decoupled separately |
| DA0 / DA1 | 8-bit D/A converter outputs | Two buffered voltage outputs (0 V to VCC), usable for sensor calibration bias or analog feedback generation |
| MTIOC0A–MTIOC5W | MTU2 timer I/O pins | Support complementary PWM, phase counting, and input capture - critical for BLDC motor commutation and encoder interfacing |
| SCI1/SCI5/SCI12 | Serial communication interfaces | Three independent SCI modules: SCI1/SCI5 support simple I²C/SPI; SCI12 adds extended serial (SIOX12) and slave-select outputs (SSLA1–SSLA3) |
Key Features
| Feature | Design Value |
|---|---|
| Background Operation (BGO) | Enables concurrent flash programming and code execution - essential for field firmware updates without system halt |
| Event Link Controller (ELC) | Direct hardware linking of 35 event sources (e.g., timer overflow → ADC trigger) eliminates ISR latency and CPU load |
| USB OTG with BC Support | Single-port USB controller supports On-The-Go negotiation and Battery Charging v1.2 detection - enables self-powered peripherals |
| IEC 60730 Compliance Functions | Integrated CAC, IWDT, RAM test assist, and clock monitoring - reduces certification effort for Class B safety applications |
| Multi-Function Pin Controller (MPC) | Per-pin peripheral function remapping via register writes - simplifies PCB layout reuse across firmware variants |
Applications
| Industrial HMI Panel | Portable Medical Sensor |
|---|---|
Use Scenario: Compact touch-enabled display with local data logging and USB export capability. IC Role / Device Role / Timing Role: Main controller executing GUI rendering, ADC sampling of biometric signals, and USB mass-storage-class file transfer. Use Value: Integrated 384 KB flash stores firmware + UI assets; dual DAC drives analog front-end calibration; USB OTG enables direct PC connection without host driver installation. |
Use Scenario: Battery-powered pulse oximeter with real-time SpO₂ calculation and Bluetooth LE gateway interface. IC Role / Device Role / Timing Role: Signal acquisition hub managing photodiode ADC sampling, temperature compensation, and USB-to-serial bridge for BLE module configuration. Use Value: 1.0 μs ADC conversion enables 1 kHz sampling; software standby mode (0.44 μA) extends battery life; RTC calendar mode timestamps clinical readings accurately. |
| USB-Capable Edge Node | Smart Home Actuator Controller |
Use Scenario: DIN-rail mounted gateway aggregating Modbus RTU sensors and exposing data via USB CDC ACM to cloud gateway. IC Role / Device Role / Timing Role: Protocol translator running Modbus master stack and USB CDC virtual COM port firmware. Use Value: Three SCI interfaces allow simultaneous RS485 (SCI12), debug console (SCI1), and sensor UART (SCI5); 64 KB SRAM buffers multi-packet Modbus responses. |
Use Scenario: Wireless-controlled HVAC damper actuator with position feedback, thermal monitoring, and local override buttons. IC Role / Device Role / Timing Role: Real-time motion controller generating complementary PWM for bidirectional DC motor drive and reading quadrature encoder via MTU2 phase counting. Use Value: MTU2's reset-synchronized PWM ensures precise timing between direction change and enable signal; 14-channel ADC monitors thermistor, supply rail, and current sense. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F51117AGFM#3A | Same core/peripherals, but rated for −40°C to +105°C; identical 384 KB flash / 64 KB SRAM / 8 KB data flash | Required for under-hood automotive or high-temp industrial enclosures where ambient exceeds +85°C | Select R5F51117AGFM#3A when extended temperature qualification is mandatory; otherwise R5F51117ADFM#1A suffices for commercial/industrial indoor use. |
| R5F51116ADFM#3A | 256 KB flash / 32 KB SRAM / same 8 KB data flash; otherwise identical peripheral set and package | Suitable for cost-sensitive designs with smaller firmware footprint and reduced RAM requirements (e.g., basic sensor node without local storage) | Choose R5F51116ADFM#3A to reduce BOM cost where firmware size ≤256 KB and RAM usage ≤32 KB; no PCB or firmware changes needed. |
Compared with R5F51117AGFM#3A, the R5F51117ADFM#1A offers identical functionality at lower temperature grade and cost; versus R5F51116ADFM#3A, it provides +128 KB flash and +32 KB SRAM for complex USB protocol stacks or local data buffering - critical for edge-node autonomy.
Availability
R5F51117ADFM#1A is available at Aetrix Electronics and suitable for industrial HMI, portable medical devices, and USB-connected edge nodes requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant sourcing.
Supply support for R5F51117ADFM#1A includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for industrial, automotive, and IoT markets.
The RX111 Group - including R5F51117ADFM#1A - was designed for cost-sensitive, low-power embedded applications demanding USB connectivity, rich analog integration, and functional safety support (IEC 60730).
FAQ
What is the maximum operating frequency and core performance of the R5F51117ADFM#1A?
The R5F51117ADFM#1A operates at a maximum frequency of 32 MHz and delivers 50 DMIPS of processing performance using its 32-bit RX CPU core. Its five-stage pipeline, 64-bit accumulator, and single-cycle 32×32 multiplier enable deterministic real-time execution - confirmed in Renesas' R01DS0190EJ0130 datasheet Section 1.1. This performance level supports USB full-speed protocol handling and fast ADC sampling loops within the R5F51117ADFM#1A's resource constraints.
Does the R5F51117ADFM#1A support USB On-The-Go (OTG) and Battery Charging (BC) detection?
Yes, the R5F51117ADFM#1A integrates a USB 2.0 host/function module (USBc) that fully supports On-The-Go (OTG) negotiation and Battery Charger (BC) v1.2 detection. The USB0_ID pin enables OTG role switching, while USB0_VBUS monitoring and USB0_OVRCURA/B pins provide overcurrent protection - all documented in Section 1.4 (Pin Functions) and Table 1.1 of the R01DS0190EJ0130 datasheet. This makes the R5F51117ADFM#1A suitable for self-powered peripherals requiring dual-role USB connectivity.
What are the memory resources allocated in the R5F51117ADFM#1A?
The R5F51117ADFM#1A contains 384 KB of on-chip flash memory (for program/code storage), 64 KB of SRAM (for runtime variables and stack), and 8 KB of data flash (E2 DataFlash) rated for 1,000,000 erase/write cycles. These values are explicitly listed in Table 1.3 (List of Products) of the R01DS0190EJ0130 datasheet for orderable part R5F51117ADFM#3A - and confirmed identical for R5F51117ADFM#1A per Renesas' packaging and marking conventions. All memory operates at full 32 MHz with zero wait states.
Which packages are compatible with the R5F51117ADFM#1A, and what is its pin count?
The R5F51117ADFM#1A is supplied exclusively in the PLQP0064KB-A package: a 64-pin Low-Profile Quad Flat Package measuring 10 × 10 mm with 0.5 mm pitch. This matches the "FM" suffix in the part number per Figure 1.1 of the R01DS0190EJ0130 datasheet. No other package variants (e.g., LQFP or WFLGA) are assigned to the "ADFM" variant - only the 64-pin LFQFP is valid for R5F51117ADFM#1A.
Does the R5F51117ADFM#1A include hardware features for functional safety compliance?
Yes, the R5F51117ADFM#1A integrates multiple hardware features targeting IEC 60730 Class B compliance, including a Clock Accuracy Measurement Circuit (CAC), Independent Watchdog Timer (IWDT) with dedicated 15 kHz oscillator, and built-in RAM test assist functions. These are explicitly listed under "On-chip functions for IEC 60730 compliance" in the datasheet's Features section and detailed in Section 1.1. They enable systematic fault detection without external components - a key design value for R5F51117ADFM#1A in safety-aware industrial applications.
R5F51117ADFM#1A Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 64-LQFP
- Series:
- RX111
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- RX
- Core Size:
- 32-Bit Single-Core
- Speed:
- 32MHz
- Connectivity:
- I2C, SCI, SPI, USB OTG
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 46
- Program Memory Size:
- 384KB (384K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 64K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 3.6V
- Data Converters:
- A/D 14x12b; D/A 2x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F51117ADFM#1A FAQ
1.How can I place an order for R5F51117ADFM#1A through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F51117ADFM#1A on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F51117ADFM#1A reliable?
The price and inventory of R5F51117ADFM#1A are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F51117ADFM#1A is usually 5 days.
3.What payment methods are accepted for R5F51117ADFM#1A?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F51117ADFM#1A transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F51117ADFM#1A?
R5F51117ADFM#1A orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F51117ADFM#1A order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F51117ADFM#1A?
For technical support, including R5F51117ADFM#1A datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F51117ADFM#1A requirements.
6.How does Aetrix verify that R5F51117ADFM#1A is sourced from the original manufacturer or authorized distributors?
All R5F51117ADFM#1A products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F51117ADFM#1A meets industry standards.
7.What is the process for return or replacement of R5F51117ADFM#1A?
All R5F51117ADFM#1A units undergo pre-shipment inspection (PSI). If there is an issue with R5F51117ADFM#1A, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F51117ADFM#1A part is unused and in its original packaging.
Return procedure for R5F51117ADFM#1A:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F51117ADFM#1A Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

