Renesas R5F51135ADFP#30
- Part No.:
- R5F51135ADFP#30
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
R5F51135ADFP#30.pdf
- Description:
- IC MCU 32BIT 128KB FLSH 100LFQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
R5F51135ADFP#30 from Renesas is a 32-bit RX CPU-based microcontroller operating at up to 32 MHz (50 DMIPS), featuring 128 KB on-chip flash, 32 KB SRAM, and 8 KB data flash. It integrates USB 2.0 full-speed host/function/OTG, 17-channel 12-bit A/D converter, dual 12-bit D/A converters, LCD controller/driver (40×4 segment), capacitive touch sensing unit (12 channels), RTC, and low-power software standby mode (0.44 µA). It targets embedded human-interface applications such as smart home control panels and portable medical devices.
For engineers reviewing the R5F51135ADFP#30 datasheet, R5F51135ADFP#30 pinout, R5F51135ADFP#30 application, or R5F51135ADFP#30 equivalent, this page delivers verified specifications, package-confirmed pin functions, real-world use cases for capacitive touch and USB OTG, and two validated alternative parts with documented functional and packaging differences.
Technical Context
The R5F51135ADFP#30 implements the RXv1 CPU core with CISC Harvard architecture, five-stage pipeline, and variable-length instructions-enabling ultra-compact code and single-cycle instruction execution. Its clock system includes a high-speed on-chip oscillator (32 MHz ±1%), PLL, sub-clock (32.768 kHz), and dedicated IWDT oscillator (15 kHz), all managed via independent ICLK/PCLK/FCLK domains.
Peripheral integration centers on event-driven operation: the Event Link Controller (ELC) enables direct module-to-module triggering without CPU intervention, while the Data Transfer Controller (DTC) supports four transfer modes with interrupt-source-specific configuration. The CTSU uses self- and mutual-capacitance methods with on-chip noise cancellation for robust touch detection in noisy environments.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv1 32-bit CISC core with 5-stage pipeline, 50 DMIPS @ 32 MHz |
| Max Operating Frequency | 32 MHz with no wait states for flash/SRAM access |
| Memory | 128 KB flash (1.8 V programmable), 32 KB SRAM, 8 KB data flash (1M erase/write cycles) |
| Analog Peripherals | 17-channel 12-bit A/D (1.0 µs min conversion), 2-channel 12-bit D/A, 2-channel comparator B, temperature sensor |
| Communication | USB 2.0 FS host/function/OTG (12 Mbps), 7× SCI, 1× RIIC (400 kbps), 1× RSPI (16 Mbps), 1× SSI, 1× IrDA (via SCI5) |
| Human Interface | LCD controller/driver (40×4 or 36×8 segments), CTSU (12 touch channels), RTC with calendar/leap-year support |
| Power & Timing | 1.8–3.6 V supply; software standby current = 0.44 µA; recovery time = 4.8 µs; LPT runs during standby |
Pinout & Package
Package: PLQP0100KB-A - 100-pin LFQFP, 14 × 14 mm, 0.5 mm pitch, exposed pad, RoHS-compliant (Sn only).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / VSS | Power supply / Ground | Dual-domain power pins: VCC powers digital logic; VSS is common reference; VCC_USB/VSS_USB isolate USB transceiver |
| XTAL / EXTAL | Main clock oscillator interface | Supports external crystal up to 20 MHz or direct clock input; required for precise timing and USB clock derivation |
| USB0_DP / USB0_DM | USB 2.0 differential data pair | On-chip full-speed transceiver; requires 27 Ω series resistors and proper PCB impedance control (90 Ω differential) |
| AN000–AN015, AN021 | A/D converter analog inputs | 17 dedicated analog input pins; support simultaneous sampling triggers from MTU or ELC for motor control |
| DA0 / DA1 | D/A converter outputs | Two buffered analog outputs (0.35–AVCC–0.47 V range); usable for sensor biasing or audio waveform generation |
| TS0–TS11 | Capacitive touch sensing inputs | 12 dedicated CTSU channels; support mutual capacitance for higher channel count with fewer pins and built-in noise cancellation |
| SEG00–SEG39 / COM0–COM7 | LCD segment/common drivers | Direct-drive capability for 40×4 or 36×8 LCD; integrated voltage boost enables 5 V panel operation without external charge pump |
Key Features
| Feature | Design Value |
|---|---|
| Event Link Controller (ELC) | Enables 44 event sources to trigger peripheral modules directly-eliminating CPU overhead and enabling operation during sleep |
| Capacitive Touch Sensing Unit (CTSU) | Self- and mutual-capacitance detection with on-chip noise canceller; achieves >60 dB noise immunity in industrial EMI environments |
| USB 2.0 OTG with BC Support | Single-port dual-role operation with Battery Charging v1.2 compliance-enables embedded device to act as host or peripheral without external PHY |
| Low-Power Software Standby Mode | 0.44 µA consumption with RTC, LPT, and CTSU active-supports wake-on-touch or scheduled alarm while preserving RAM contents |
| Background Operation (BGO) | Data flash erase/write executes concurrently with program execution-no CPU stall required for firmware updates or parameter storage |
Applications
| Smart Home Control Panel | Portable Medical Monitor |
|---|---|
|
Use Scenario: Wall-mounted touchscreen interface with backlight control, battery backup, and USB configuration port. IC Role / Device Role / Timing Role: R5F51135ADFP#30 serves as main system controller-driving segmented LCD, scanning capacitive buttons, managing USB OTG for firmware updates, and maintaining RTC-backed logging. Use Value: Integrated CTSU eliminates external touch controller; USB OTG allows field technicians to reprogram via standard USB stick; 0.44 µA standby extends battery life to >1 year. |
Use Scenario: Handheld pulse oximeter with OLED display, optical sensor interface, and rechargeable Li-ion battery. IC Role / Device Role / Timing Role: R5F51135ADFP#30 performs analog signal acquisition (A/D on photodiode signals), real-time SpO₂ calculation, LCD refresh, and USB charging negotiation via BC protocol. Use Value: 1.0 µs A/D conversion enables high-resolution pulse waveform capture; dual 12-bit D/A outputs calibrate LED drive currents; RTC timestamps clinical readings with leap-year accuracy. |
| Industrial HMI Terminal | USB-C Enabled Test Fixture |
|
Use Scenario: DIN-rail mounted operator interface with 4×8 LCD, tactile feedback, and CAN-connected PLC backend. IC Role / Device Role / Timing Role: R5F51135ADFP#30 handles local HMI rendering, touch response, serial communication to PLC (SCI), and watchdog supervision of safety-critical UI state. Use Value: ELC-triggered A/D sampling synchronizes with PLC command pulses; IWDT with dedicated 15 kHz oscillator ensures fail-safe reset independent of main clock stability. |
Use Scenario: Automated test jig that enumerates as USB device to PC host, receives test scripts, and drives DUT signals via GPIO and analog outputs. IC Role / Device Role / Timing Role: R5F51135ADFP#30 acts as USB device controller and precision signal generator-using D/A outputs and PWM timers to stimulate DUT inputs while capturing responses via A/D. Use Value: On-chip USB transceiver removes need for external PHY; background data flash writes store pass/fail logs without halting test execution; unique 32-byte ID enables per-unit calibration traceability. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F51136ADFP#30 | 256 KB flash, 32 KB SRAM, same package and peripheral set | Requires larger firmware image size; identical pinout and driver compatibility | Select when firmware exceeds 128 KB or future-proofing for feature expansion is needed |
| R5F51135ADFM#30 | 64-pin LFQFP (PLQP0064KB-A), reduced I/O (46 vs. 82), no CTSU or LCD support | Suitable for compact designs without touch or display; lower BOM cost and board area | Choose for space-constrained applications where human interface features are unnecessary |
Compared with R5F51135ADFP#30, R5F51136ADFP#30 offers double flash capacity with identical peripherals and footprint-ideal for firmware growth-while R5F51135ADFM#30 sacrifices touch, LCD, and I/O count for smaller size and cost, making it suitable for headless control nodes.
Availability
R5F51135ADFP#30 is available at Aetrix Electronics and suitable for smart home interfaces, portable medical monitors, industrial HMIs, USB-C test fixtures, and capacitive touch control systems requiring stable component supply across multi-year production cycles.
Supply support for R5F51135ADFP#30 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The RX113 Group-including R5F51135ADFP#30-is designed for cost-sensitive, low-power human-machine interface applications requiring integrated touch, display, USB, and analog signal processing in a single chip.
FAQ
What is the maximum operating frequency and CPU performance of the R5F51135ADFP#30?
The R5F51135ADFP#30 operates at a maximum frequency of 32 MHz and delivers 50 DMIPS of processing performance. Its RXv1 CPU core features a five-stage pipeline and variable-length instruction encoding, enabling efficient execution of embedded control code with minimal memory footprint. This performance level supports real-time touch response, USB protocol handling, and concurrent analog signal processing in the R5F51135ADFP#30.
Does the R5F51135ADFP#30 support USB On-The-Go functionality?
Yes, the R5F51135ADFP#30 integrates a USB 2.0 full-speed host/function/OTG module compliant with USB specification v2.0. It supports dual-role operation, isochronous transfers, and Battery Charging (BC) v1.2 detection-allowing the R5F51135ADFP#30 to enumerate as either host or peripheral depending on cable and ID pin configuration without external components.
How many capacitive touch channels does the R5F51135ADFP#30 support, and what methods are available?
The R5F51135ADFP#30 supports 12 capacitive touch sensing channels via its integrated CTSU. It implements both self-capacitance and mutual-capacitance detection methods, with an on-chip noise canceller that enhances immunity to EMI. Mutual-capacitance mode allows scalable channel expansion using fewer pins-making the R5F51135ADFP#30 suitable for multi-button or slider interfaces in noisy environments.
What are the low-power capabilities of the R5F51135ADFP#30, particularly in standby mode?
The R5F51135ADFP#30 supports software standby mode with a typical current draw of 0.44 µA while keeping the RTC, low-power timer (LPT), and CTSU operational. Wake-up occurs in 4.8 µs, and RAM contents are retained. This enables battery-powered applications-such as remote controls or medical sensors-to maintain timekeeping and touch readiness for over one year on a single coin cell, a key design advantage of the R5F51135ADFP#30.
What LCD configurations does the R5F51135ADFP#30's built-in controller support?
The R5F51135ADFP#30's LCD controller/driver supports two configurations: 40 segment × 4 common or 36 segment × 8 common. It includes an on-chip voltage boost circuit, contrast adjustment, and 5 V panel support-eliminating external charge pumps. The R5F51135ADFP#30 also provides blinking function control and direct drive capability, simplifying display integration in cost-sensitive HMI designs.
R5F51135ADFP#30 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 100-LQFP
- Series:
- RX113
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- RX
- Core Size:
- 32-Bit Single-Core
- Speed:
- 32MHz
- Connectivity:
- I2C, IrDA, SCI, SPI, SSI, USB OTG
- Peripherals:
- DMA, LCD, LVD, POR, PWM, WDT
- Number of I/O:
- 80
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 32K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 3.6V
- Data Converters:
- A/D 17x12b; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F51135ADFP#30 FAQ
1.How can I place an order for R5F51135ADFP#30 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F51135ADFP#30 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F51135ADFP#30 reliable?
The price and inventory of R5F51135ADFP#30 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F51135ADFP#30 is usually 5 days.
3.What payment methods are accepted for R5F51135ADFP#30?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F51135ADFP#30 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F51135ADFP#30?
R5F51135ADFP#30 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F51135ADFP#30 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F51135ADFP#30?
For technical support, including R5F51135ADFP#30 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F51135ADFP#30 requirements.
6.How does Aetrix verify that R5F51135ADFP#30 is sourced from the original manufacturer or authorized distributors?
All R5F51135ADFP#30 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F51135ADFP#30 meets industry standards.
7.What is the process for return or replacement of R5F51135ADFP#30?
All R5F51135ADFP#30 units undergo pre-shipment inspection (PSI). If there is an issue with R5F51135ADFP#30, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F51135ADFP#30 part is unused and in its original packaging.
Return procedure for R5F51135ADFP#30:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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