Renesas R5F51136ADLJ#2A
- Part No.:
- R5F51136ADLJ#2A
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 100-TFLGA
- Datasheet:
-
R5F51136ADLJ#2A.pdf
- Description:
- IC MCU 32BIT 256KB FLSH 100TFLGA
- Quantity:
- Payment:

- Shipping:

Inventory:832
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Product details
Overview
R5F51136ADLJ#2A from Renesas is a 32-bit RX113 Group microcontroller with 256 KB flash, 32 KB SRAM, and 8 KB data flash, operating at up to 32 MHz (50 DMIPS), featuring USB 2.0 full-speed host/function/OTG, 17-channel 12-bit A/D converter, 2-channel 12-bit D/A converter, LCD controller/driver (40×4 segments), and capacitive touch sensing unit (12 channels) - deployed in industrial HMI, portable medical devices, and smart sensor nodes.
For engineers reviewing the R5F51136ADLJ#2A datasheet, R5F51136ADLJ#2A pinout, R5F51136ADLJ#2A application, or R5F51136ADLJ#2A equivalent, key selection criteria include TFLGA-100 package compatibility, −40°C to +85°C temperature grade, USB OTG support with BC (Battery Charger) detection, CTSU-based touch interface with mutual capacitance capability, and integrated RTC with software standby wake-up via alarm.
Technical Context
The R5F51136ADLJ#2A implements a CISC Harvard-architecture RX CPU core with five-stage pipeline, variable-length instructions, and on-chip debugging (FINE interface). It integrates an Event Link Controller (ELC) enabling direct module-to-module triggering without CPU intervention and a Data Transfer Controller (DTC) supporting normal, repeat, and block transfer modes activated by 44 event sources.
Its clock system includes a high-speed on-chip oscillator (32 MHz ±1% over −20°C to +85°C), PLL for USB (6/8 MHz), sub-clock oscillator (32.768 kHz), and Clock Accuracy Measurement circuit (CAC) for IEC 60730 compliance. Power management features three low-power modes, including software standby with 0.44 µA supply current and 4.8 µs wake-up time.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RX 32-bit CISC Harvard architecture, 5-stage pipeline, 50 DMIPS @ 32 MHz |
| Flash Memory | 256 KB on-chip code flash, zero wait states at 32 MHz, programmable at 1.8 V |
| Data Flash | 8 KB E2 DataFlash, 1,000,000 erase/write cycles (typ.), supports background operation (BGO) |
| A/D Converter | 17-channel 12-bit SAR ADC, 1.0 µs min conversion time, double-trigger mode for motor control |
| D/A Converter | 2-channel 12-bit DAC, output voltage range 0.35 V to AVCC – 0.47 V |
| USB Interface | USB 2.0 full-speed (12 Mbps) host/function/OTG, isochronous transfer, Battery Charger (BC) detection |
| Capacitive Touch | CTSU with 12 detection pins, self- and mutual-capacitance methods, on-chip noise canceller |
| Operating Temp | −40°C to +85°C (D-grade), validated for industrial and medical edge applications |
Pinout & Package
Package: PTLG0100JA-A - 100-pin Thin Fine-Pitch Land Grid Array (TFLGA), 7 mm × 7 mm, 0.65 mm pitch, exposed thermal pad.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / VSS | Power supply / Ground | Dual power domains: digital (VCC/VSS) and analog (AVCC0/AVSS0); VCC_USB/VSS_USB dedicated for USB PHY |
| USB0_DP / USB0_DM | USB differential data pair | Integrated full-speed transceiver; requires 27 Ω series resistors and 1.5 kΩ pull-up on DP for device mode |
| AN000–AN015, AN021 | Analog input channels | 17 total A/D inputs; AN000–AN015 mapped to Port 0/1/2/3, AN021 on Port J |
| DA0 / DA1 | Digital-to-analog outputs | Two independent 12-bit voltage outputs; referenced to VREFH/VREFL pins |
| TS0–TS11 | Capacitive touch sense inputs | 12 dedicated CTSU pins; support mutual capacitance scanning with shared electrode routing |
| SEG00–SEG39 / COM0–COM7 | LCD segment/common drivers | Supports 40×4 or 36×8 segment-combination; internal boost enables 5-V panel drive |
| MTIOC0A–MTIOC5D | PWM/complementary output pins | Six MTU2 timer channels with phase-counting, complementary PWM, and dead-time insertion capability |
Key Features
| Feature | Design Value |
|---|---|
| Event Link Controller (ELC) | Enables 44-event direct hardware linking (e.g., MTU trigger → A/D start), eliminating CPU overhead during sleep |
| Low-Power Timer (LPT) | 16-bit timer running on sub-clock (32.768 kHz) or IWDT oscillator during software standby (0.44 µA) |
| USB Battery Charger Detection | Hardware-level BC 1.2 compliance for D+/D− enumeration; supports SDP, CDP, and DCP port identification |
| Capacitive Touch Noise Cancellation | On-chip digital noise canceller suppresses 50/60 Hz interference and burst noise without external components |
| IEC 60730 Support | Includes CAC, IWDT, RAM test assist functions, and clock monitoring - certified for Class B safety-critical firmware |
| Multi-Function Pin Controller (MPC) | Per-pin peripheral function remapping via register; resolves pin conflicts across SCI, RSPI, I²C, and USB interfaces |
Applications
| Industrial HMI Panel | Portable Medical Sensor |
|---|---|
Use Scenario: Standalone touch-enabled display for HVAC control or PLC status monitoring with local data logging. IC Role / Device Role / Timing Role: Main controller executing real-time UI rendering, capacitive touch decoding, and USB-based firmware updates. Use Value: Integrated CTSU eliminates external touch controller; LCD driver supports 40×4 segment matrix without external bias IC; USB OTG enables field service via USB stick. |
Use Scenario: Battery-powered pulse oximeter with analog front-end, OLED display, and USB charging/data export. IC Role / Device Role / Timing Role: Signal acquisition hub managing photodiode A/D sampling, LED drive timing, and battery charge state via USB BC detection. Use Value: 1.0 µs A/D conversion enables high-resolution SpO₂ waveform capture; software standby mode extends battery life to >72 hours on 200 mAh Li-ion. |
| Smart Energy Meter Interface | IoT Edge Node Gateway |
Use Scenario: DIN-rail mounted meter with LCD readout, tamper detection, and USB configuration port. IC Role / Device Role / Timing Role: System-on-chip handling metrology ADC interface (via external sigma-delta), RTC calendar, and secure USB parameter upload. Use Value: RTC with leap-year correction ensures accurate billing timestamps; LVD circuits provide brown-out protection during grid fluctuations. |
Use Scenario: Wireless sensor aggregator collecting data from RS485 Modbus slaves and forwarding via USB to host PC. IC Role / Device Role / Timing Role: Protocol bridge with RSPI master (to SPI sensors), SCI UART (to Modbus), and USB CDC ACM virtual COM port. Use Value: DTC offloads UART-to-USB data movement; ELC synchronizes RSPI frame end with USB IN token, reducing latency to <100 µs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F51136ADFP#3A | Same core, memory, and peripherals; differs in package (100-pin LFQFP, 14×14 mm, 0.5 mm pitch) and thermal pad design | Requires PCB re-layout for larger footprint and different solder-reflow profile; no TFLGA assembly constraints | Select when standard QFP assembly infrastructure exists and board space permits larger package |
| R5F51136AGLJ#2A | Identical package and pinout; rated for −40°C to +105°C (G-grade) vs. −40°C to +85°C (D-grade) | Required for under-hood automotive or high-ambient industrial enclosures exceeding 85°C ambient | Choose for extended temperature operation; same firmware and layout, only qualification testing differs |
Compared with R5F51136ADLJ#2A, the R5F51136ADFP#3A offers identical functionality in a more manufacturable QFP package but increases board area by 3.5×; the R5F51136AGLJ#2A provides drop-in thermal robustness for harsh environments without any hardware or software changes.
Availability
R5F51136ADLJ#2A is available at Aetrix Electronics and suitable for industrial HMI, portable medical instrumentation, and smart energy metering requiring stable component supply across multi-year production cycles.
Supply support for R5F51136ADLJ#2A includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, and power solutions, with deep expertise in embedded processing for industrial, automotive, and IoT markets.
The RX113 Group targets cost-sensitive, low-power human-machine interface and sensor-edge applications, integrating capacitive touch, LCD driving, USB connectivity, and functional safety features into a single compact MCU.
FAQ
What is the maximum operating frequency and core performance of the R5F51136ADLJ#2A?
The R5F51136ADLJ#2A operates at a maximum frequency of 32 MHz and delivers 50 DMIPS (Dhrystone MIPS) using its 32-bit RX CPU core. Its five-stage pipeline, variable-length instruction set, and on-chip multiplier/divider enable deterministic real-time execution. The R5F51136ADLJ#2A achieves this performance while maintaining zero-wait-state access to both 256 KB flash and 32 KB SRAM at full speed.
Does the R5F51136ADLJ#2A support USB Battery Charging (BC) detection?
Yes, the R5F51136ADLJ#2A includes hardware-level USB Battery Charger Detection compliant with BC 1.2 specification. It identifies SDP (Standard Downstream Port), CDP (Charging Downstream Port), and DCP (Dedicated Charging Port) by analyzing D+ and D− line states during enumeration. This feature is implemented in the USB 2.0 full-speed host/function/OTG module and requires no firmware polling - the R5F51136ADLJ#2A reports charger type via dedicated status registers.
What LCD configurations does the R5F51136ADLJ#2A support?
The R5F51136ADLJ#2A integrates an LCD controller/driver supporting two segment-combination modes: 40 segment × 4 common or 36 segment × 8 common. It includes an on-chip voltage boost circuit enabling direct 5-V panel drive, contrast adjustment via software-controlled bias, and blinking functionality per segment group. The R5F51136ADLJ#2A drives these configurations without external bias generators or charge pumps.
How many capacitive touch channels does the R5F51136ADLJ#2A support, and what sensing methods are available?
The R5F51136ADLJ#2A supports 12 capacitive touch sensing channels (TS0–TS11) via its integrated Capacitive Touch Sensing Unit (CTSU). It supports both self-capacitance and mutual-capacitance measurement methods, with on-chip noise cancellation for robust operation in electrically noisy environments. Mutual-capacitance mode allows increased effective channel count with reduced pin usage - the R5F51136ADLJ#2A implements this using shared electrode routing and time-multiplexed scanning.
What low-power modes are available on the R5F51136ADLJ#2A, and what is the lowest supply current?
The R5F51136ADLJ#2A offers three low-power consumption modes: Sleep, Deep Sleep, and Software Standby. In Software Standby mode, it draws just 0.44 µA (typ.) while retaining SRAM content and enabling wake-up via RTC alarm, LPT match, or external interrupt. Recovery time from this state is 4.8 µs - the R5F51136ADLJ#2A achieves this ultra-low current using dedicated low-speed oscillators and selective clock gating across all peripheral domains.
R5F51136ADLJ#2A Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 100-TFLGA
- Series:
- RX113
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- RX
- Core Size:
- 32-Bit Single-Core
- Speed:
- 32MHz
- Connectivity:
- I2C, IrDA, SCI, SPI, SSI, USB OTG
- Peripherals:
- Capacitive Touch, DMA, LCD, LVD, POR, PWM, WDT
- Number of I/O:
- 82
- Program Memory Size:
- 256KB (256K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 32K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 3.6V
- Data Converters:
- A/D 17x12b; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F51136ADLJ#2A FAQ
1.How can I place an order for R5F51136ADLJ#2A through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F51136ADLJ#2A on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F51136ADLJ#2A reliable?
The price and inventory of R5F51136ADLJ#2A are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F51136ADLJ#2A is usually 5 days.
3.What payment methods are accepted for R5F51136ADLJ#2A?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F51136ADLJ#2A transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F51136ADLJ#2A?
R5F51136ADLJ#2A orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F51136ADLJ#2A order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F51136ADLJ#2A?
For technical support, including R5F51136ADLJ#2A datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F51136ADLJ#2A requirements.
6.How does Aetrix verify that R5F51136ADLJ#2A is sourced from the original manufacturer or authorized distributors?
All R5F51136ADLJ#2A products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F51136ADLJ#2A meets industry standards.
7.What is the process for return or replacement of R5F51136ADLJ#2A?
All R5F51136ADLJ#2A units undergo pre-shipment inspection (PSI). If there is an issue with R5F51136ADLJ#2A, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F51136ADLJ#2A part is unused and in its original packaging.
Return procedure for R5F51136ADLJ#2A:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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