Renesas R5F51138ADFM#3A

Overview

R5F51138ADFM#3A from Renesas is a 32-bit RX CPU-based microcontroller operating at up to 32 MHz (50 DMIPS), featuring 512 KB on-chip flash, 64 KB SRAM, and 8 KB data flash. It integrates USB 2.0 full-speed host/function/OTG, 12-bit A/D (17 channels), 12-bit D/A (2 channels), LCD controller (40×4 segment), capacitive touch sensing (CTSU), RTC, and low-power modes - deployed in industrial HMI, portable medical devices, and smart sensor nodes.

For engineers reviewing the R5F51138ADFM#3A datasheet, R5F51138ADFM#3A pinout, R5F51138ADFM#3A application, or R5F51138ADFM#3A equivalent, key selection criteria include its 64-pin LFQFP package (PLQP0064KB-A), −40 to +85°C temperature grade, USB OTG capability with BC support, CTSU-based touch interface, and dual 12-bit DAC outputs for analog signal generation.

Technical Context

The R5F51138ADFM#3A implements the RXv1 core with CISC Harvard architecture, five-stage pipeline, and variable-length instructions enabling ultra-compact code. Its clock system includes a 32 MHz ±1% high-speed on-chip oscillator, PLL, sub-clock (32.768 kHz), and dedicated IWDT oscillator (15 kHz), all managed via the Clock Frequency Accuracy Measurement Circuit (CAC).

Peripheral coordination is handled by the Event Link Controller (ELC), enabling direct module-to-module triggering without CPU intervention - critical for low-latency motor control and real-time sensor response. The Data Transfer Controller (DTC) supports four transfer modes with chain operation, reducing interrupt overhead during high-bandwidth ADC or USB transfers.

Key Specifications

Pinout & Package

Package: 64-pin LFQFP (PLQP0064KB-A), 10 × 10 mm body, 0.5 mm pitch, exposed pad not specified. Pin count and I/O allocation match Table 1.2: 46 general-purpose I/O pins, 11 ADC input channels (not 17), no CTSU support, and reduced SCI count (5 channels vs. 7 in 100-pin).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 32-bit MCU applications.

Compared with R5F51138ADFM#3A, R5F51136ADFM#3A reduces memory and cost for simpler tasks, while R5F51138ADFP#3A expands I/O and analog capability at the expense of board area and routing complexity - making the R5F51138ADFM#3A optimal for space-constrained USB-connected embedded controllers balancing performance and integration.

Availability

R5F51138ADFM#3A is available at Aetrix Electronics and suitable for industrial HMI, portable medical monitors, and smart sensor nodes requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.

Supply support for R5F51138ADFM#3A includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Renesas Electronics Corporation is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.

The RX113 Group - including R5F51138ADFM#3A - was designed for cost-sensitive, low-power embedded applications demanding USB connectivity, integrated analog peripherals, and robust real-time performance in compact form factors.

FAQ

What is the maximum operating frequency and CPU performance of the R5F51138ADFM#3A?

The R5F51138ADFM#3A operates at a maximum frequency of 32 MHz and delivers 50 DMIPS of processing performance. This is achieved using the 32-bit RXv1 CPU core with a five-stage pipeline and variable-length instruction set. The R5F51138ADFM#3A sustains full-speed execution without wait states on its 512 KB flash memory, enabling deterministic real-time behavior in USB and motor control applications.

Does the R5F51138ADFM#3A support capacitive touch sensing (CTSU)?

No, the R5F51138ADFM#3A does not support the Capacitive Touch Sensing Unit (CTSU). According to Table 1.2 in the official datasheet (R01DS0216EJ0120), CTSU is only available on the 100-pin variants (e.g., R5F51138ADFP#3A) and is explicitly omitted from the 64-pin LFQFP package. The R5F51138ADFM#3A retains all other core peripherals - USB, ADC, DAC, RTC, and timers - but excludes CTSU to align with its compact I/O count.

What are the USB capabilities of the R5F51138ADFM#3A?

The R5F51138ADFM#3A integrates a full-featured USB 2.0 module supporting host, function, and OTG roles at full-speed (12 Mbps) and low-speed (1.5 Mbps). It includes isochronous transfer support and Battery Charging (BC) detection compliant with USB BC 1.2. The on-chip transceiver eliminates external PHY components, and USB0_DP/USB0_DM pins are routed to dedicated package pins - confirmed in Table 1.4 and Figure 1.4 of the datasheet.

How many ADC and DAC channels does the R5F51138ADFM#3A provide?

The R5F51138ADFM#3A features a 12-bit successive approximation ADC with 11 input channels (AN000–AN010), as specified in Table 1.2 for the 64-pin variant. It also includes two independent 12-bit voltage-output DAC channels (DA0 and DA1), each capable of generating analog outputs from 0.35 V to AVCC − 0.47 V. These DACs are fully functional in the R5F51138ADFM#3A and do not depend on package size.

What low-power modes are supported by the R5F51138ADFM#3A, and what is its standby current?

The R5F51138ADFM#3A supports three low-power modes: sleep, deep sleep, and software standby. In software standby mode - the lowest-power active state - it draws just 0.44 µA (typical) while retaining SRAM content and enabling wake-up via RTC alarm, LPT match, or external interrupt. Recovery time from this mode is 4.8 µs, allowing rapid responsiveness in battery-powered touch or sensor wake-up scenarios.