Renesas R5F51138ADLJ#20
- Part No.:
- R5F51138ADLJ#20
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 100-TFLGA
- Datasheet:
-
R5F51138ADLJ#20.pdf
- Description:
- IC MCU 32BIT 512KB FLSH 100TFLGA
- Quantity:
- Payment:

- Shipping:

Inventory:4,828
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F51138ADLJ#20 from Renesas is a 32-bit RX113 Group microcontroller featuring a 32 MHz CPU core delivering 50 DMIPS, 512 KB on-chip flash memory with zero wait states, 64 KB SRAM, and integrated USB 2.0 full-speed host/function/OTG. It includes a 12-bit A/D converter (17 channels), dual 12-bit D/A converters, LCD controller/driver (40×4 segment), capacitive touch sensing unit (12 channels), RTC, and operates from 1.8–3.6 V across –40 to +85°C for industrial HMI and sensor gateway applications.
For engineers reviewing the R5F51138ADLJ#20 datasheet, R5F51138ADLJ#20 pinout, R5F51138ADLJ#20 application, or R5F51138ADLJ#20 equivalent, this MCU supports USB OTG with BC detection, low-power software standby (0.44 µA), CTSU-based touch UI, and ELC-triggered peripheral coordination-key for battery-powered embedded control and real-time signal acquisition.
Technical Context
The R5F51138ADLJ#20 implements a CISC Harvard-architecture RX CPU with five-stage pipeline, variable-length instructions, and 64-bit accumulator for single-cycle 32×32 multiply-accumulate operations. Its clock system integrates high-speed (32 MHz ±1%) and sub-clock (32.768 kHz) oscillators, PLL, USB-dedicated PLL, and CAC for IEC 60730 compliance.
Peripheral coordination is enabled by the Event Link Controller (ELC), allowing direct module-to-module triggering without CPU intervention-even during sleep modes-while the Data Transfer Controller (DTC) provides four transfer modes with chain capability for efficient data movement between memory and peripherals like S12AD, RSPI, or USB.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RX 32-bit, 32 MHz max, 50 DMIPS - enables real-time deterministic control in compact firmware footprint |
| Flash Memory | 512 KB, zero wait states at 32 MHz - supports full-speed execution without cache or prefetch stalls |
| SRAM | 64 KB, no wait states - accommodates large buffers for USB audio streaming or multi-channel ADC capture |
| A/D Converter | 12-bit, 17 channels, 1.0 µs min conversion - suitable for motor current sensing and fast analog monitoring |
| D/A Converter | 2 channels, 12-bit, 0.35–(AVCC−0.47) V output - provides precision biasing or analog waveform generation |
| USB Interface | USB 2.0 full-speed (12 Mbps), host/function/OTG, BC detection - enables direct connection to PCs, chargers, and peripherals |
| Capacitive Touch | CTSU with 12 detection pins, self/mutual capacitance, on-chip noise canceller - delivers robust touch UI on small PCBs |
| Power Modes | Software standby: 0.44 µA, recovery in 4.8 µs - extends battery life in wake-on-touch or wake-on-USB-event designs |
Pinout & Package
Package: PTLG0100JA-A - 100-pin TFLGA, 7 mm × 7 mm, 0.65 mm pitch, suitable for space-constrained industrial modules and portable HMI.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / VSS | Core power supply / ground | 1.8–3.6 V operation; decoupling required per datasheet layout guidelines |
| USB0_DP / USB0_DM | USB differential data pair | Integrated transceiver supports full-speed signaling without external PHY |
| AN000–AN015, AN021 | Analog input channels | 17 dedicated A/D inputs with selectable reference and trigger sources |
| DA0 / DA1 | Analog output channels | Two independent 12-bit voltage outputs for calibration or feedback control |
| TS0–TS11 | Capacitive touch sense inputs | 12-pin CTSU interface supporting mutual/self-capacitance with hardware noise suppression |
| SEG00–SEG39 / COM0–COM7 | LCD segment/common drivers | Direct drive for 40×4 or 36×8 segment displays with internal boost circuit |
| MTIOC0A–MTIOC5D | PWM/complementary output pins | Six MTU2 timer channels support motor control waveforms including phase counting and dead-time insertion |
Key Features
| Feature | Design Value |
|---|---|
| Event Link Controller (ELC) | Enables 44 event types to directly trigger peripheral actions (e.g., ADC start on timer match) without CPU overhead or interrupt latency |
| Background Operation (BGO) | Data Flash erases/writes occur while CPU executes code - critical for firmware updates and parameter storage in live systems |
| USB Battery Charging (BC) Detection | Identifies DCP/CDP/SDP charger types per USB BC 1.2 spec - enables intelligent power management in portable devices |
| IEC 60730 Support | Includes CAC, IWDT, RAM test assist, and clock monitoring - simplifies functional safety certification for Class B appliances |
| Low-Power Timer (LPT) | 16-bit timer running from sub-clock or IWDT oscillator during software standby - enables periodic wake-up without main crystal |
Applications
| Industrial HMI Panel | USB-Capable Sensor Gateway |
|---|---|
Use Scenario: Compact 4.3-inch touch-enabled display for factory floor equipment monitoring. IC Role / Device Role / Timing Role: R5F51138ADLJ#20 serves as main controller with integrated LCD driver, CTSU touch engine, and USB OTG for configuration via PC. Use Value: Eliminates external touch controller and display driver ICs; reduces BOM cost and board area by 35% versus discrete solution. |
Use Scenario: Battery-powered environmental sensor node aggregating temperature, humidity, and gas readings for cloud upload. IC Role / Device Role / Timing Role: R5F51138ADLJ#20 acts as data concentrator with 12-bit ADC, USB host for flash drive logging, and LPT-driven wake scheduling. Use Value: Achieves 3-year battery life using software standby mode (0.44 µA) and wake-on-external-interrupt, with no external RTC needed. |
| Medical Patient Monitor Front-End | Smart Appliance Control Unit |
Use Scenario: Portable pulse oximeter with analog front-end, OLED display, and USB charging port. IC Role / Device Role / Timing Role: R5F51138ADLJ#20 performs analog signal conditioning (ADC/DAC), touch UI, USB BC detection, and real-time SpO₂ calculation. Use Value: Meets IEC 60730 Class B requirements via on-chip CAC, IWDT, and RAM test assist - accelerates medical regulatory approval. |
Use Scenario: Washing machine control board managing motor drive, water level sensing, and user interface. IC Role / Device Role / Timing Role: R5F51138ADLJ#20 executes motor control (via MTU2 PWM), reads pressure/temperature sensors, drives segmented LED display, and logs faults to Data Flash. Use Value: Dual 12-bit DACs provide precise analog bias for op-amp sensor circuits; BGO allows error log writes during runtime without freezing control loop. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F51138ADFP#3A | Same core, flash, RAM, peripherals; differs only in package (100-pin LFQFP vs. TFLGA) and thermal performance | Preferred for through-hole assembly or higher thermal dissipation needs; larger footprint (14×14 mm) | Select when mechanical mounting or heat sinking requires QFP; not drop-in due to different land pattern and pitch (0.50 mm vs. 0.65 mm) |
| R5F51137ADLJ#2A | 384 KB flash, same 64 KB RAM, identical TFLGA-100 package and peripheral set except reduced ADC channels (9 vs. 17) | Suitable for cost-sensitive designs where full ADC count is unnecessary; retains CTSU, USB, LCD, and low-power features | Choose for lower-cost BOM when firmware size < 384 KB and ≤9 analog inputs suffice; pin-compatible with R5F51138ADLJ#20 |
Compared with R5F51138ADLJ#20, R5F51138ADFP#3A offers identical functionality in a larger QFP package for easier prototyping, while R5F51137ADLJ#2A reduces flash capacity and ADC channel count but maintains full pin compatibility and feature parity for less demanding applications.
Availability
R5F51138ADLJ#20 is available at Aetrix Electronics and suitable for industrial HMI panels, USB sensor gateways, medical front-ends, smart appliance controllers, and battery-powered IoT edge nodes requiring stable component supply and long-term manufacturability.
Supply support for R5F51138ADLJ#20 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The RX113 Group, including R5F51138ADLJ#20, was designed for cost-sensitive, low-power embedded applications requiring rich analog integration, USB connectivity, and capacitive touch-targeting HMI, sensor hubs, and white goods control.
FAQ
What is the maximum operating frequency and CPU performance of the R5F51138ADLJ#20?
The R5F51138ADLJ#20 operates at a maximum frequency of 32 MHz and delivers 50 DMIPS of processing performance. Its RX CPU core features a five-stage pipeline, variable-length instruction set, and 64-bit accumulator enabling single-cycle 32×32 multiply-accumulate operations-making it suitable for real-time control and signal processing tasks within the R5F51138ADLJ#20's power envelope.
Does the R5F51138ADLJ#20 support USB On-The-Go (OTG) and Battery Charging (BC) detection?
Yes, the R5F51138ADLJ#20 integrates a full-featured USB 2.0 host/function/OTG module compliant with USB BC 1.2. It supports full-speed (12 Mbps) and low-speed (1.5 Mbps) operation, isochronous transfers, and automatic detection of Dedicated Charging Ports (DCP), Charging Downstream Ports (CDP), and Standard Downstream Ports (SDP)-all implemented in hardware without external components in the R5F51138ADLJ#20.
How many analog input channels does the R5F51138ADLJ#20's 12-bit A/D converter support?
The R5F51138ADLJ#20 includes a 12-bit A/D converter with up to 17 input channels (AN000–AN015 and AN021). It achieves a minimum conversion time of 1.0 µs at 32 MHz ADCLK and supports scan modes, double-trigger duplication for motor control, and multiple trigger sources-including MTU timers and external signals-ensuring flexible analog acquisition in the R5F51138ADLJ#20.
What low-power modes are available on the R5F51138ADLJ#20, and what is its lowest standby current?
The R5F51138ADLJ#20 offers three low-power modes: sleep, deep sleep, and software standby. In software standby mode, it draws just 0.44 µA while retaining SRAM content and enabling wake-up via RTC alarm, LPT match, or external interrupt. Recovery time from this state is 4.8 µs-critical for ultra-low-power applications built around the R5F51138ADLJ#20.
Is the R5F51138ADLJ#20 pin-compatible with other members of the RX113 Group?
Yes, the R5F51138ADLJ#20 in the PTLG0100JA-A (100-pin TFLGA) package is pin-compatible with other RX113 Group variants sharing the same package type, such as R5F51137ADLJ#2A and R5F51136ADLJ#2A. Differences lie in flash/RAM capacity and peripheral channel counts-not pin function or electrical behavior-enabling scalable design reuse across the R5F51138ADLJ#20 family.
R5F51138ADLJ#20 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 100-TFLGA
- Series:
- RX113
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- RX
- Core Size:
- 32-Bit Single-Core
- Speed:
- 32MHz
- Connectivity:
- I2C, IrDA, SCI, SPI, SSI, USB OTG
- Peripherals:
- DMA, LCD, LVD, POR, PWM, WDT
- Number of I/O:
- 80
- Program Memory Size:
- 512KB (512K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 64K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 3.6V
- Data Converters:
- A/D 17x12b; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F51138ADLJ#20 FAQ
1.How can I place an order for R5F51138ADLJ#20 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F51138ADLJ#20 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F51138ADLJ#20 reliable?
The price and inventory of R5F51138ADLJ#20 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F51138ADLJ#20 is usually 5 days.
3.What payment methods are accepted for R5F51138ADLJ#20?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F51138ADLJ#20 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F51138ADLJ#20?
R5F51138ADLJ#20 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F51138ADLJ#20 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F51138ADLJ#20?
For technical support, including R5F51138ADLJ#20 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F51138ADLJ#20 requirements.
6.How does Aetrix verify that R5F51138ADLJ#20 is sourced from the original manufacturer or authorized distributors?
All R5F51138ADLJ#20 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F51138ADLJ#20 meets industry standards.
7.What is the process for return or replacement of R5F51138ADLJ#20?
All R5F51138ADLJ#20 units undergo pre-shipment inspection (PSI). If there is an issue with R5F51138ADLJ#20, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F51138ADLJ#20 part is unused and in its original packaging.
Return procedure for R5F51138ADLJ#20:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F51138ADLJ#20 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

