Renesas R5F51138ADLJ#2A
- Part No.:
- R5F51138ADLJ#2A
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 100-TFLGA
- Datasheet:
-
R5F51138ADLJ#2A.pdf
- Description:
- IC MCU 32BIT 512KB FLSH 100TFLGA
- Quantity:
- Payment:

- Shipping:

Inventory:414
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Product details
Overview
R5F51138ADLJ#2A from Renesas is a 32-bit RX CPU-based microcontroller operating at up to 32 MHz (50 DMIPS), featuring 512 KB on-chip flash, 64 KB SRAM, 8 KB data flash, USB 2.0 full-speed host/function/OTG, 17-channel 12-bit A/D converter, and integrated capacitive touch sensing unit (CTSU) for 12 detection pins - deployed in smart home control panels requiring low-power, human-interface-rich embedded operation.
For engineers reviewing the R5F51138ADLJ#2A datasheet, R5F51138ADLJ#2A pinout, R5F51138ADLJ#2A application, or R5F51138ADLJ#2A equivalent, key selection criteria include TFLGA-100 package compatibility, −40°C to +85°C temperature grade, USB OTG + CTSU + LCD driver integration, and 32 MHz real-time deterministic execution with hardware-accelerated math and event-driven peripheral linking via ELC.
Technical Context
The R5F51138ADLJ#2A implements a CISC Harvard architecture with five-stage pipeline, variable-length instructions, and 64-bit accumulator for single-cycle 32×32 multiply-accumulate operations. Its clock system includes independent PLL, USB-dedicated PLL, IWDT-dedicated 15 kHz oscillator, and CAC for IEC 60730 compliance.
Peripheral coordination is managed by the Event Link Controller (ELC), enabling direct module-to-module triggering without CPU intervention - critical for low-latency motor control (via MTU2-triggered A/D conversion) and ultra-low-power wake-up (RTC/LPT-initiated exit from software standby in 4.8 µs).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RX 32-bit CISC Harvard, 32 MHz max, 50 DMIPS, 64-bit accumulator, 1-cycle 32×32 multiply |
| Memory | 512 KB flash (no wait states @32 MHz), 64 KB SRAM, 8 KB data flash (1M erase/write cycles) |
| USB Interface | USB 2.0 full-speed (12 Mbps) host/function/OTG with isochronous transfer and BC (Battery Charger) support |
| Analog Peripherals | 17-channel 12-bit A/D (1.0 µs min conversion), 2-channel 12-bit D/A, 2-channel Comparator B, CTSU (12 touch pins) |
| Timers & Control | 6-channel MTU2 (PWM/complementary output/phase counting), 4× TMR, 4× CMT, RTC with calendar mode, LPT (sub-clock driven) |
| Package & Environment | TFLGA-100 (PTLG0100JA-A), 7×7 mm, 0.65 mm pitch, −40°C to +85°C operating range |
| Power Management | 1.8–3.6 V supply; high-speed mode: 0.11 mA/MHz; software standby: 0.44 µA; wake-up time: 4.8 µs |
Pinout & Package
Package: TFLGA-100 (PTLG0100JA-A), 7 mm × 7 mm, 0.65 mm pitch, 100-terminal land grid array with exposed thermal pad.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / VSS | Power supply / Ground | Dual-domain power pins: VCC (1.8–3.6 V digital core), VSS (digital ground); separate VCC_USB/VSS_USB for USB transceiver isolation |
| AVCC0 / AVSS0 | Analog power / ground | Dedicated 1.8–3.6 V analog domain for A/D and D/A converters; decoupling required for noise-sensitive precision |
| USB0_DP / USB0_DM | USB differential data | Integrated full-speed USB 2.0 transceiver I/O; supports host/function/OTG with on-chip termination and VBUS monitoring |
| TS0–TS11 | Capacitive touch inputs | 12 dedicated CTSU channels for self/mutual capacitance sensing; supports noise cancellation and low-pin-count mutual scan |
| SEG00–SEG39 / COM0–COM7 | LCD segment/common drivers | Supports 40×4 or 36×8 segment-combination LCDs; includes on-chip voltage boost and contrast control for 5 V panels |
Key Features
| Feature | Design Value |
|---|---|
| Event Link Controller (ELC) | Enables 44-event direct peripheral triggering (e.g., MTU2 → A/D start) without CPU interrupt latency or overhead |
| Capacitive Touch Sensing Unit (CTSU) | Hardware-accelerated 12-channel touch detection with on-chip noise canceller; supports both self- and mutual-capacitance modes |
| USB 2.0 OTG with BC Support | Single-port dual-role USB interface with battery charging detection (BC 1.2), isochronous transfers, and embedded transceiver |
| Data Transfer Controller (DTC) | Four transfer modes (normal/repeat/block/chain) triggered by 120 interrupt sources; eliminates CPU involvement in memory moves |
| IEC 60730 Safety Functions | Integrated clock accuracy measurement (CAC), IWDT, RAM test assist, and voltage monitoring for Class B compliance |
Applications
| Smart Home Control Panel | Industrial HMI Terminal |
|---|---|
|
Use Scenario: Wall-mounted touchscreen interface with backlight, buttons, and status LEDs for HVAC/lighting control. IC Role / Device Role / Timing Role: Main application MCU handling USB configuration, capacitive touch decoding, LCD driving, and real-time sensor polling. Use Value: Integrated CTSU + LCD controller + USB OTG reduces BOM count; 4.8 µs wake-up from 0.44 µA standby enables responsive UI with minimal power budget. |
Use Scenario: DIN-rail mounted operator terminal with serial comms to PLCs and local analog I/O monitoring. IC Role / Device Role / Timing Role: Central controller managing RSPI/SCI/RIIC peripherals, 12-bit A/D acquisition, and watchdog-secured firmware updates over USB. Use Value: 17-channel A/D with double-trigger mode supports motor current sampling; ELC-linked timer-to-converter triggering ensures deterministic timing for closed-loop feedback. |
| Portable Medical Device UI | USB-C Enabled Consumer Appliance |
|
Use Scenario: Battery-powered glucose meter or pulse oximeter with touch interface, display, and data logging. IC Role / Device Role / Timing Role: Low-power system-on-chip executing FDA-compliant diagnostics, touch input, and secure USB data export. Use Value: IEC 60730-certifiable features (CAC, IWDT, RAM test assist) streamline safety certification; 0.44 µA software standby extends battery life >1 year. |
Use Scenario: Smart speaker dock or wireless charger with USB-C PD negotiation, LED indicators, and capacitive controls. IC Role / Device Role / Timing Role: Companion MCU handling USB BC detection, LED dimming via PWM, and touch button response with noise immunity. Use Value: USB Battery Charging (BC) support enables fast charging handshake; CTSU's on-chip noise canceller rejects EMI from switching power stages. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F51138ADFP#3A | Same core/peripherals, but LFQFP-100 (14×14 mm, 0.5 mm pitch); no CTSU support per Table 1.2 | Preferred where PCB rework tolerance exists and touch interface is not required; larger footprint eases hand-soldering | Select when CTSU is unnecessary and thermal/mechanical robustness of QFP is prioritized over miniaturization |
| R5F51138AGLJ#2A | Identical TFLGA-100 package and feature set, but rated for −40°C to +105°C industrial temperature range | Required for under-hood automotive or high-ambient industrial enclosures where extended thermal margin is mandatory | Choose for high-temperature environments; otherwise R5F51138ADLJ#2A suffices for commercial-grade applications |
Compared with R5F51138ADLJ#2A, R5F51138ADFP#3A trades CTSU and compact TFLGA for QFP manufacturability and thermal mass, while R5F51138AGLJ#2A retains identical functionality with extended temperature qualification - making the original optimal for space-constrained, touch-enabled commercial designs within 85°C ambient limits.
Availability
R5F51138ADLJ#2A is available at Aetrix Electronics and suitable for smart home control panels, industrial HMI terminals, portable medical UIs, and USB-C consumer appliance interfaces requiring stable component supply across design-in, prototyping, and volume production phases.
Supply support for R5F51138ADLJ#2A includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for industrial, automotive, and IoT applications.
The RX113 Group - including R5F51138ADLJ#2A - is designed for cost-sensitive, low-power human-interface applications demanding integrated touch, display, USB, and functional safety features in compact packages.
FAQ
What is the maximum operating frequency and CPU performance of the R5F51138ADLJ#2A?
The R5F51138ADLJ#2A operates at a maximum frequency of 32 MHz and delivers 50 DMIPS of processing performance. Its 32-bit RX CPU core features a five-stage pipeline, variable-length instruction encoding, and a 64-bit accumulator capable of single-cycle 32×32 multiplication with accumulation - enabling deterministic real-time control in applications like motor drive and touch response.
Does the R5F51138ADLJ#2A support capacitive touch sensing, and how many channels are available?
Yes, the R5F51138ADLJ#2A integrates a Capacitive Touch Sensing Unit (CTSU) supporting up to 12 detection pins (TS0–TS11). It implements both self-capacitance and mutual-capacitance methods with an on-chip noise canceller, allowing robust touch operation in electrically noisy environments - confirmed in the datasheet for the 100-pin TFLGA variant (PTLG0100JA-A).
What USB capabilities does the R5F51138ADLJ#2A provide, and is USB OTG supported?
The R5F51138ADLJ#2A includes a full-featured USB 2.0 host/function/OTG module compliant with USB 2.0 specification. It supports full-speed (12 Mbps) and low-speed (1.5 Mbps) operation, isochronous transfers, and Battery Charging (BC) 1.2 detection. The integrated transceiver and OTG support enable dual-role operation without external PHY components.
What is the package type and pin count of the R5F51138ADLJ#2A?
The R5F51138ADLJ#2A uses the PTLG0100JA-A package: a 100-terminal thin fine-pitch land grid array (TFLGA) measuring 7 mm × 7 mm with 0.65 mm pitch. This compact, thermally enhanced package is optimized for space-constrained applications such as portable medical devices and smart home controllers.
How does the R5F51138ADLJ#2A support functional safety standards like IEC 60730?
The R5F51138ADLJ#2A includes hardware features required for IEC 60730 Class B compliance: Clock Frequency Accuracy Measurement circuit (CAC), Independent Watchdog Timer (IWDT) with dedicated 15 kHz oscillator, RAM test assist functions, and dual-voltage detection circuits (LVDAa). These are documented in the datasheet as on-chip safety mechanisms for embedded control applications.
R5F51138ADLJ#2A Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 100-TFLGA
- Series:
- RX113
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- RX
- Core Size:
- 32-Bit Single-Core
- Speed:
- 32MHz
- Connectivity:
- I2C, IrDA, SCI, SPI, SSI, USB OTG
- Peripherals:
- Capacitive Touch, DMA, LCD, LVD, POR, PWM, WDT
- Number of I/O:
- 82
- Program Memory Size:
- 512KB (512K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 64K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 3.6V
- Data Converters:
- A/D 17x12b; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F51138ADLJ#2A FAQ
1.How can I place an order for R5F51138ADLJ#2A through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F51138ADLJ#2A on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F51138ADLJ#2A reliable?
The price and inventory of R5F51138ADLJ#2A are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F51138ADLJ#2A is usually 5 days.
3.What payment methods are accepted for R5F51138ADLJ#2A?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F51138ADLJ#2A transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F51138ADLJ#2A?
R5F51138ADLJ#2A orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F51138ADLJ#2A order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F51138ADLJ#2A?
For technical support, including R5F51138ADLJ#2A datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F51138ADLJ#2A requirements.
6.How does Aetrix verify that R5F51138ADLJ#2A is sourced from the original manufacturer or authorized distributors?
All R5F51138ADLJ#2A products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F51138ADLJ#2A meets industry standards.
7.What is the process for return or replacement of R5F51138ADLJ#2A?
All R5F51138ADLJ#2A units undergo pre-shipment inspection (PSI). If there is an issue with R5F51138ADLJ#2A, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F51138ADLJ#2A part is unused and in its original packaging.
Return procedure for R5F51138ADLJ#2A:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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