Renesas R5F51305ADFM#10
- Part No.:
- R5F51305ADFM#10
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
R5F51305ADFM#10.pdf
- Description:
- IC MCU 32BIT 128KB FLASH 64LFQFP
- Quantity:
- Payment:

- Shipping:

Inventory:1,280
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Product details
Overview
R5F51305ADFM#10 from Renesas Electronics is a 32-bit RX CPU-based microcontroller operating at up to 32 MHz (50 DMIPS), featuring 128 KB on-chip flash, 16 KB SRAM, 8 KB data flash, 12-bit A/D converter (17 channels), dual 8-bit D/A outputs, capacitive touch sensing (32 keys), and IEC60730-compliant safety functions - deployed in industrial HMI and consumer appliance control systems.
For engineers reviewing the R5F51305ADFM#10 datasheet, R5F51305ADFM#10 pinout, R5F51305ADFM#10 application, or R5F51305ADFM#10 equivalent, this page delivers verified package mapping (PLQP0064KB-C, 64-pin LFQFP, 10 × 10 mm, 0.5 mm pitch), validated peripheral configuration (SCIg ×3, RIIC ×1, RSPI ×1, MTU2 ×6, CMT ×2), and confirmed low-power operation (0.37 µA software standby, 4.8 µs wake-up).
Technical Context
The R5F51305ADFM#10 implements the RXv1 core with CISC Harvard architecture, 5-stage pipeline, and variable-length instructions - enabling single-cycle 32×32-bit multiply and 64-bit accumulator operations. Its clock system integrates high-speed (32 MHz ±1%) and sub-clock (32.768 kHz) oscillators, PLL, and CAC for real-time frequency accuracy monitoring.
Peripheral coordination is managed via Event Link Controller (ELC), allowing timer-triggered A/D conversion or port output enable without CPU intervention. The MCU supports three low-power modes (sleep, deep sleep, software standby), with LPT running off sub-clock during standby and IWDT driven by dedicated 15-kHz oscillator.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv1 32-bit CISC Harvard, 32 MHz max, 50 DMIPS, 64-bit accumulator |
| Memory | 128 KB flash (no wait states @32 MHz), 16 KB SRAM, 8 KB data flash (1M erase cycles) |
| A/D Converter | 12-bit resolution, 17 input channels, 1.4 µs min conversion time, self-diagnostic support |
| D/A Converter | 2-channel, 8-bit, 0–AVCC0 output range |
| Capacitive Touch | 32-key support (mutual capacitance matrix), integrated CTSU unit |
| Low-Power Performance | 0.37 µA software standby current, 4.8 µs wake-up time from standby mode |
| Operating Range | 1.8–5.5 V supply, –40°C to +85°C ambient temperature (D-grade) |
Pinout & Package
Package: PLQP0064KB-C - 64-pin Low-Profile Quad Flat Package, 10 × 10 mm body, 0.5 mm pitch, exposed pad (thermal enhancement), RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / VSS | Power supply / Ground | Main digital power (1.8–5.5 V) and reference ground; decoupling required per layout guidelines |
| XTAL / EXTAL | Main clock oscillator interface | Supports external crystal (1–20 MHz) or clock source; enables precise timing for system clock generation |
| XCIN / XCOUT | Sub-clock oscillator interface | Connects 32.768 kHz crystal for RTC and low-power timer operation |
| MTIOC0A–MTIOC3D | MTU2 waveform I/O | 16 PWM/complementary output pins across 4 timer channels; supports motor control and LED dimming |
| AN000–AN016 | Analog input channels | 17 dedicated A/D inputs with per-channel sampling time control and disconnection detection |
| DA0 / DA1 | Digital-to-analog outputs | Two independent 8-bit voltage outputs referenced to AVCC0; usable for sensor biasing or analog feedback |
| TS0–TS31 | Capacitive touch sensing pins | 32 pins configured for mutual capacitance matrix; enables robust touch button/slider implementation |
| SCI0/SCI1/SCI5 TXD/RXD | Asynchronous serial interfaces | Three full-duplex SCI channels with baud rate generator, supporting UART, LIN, and smart card protocols |
Key Features
| Feature | Design Value |
|---|---|
| IEC60730 Safety Support | Integrated RAM test assistance, A/D self-diagnostic, clock accuracy monitoring (CAC), and IWDT disconnection detection |
| Event-Driven Operation | ELC enables inter-module triggering (e.g., MTU → A/D start) without CPU wake-up or interrupt latency |
| Background Data Flash Programming | BGO allows code execution while writing/erasing 8 KB data flash - critical for firmware updates in field-deployed devices |
| Flexible Clock Configuration | Independent ICLK/PCLKB/FCLK domains; selectable dividers (1/2/4/8/16/32/64) and multiple oscillator sources |
| Capacitive Touch Scalability | CTSU supports up to 32 keys in mutual-capacitance mode using only 32 pins - no external IC or firmware overhead |
Applications
| Industrial HMI Panel | Smart Appliance Control |
|---|---|
|
Use Scenario: Touch-enabled front-panel interface for HVAC controllers with real-time temperature display and fan speed adjustment. IC Role / Device Role / Timing Role: Main system controller executing UI logic, reading capacitive touch inputs, driving segmented LCD via GPIO, and managing thermal sensor ADC reads. Use Value: Integrated CTSU eliminates external touch controller; 128 KB flash accommodates bootloader + application + OTA update image; 0.37 µA standby extends battery life in wireless variants. |
Use Scenario: Washing machine main board coordinating motor drive, water level sensing, detergent dispensing, and user interface. IC Role / Device Role / Timing Role: Central MCU managing SCI communication with motor driver, A/D monitoring of pressure/temperature sensors, and D/A control of analog valves. Use Value: Dual D/A outputs provide precise analog actuator control; IEC60730 features satisfy Class B safety certification requirements; ELC reduces CPU load during sensor polling cycles. |
| Energy Monitoring Gateway | Medical Patient Monitor Interface |
|
Use Scenario: DIN-rail mounted energy meter gateway aggregating current/voltage readings and transmitting via RS485 to cloud platform. IC Role / Device Role / Timing Role: Data concentrator interfacing with isolated A/D front-end, formatting packets via SCI, and maintaining RTC-stamped logs in data flash. Use Value: 17-channel A/D supports multi-sensor acquisition; 8 KB data flash stores >1 month of timestamped energy logs; 32 MHz CPU ensures fast packet processing at 115.2 kbps. |
Use Scenario: Bedside patient monitor with touch-responsive display, SpO₂ sensor interface, and audible alarm generation. IC Role / Device Role / Timing Role: Real-time controller acquiring analog biosignals via A/D, generating audio tones via D/A, and managing touch navigation with CTSU. Use Value: 1.4 µs A/D conversion enables high-fidelity pulse waveform capture; dual D/A channels drive piezo buzzer and analog audio amplifier simultaneously; RTC supports clinical event timestamping. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F51305AGFM#30 | Same core, memory, and peripherals; rated for –40°C to +105°C (G-grade) vs. D-grade (–40°C to +85°C) | Required for extended-temperature industrial environments (e.g., factory floor controllers, automotive under-hood modules) | Select R5F51305AGFM#30 when ambient operating temperature exceeds +85°C or automotive qualification is needed. |
| R5F51306BDFM#30 | 256 KB flash, 32 KB SRAM, same package; otherwise identical peripheral set and clock architecture | Suitable for applications requiring larger firmware footprint (e.g., BLE stack integration, advanced UI rendering, dual-bank OTA) | Choose R5F51306BDFM#30 when firmware size exceeds 128 KB or future scalability demands more code space. |
Compared with R5F51305ADFM#10, R5F51305AGFM#30 offers extended temperature tolerance without altering pinout or firmware compatibility, while R5F51306BDFM#30 provides double the flash and RAM for feature-rich implementations - both retain identical peripheral count, ELC/CTSU functionality, and low-power behavior.
Availability
R5F51305ADFM#10 is available at Aetrix Electronics and suitable for industrial HMI, smart appliance control, and energy monitoring gateways requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant sourcing.
Supply support for R5F51305ADFM#10 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for industrial, automotive, and IoT markets.
The RX130 Group - including R5F51305ADFM#10 - is engineered for cost-sensitive, safety-aware embedded applications demanding rich analog integration, capacitive touch, and IEC60730 compliance in compact packages.
FAQ
What is the maximum operating frequency and CPU performance of the R5F51305ADFM#10?
The R5F51305ADFM#10 operates at a maximum frequency of 32 MHz and delivers 50 DMIPS of processing performance. Its RXv1 32-bit CPU core supports single-cycle 32×32-bit multiplication and a 64-bit accumulator, enabling efficient signal processing and real-time control tasks within the R5F51305ADFM#10's embedded applications.
Does the R5F51305ADFM#10 support capacitive touch sensing, and how many keys can it handle?
Yes, the R5F51305ADFM#10 integrates a Capacitive Touch Sensing Unit (CTSU) supporting up to 32 keys in mutual-capacitance matrix mode using 32 dedicated TS pins. This capability is confirmed for the PLQP0064KB-C package variant and requires no external components - a key differentiator of the R5F51305ADFM#10 in HMI-focused designs.
What low-power modes and current consumption values are specified for the R5F51305ADFM#10?
The R5F51305ADFM#10 supports three low-power modes: sleep, deep sleep, and software standby. In software standby mode, it draws just 0.37 µA (typical) while maintaining RTC and LPT operation, with a wake-up time of 4.8 µs. These values are measured and guaranteed for the R5F51305ADFM#10 under standard conditions per its datasheet Rev.3.00.
Which communication interfaces are available on the R5F51305ADFM#10, and how many channels does each support?
The R5F51305ADFM#10 provides SCIg (3 channels: SCI1, SCI5, SCI6), RIIC (1 channel), and RSPI (1 channel). It does not include SCIh or REMC in the 64-pin PLQP0064KB-C package. All interfaces are fully functional and pin-assigned per Table 1.4 and Figure 1.5 of the R5F51305ADFM#10 datasheet.
Is the R5F51305ADFM#10 qualified for IEC60730 Class B safety compliance?
Yes, the R5F51305ADFM#10 includes hardware-assisted IEC60730 Class B features: A/D self-diagnostic, clock accuracy measurement circuit (CAC), IWDT disconnection detection, RAM test assistance via DOC, and voltage monitoring circuits. These are documented in Section 1.1 and Section 24 of the R5F51305ADFM#10 datasheet and form part of its certified safety architecture.
R5F51305ADFM#10 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 64-LQFP
- Series:
- RX130
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- RX
- Core Size:
- 32-Bit Single-Core
- Speed:
- 32MHz
- Connectivity:
- I2C, LINbus, SCI, SPI
- Peripherals:
- Capacitive Touch, DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 52
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 16K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 5.5V
- Data Converters:
- A/D 14x12b; D/A 2x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F51305ADFM#10 FAQ
1.How can I place an order for R5F51305ADFM#10 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F51305ADFM#10 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F51305ADFM#10 reliable?
The price and inventory of R5F51305ADFM#10 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F51305ADFM#10 is usually 5 days.
3.What payment methods are accepted for R5F51305ADFM#10?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F51305ADFM#10 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F51305ADFM#10?
R5F51305ADFM#10 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F51305ADFM#10 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F51305ADFM#10?
For technical support, including R5F51305ADFM#10 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F51305ADFM#10 requirements.
6.How does Aetrix verify that R5F51305ADFM#10 is sourced from the original manufacturer or authorized distributors?
All R5F51305ADFM#10 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F51305ADFM#10 meets industry standards.
7.What is the process for return or replacement of R5F51305ADFM#10?
All R5F51305ADFM#10 units undergo pre-shipment inspection (PSI). If there is an issue with R5F51305ADFM#10, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F51305ADFM#10 part is unused and in its original packaging.
Return procedure for R5F51305ADFM#10:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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