Renesas R5F51305AGFK#10

Overview

R5F51305AGFK#10 from Renesas is a 32-bit RX CPU-based microcontroller operating at up to 32 MHz (50 DMIPS), featuring 128 KB on-chip flash, 16 KB SRAM, 8 KB data flash, 12-bit A/D converter (17 channels), dual 8-bit D/A outputs, capacitive touch sensing (32 channels), and IEC60730-compliant safety functions for industrial control and appliance HMI applications.

For engineers reviewing the R5F51305AGFK#10 datasheet, R5F51305AGFK#10 pinout, R5F51305AGFK#10 application, or R5F51305AGFK#10 equivalent, key selection criteria include its LQFP-64 (0.8 mm pitch) package, –40°C to +105°C extended temperature grade, integrated RTC with calendar mode, low-power software standby mode (0.37 µA), and ELC-driven event-linked peripheral operation without CPU wake-up.

Technical Context

The R5F51305AGFK#10 implements the RXv1 core with CISC Harvard architecture, 5-stage pipeline, and variable-length instructions-enabling ultra-compact code and single-cycle 32×32-bit multiplication. Its clock system integrates high-speed (32 MHz ±1%) and sub-clock (32.768 kHz) oscillators, PLL, and CAC for real-time frequency accuracy monitoring.

Peripheral coordination is managed via the Event Link Controller (ELC), enabling direct module-to-module triggering (e.g., MTU timer start → A/D conversion trigger) while the CPU remains in deep sleep. The DTC supports chain transfer across four interrupt sources, and the MPC allows flexible I/O function assignment across multiple pins.

Key Specifications

Pinout & Package

R5F51305AGFK#10 uses a 64-pin LQFP package (PLQP0064GA-A), 14 × 14 mm body, 0.8 mm pitch, with exposed pad for thermal management. Pin functions are fully defined in Renesas R01DS0273EJ0300 Rev.3.00.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar microcontroller applications.

Compared with R5F51305ADFK#30, the R5F51305AGFK#10 provides extended temperature operation critical for under-hood or factory-floor deployments; versus R5F51306BGFK#30, it trades flash/SRAM capacity for lower cost and power in resource-constrained designs.

Availability

R5F51305AGFK#10 is available at Aetrix Electronics and suitable for industrial HMI, appliance control panels, and smart sensor nodes requiring stable component supply, extended temperature operation, and IEC60730-compliant safety features.

Supply support for R5F51305AGFK#10 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Renesas Electronics Corporation is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.

The RX130 Group targets cost-sensitive, safety-aware embedded applications-delivering high-performance 32-bit processing, integrated capacitive touch, low-power operation, and functional safety features in compact packages.

FAQ

What is the maximum operating frequency and supply voltage range for the R5F51305AGFK#10?

The R5F51305AGFK#10 operates at up to 32 MHz when supplied with 2.7–5.5 V, 16 MHz at 2.4–2.7 V, and 8 MHz at 1.8–2.4 V. Its high-speed on-chip oscillator delivers 32 MHz ±1% accuracy, enabling precise timing without external crystals in many applications. All operating modes maintain full functionality of the 128 KB flash, 16 KB SRAM, and integrated peripherals including the 12-bit A/D converter and CTSU.

Does the R5F51305AGFK#10 support IEC60730 Class B compliance out of the box?

Yes, the R5F51305AGFK#10 includes hardware-assisted IEC60730 Class B safety features: A/D converter self-diagnostic, clock frequency accuracy measurement (CAC), independent watchdog timer (IWDT) with dedicated 15 kHz oscillator, RAM test support via Data Operation Circuit (DOC), and analog input disconnection detection. These features reduce external component count and simplify certification-though final system-level validation remains the designer's responsibility.

How many capacitive touch channels does the R5F51305AGFK#10 support, and what configurations are available?

The R5F51305AGFK#10 integrates a Capacitive Touch Sensing Unit (CTSU) supporting up to 32 dedicated touch channels (TS0–TS31). It operates in self-capacitance mode (one pin per key, up to 32 keys) or mutual-capacitance matrix mode (row/column scanning). The hardware engine handles baseline adjustment, noise rejection, and touch detection autonomously-freeing the RX CPU for application tasks while maintaining low power consumption.

What communication interfaces are available on the R5F51305AGFK#10, and how are they distributed across pins?

The R5F51305AGFK#10 provides SCI (7 channels total: SCI0,1,5,6,8,9,12), I²C (1 channel, RIIC0), RSPI (1 channel), and simple I²C/SPI modes on SCI pins. In its PLQP0064GA-A (64-pin LQFP) package, SCI0–SCI9 share pins with general I/O (e.g., P00–P07, P10–P17), while SCI12, RIIC0, and RSPI use dedicated pins (SCK12/RXD12/TXD12; SCL0/SDA0; RSPCKA/MOSIA/MISOA). Pin multiplexing is managed by the MPC.

What is the purpose and behavior of the Event Link Controller (ELC) in the R5F51305AGFK#10?

The Event Link Controller (ELC) in the R5F51305AGFK#10 enables direct, CPU-free triggering between 47 supported peripheral events-such as MTU2 timer overflow initiating an A/D conversion, or RTC alarm triggering a GPIO toggle. This eliminates interrupt latency and CPU wake-up overhead, allowing sustained low-power operation (e.g., deep sleep) while maintaining real-time responsiveness. ELC configuration is register-based and fully deterministic.