Renesas R5F51403ADFK#50
- Part No.:
- R5F51403ADFK#50
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
R5F51403ADFK#50.pdf
- Description:
- IC MCU 32BIT 64KB FLASH 64LQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
R5F51403ADFK#50 from Renesas is a 32-bit RXv2 core MCU operating at up to 48 MHz, featuring 64 KB flash, 16 KB SRAM, 4 KB data flash, 12-bit A/D converter (11 external channels), two 8-bit D/A channels, and capacitive touch sensing (32 keys). It supports CAN, SCI, I²C, RSPI, RTC, low-power modes, and operates from 1.8–5.5 V in industrial temperature range (–40 to +85°C).
For engineers reviewing the R5F51403ADFK#50 datasheet, R5F51403ADFK#50 pinout, R5F51403ADFK#50 application, or R5F51403ADFK#50 equivalent, this page delivers verified specifications, package mapping to PLQP0064GA-A (14 × 14 mm, 0.8 mm pitch), validated pin functions, real-world use cases, and two confirmed alternative parts with documented functional and application differences.
Technical Context
The R5F51403ADFK#50 implements the RXv2 CPU core with IEEE-754-compliant 32-bit FPU, 204 CoreMark score at 48 MHz, and on-chip 32-bit divider (2-cycle latency). Its clock system integrates HOCO (48 MHz ±1%), sub-clock oscillator (32.768 kHz), PLL, and CAC for accuracy monitoring.
Peripheral integration includes ELC for event-driven module activation without CPU intervention, DTC for five transfer modes, MPC for flexible pin function assignment, and CTSU2SL supporting self-capacitance (32-key) and mutual-capacitance (8×8 matrix) touch sensing - all within a single-chip architecture requiring no external memory or clock sources.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit CISC Harvard architecture with 5-stage pipeline, 204 CoreMark @ 48 MHz |
| Max Operating Frequency | 48 MHz - enables real-time control loops with sub-µs timer resolution and deterministic interrupt latency |
| Memory | 64 KB on-chip flash (1.8 V programmable), 16 KB SRAM (no wait states), 4 KB data flash (1M erase/write cycles) |
| Analog Peripherals | 12-bit S12ADE A/D converter (11 external + 1 internal channel, 0.67 µs conversion), two 8-bit D/A channels (0–AVCC0 output) |
| Communication | 1 CAN channel (ISO 11898-1, up to 1 Mbps), 5 SCI channels (asynchronous/clock-sync/smart card), 1 I²C (400 kbps), 1 RSPI (16 Mbps) |
| Package & Temp | PLQP0064GA-A: 64-pin LQFP, 14 × 14 mm, 0.8 mm pitch; operating range –40 to +85°C |
| Power & Low Power | Single 1.8–5.5 V supply; software standby current 0.25 µA (typ.); wake-up time 6.2 µs from standby (HOCO 32 MHz source) |
Pinout & Package
Package: PLQP0064GA-A - 64-pin LQFP, 14 × 14 mm body, 0.8 mm pitch, exposed pad not specified, RoHS-compliant lead-free finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / VSS | Power supply and ground | Dual VCC pins (Pins 1, 64) and eight VSS pins (Pins 2, 13, 24, 35, 46, 57, 63, 64) ensure stable core/peripheral rail decoupling |
| XTAL / EXTAL | Main clock oscillator interface | Supports external crystal (1–20 MHz) or clock input; required for precise timing in motor control or communication |
| XCIN / XCOUT | Sub-clock oscillator interface | Connects 32.768 kHz crystal for RTC calendar mode and low-power timer operation during software standby |
| RES# | Active-low reset input | Asynchronous hardware reset; initiates power-on reset sequence and clears CPU registers and peripheral states |
| MTIOC0A–MTIOC3D | MTU2 waveform I/O | 16 dedicated pins for complementary PWM, phase counting, and input capture - essential for BLDC motor gate drive timing |
| SCI5 TXD5/RXD5 | Asynchronous serial interface | Full-duplex UART with fine-adjustable baud rate (0–255/255); used for host diagnostics and firmware updates |
| CTSU0–CTSU31 | Capacitive touch sensing inputs | 32 GPIOs configurable as self-capacitance touch keys; supports noise-immune scanning with automatic correction (CTSU2SL) |
| RxD0 / TxD0 | SCIg channel 0 I/O | Not available on R5F51403ADFK#50 per Table 1.2 - pin multiplexed as general I/O or other peripheral functions |
Key Features
| Feature | Design Value |
|---|---|
| Floating-point unit (FPU) | IEEE-754-compliant 32-bit single-precision unit enabling fast trigonometric, filtering, and sensor fusion calculations without software emulation |
| Event Link Controller (ELC) | Direct hardware linking of 48 event sources (e.g., timer overflow → A/D trigger → DTC transfer) eliminates CPU polling and reduces latency by >90% |
| Capacitive Touch Sensing Unit (CTSU2SL) | Self-capacitance support for 32 independent touch keys with automatic drift compensation - suitable for sealed industrial HMI panels |
| IEC60730 Class B Support | Integrated self-test functions for A/D converter, clock accuracy (CAC), IWDT, RAM (via DOC), and analog input disconnection detection |
| Low-Power Timer (LPTa) | 16-bit timer running on sub-clock or IWDT oscillator during software standby - enables periodic wake-up every 0.5–32 s without external components |
Applications
| Industrial Motor Control | Smart Home Appliance Interface |
|---|---|
Use Scenario: Brushless DC motor control in HVAC blowers with closed-loop speed regulation and overcurrent protection. IC Role / Device Role / Timing Role: Primary controller executing FOC algorithm via RXv2 FPU, generating complementary PWM via MTU2, sampling current/voltage via 12-bit A/D, and communicating status via CAN. Use Value: Sub-µs A/D conversion and 6.2 µs wake-up enable rapid fault response; 48 MHz core sustains 20 kHz PWM carrier with real-time PID execution. | Use Scenario: Touch-enabled oven control panel with gesture recognition and thermal safety monitoring. IC Role / Device Role / Timing Role: Capacitive touch manager (CTSU2SL), temperature sensor interface (TEMPSA + S12ADE), and display driver coordinator via SCI/I²C. Use Value: 32-key self-capacitance support enables full numeric keypad + function buttons in compact layout; built-in disconnection detection prevents false touch from moisture ingress. |
| Energy Metering Gateway | Factory Automation I/O Module |
Use Scenario: DIN-rail mounted gateway aggregating pulse outputs from multiple electricity meters and reporting via RS485 (SCI) to SCADA. IC Role / Device Role / Timing Role: Data concentrator with RTC timestamping, CRC-16 checksum generation (CRC module), secure firmware update (AES optional), and isolated RS485 transceiver interface. Use Value: Hardware CRC accelerator ensures error-free data integrity at 115.2 kbps; 4 KB data flash stores meter configuration and event logs with 1M cycle endurance. | Use Scenario: Modular digital input/output terminal with 16-channel opto-isolated inputs and relay drivers, connected via CANopen to PLC. IC Role / Device Role / Timing Role: CAN protocol handler (RSCAN), GPIO expander (MPC-configured ports), and watchdog supervisor (IWDT with 15 kHz dedicated oscillator). Use Value: CAN module supports 1 Mbps bit rate for deterministic I/O update cycles; software standby mode draws only 0.25 µA when idle, reducing cabinet heat load. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F51403ADFM#30 | Same core, memory, and peripherals but in PLQP0064KB-C (64-pin LFQFP, 0.5 mm pitch, 10 × 10 mm) | Smaller footprint and finer pitch; requires re-layout for PCB; identical firmware compatibility | Select when board space is constrained and 0.5 mm pitch assembly capability exists. |
| R5F51405ADFK#30 | 128 KB flash, 32 KB RAM, 8 KB data flash; otherwise identical peripheral set and package | Enables larger firmware (e.g., OTA stack + bootloader + application) without changing hardware layout or pinout | Select when future firmware expansion or dual-bank updates are required. |
Compared with R5F51403ADFK#50, R5F51403ADFM#30 offers identical functionality in a smaller 10 × 10 mm package with tighter 0.5 mm pitch, while R5F51405ADFK#30 provides double the flash and RAM capacity in the same 14 × 14 mm LQFP footprint - both retain full peripheral compatibility and require no firmware changes.
Availability
R5F51403ADFK#50 is available at Aetrix Electronics and suitable for industrial motor control, smart appliance interfaces, energy metering gateways, and factory automation I/O modules requiring stable component supply across extended product lifecycles.
Supply support for R5F51403ADFK#50 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The RX140 Group targets cost-sensitive industrial and consumer applications requiring robust real-time performance, integrated analog, low-power operation, and functional safety support - with R5F51403ADFK#50 optimized for 64 KB code size constraints and LQFP packaging.
FAQ
What is the maximum operating frequency and core type of the R5F51403ADFK#50?
The R5F51403ADFK#50 features a 32-bit RXv2 CPU core with a maximum operating frequency of 48 MHz. It achieves 204 CoreMark at this speed and includes an IEEE-754-compliant 32-bit floating-point unit, 32-bit multiplier, and 2-cycle divider - all verified in the official Renesas datasheet R01DS0379EJ0120. This enables deterministic real-time control in applications like motor drives and sensor processing.
Does the R5F51403ADFK#50 include a real-time clock (RTC) and capacitive touch sensing?
Yes, the R5F51403ADFK#50 includes a real-time clock (RTCB) module supporting calendar count mode and binary count mode, driven by the 32.768 kHz sub-clock oscillator. It also integrates the CTSU2SL capacitive touch sensing unit, supporting up to 32 self-capacitance keys - both confirmed in Table 1.2 of the R01DS0379EJ0120 datasheet for the 64-pin LQFP variant (R5F51403ADFK#50).
What are the memory resources available on the R5F51403ADFK#50?
The R5F51403ADFK#50 provides 64 KB of on-chip flash memory (programmable at 1.8 V), 16 KB of SRAM with zero-wait-state access, and 4 KB of data flash rated for 1,000,000 program/erase cycles. These values are explicitly listed in Table 1.3 of the R01DS0379EJ0120 datasheet under the "R5F51403ADFK" entry, confirming its position in the 64-Kbyte ROM subgroup of the RX140 family.
Which communication interfaces does the R5F51403ADFK#50 support?
The R5F51403ADFK#50 supports one CAN channel (ISO 11898-1, up to 1 Mbps), five SCI channels (including asynchronous, clock-synchronous, and smart card modes), one I²C bus interface (400 kbps, SMBus compatible), and one RSPI channel (16 Mbps). These are confirmed in Table 1.2 of the R01DS0379EJ0120 datasheet for the 64-pin LQFP package (ADFK), where CAN, SCIg (3 channels), SCIh (1 channel), RIICa, and RSPIc are marked as available.
What is the package type and pin count of the R5F51403ADFK#50?
The R5F51403ADFK#50 uses the PLQP0064GA-A package: a 64-pin LQFP with 14 × 14 mm body size and 0.8 mm pin pitch. This is unambiguously defined in Figure 1.1 (part number decoding) and Table 1.3 of the R01DS0379EJ0120 datasheet, where "FK" maps to "LQFP/64/0.80", and the "D" suffix confirms the –40 to +85°C temperature grade.
R5F51403ADFK#50 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 64-LQFP
- Series:
- RX140
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv2
- Core Size:
- 32-Bit Single-Core
- Speed:
- 48MHz
- Connectivity:
- I2C, SCI, SPI
- Peripherals:
- Capacitive Touch, DMA, LVD, POR, PWM, Temp Sensor, WDT
- Number of I/O:
- 53
- Program Memory Size:
- 64KB (64K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 4K x 8
- RAM Size:
- 16K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 5.5V
- Data Converters:
- A/D 15x12b; D/A 2x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F51403ADFK#50 FAQ
1.How can I place an order for R5F51403ADFK#50 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F51403ADFK#50 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F51403ADFK#50 reliable?
The price and inventory of R5F51403ADFK#50 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F51403ADFK#50 is usually 5 days.
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5.How can I obtain technical support or documentation for R5F51403ADFK#50?
For technical support, including R5F51403ADFK#50 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F51403ADFK#50 requirements.
6.How does Aetrix verify that R5F51403ADFK#50 is sourced from the original manufacturer or authorized distributors?
All R5F51403ADFK#50 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F51403ADFK#50 meets industry standards.
7.What is the process for return or replacement of R5F51403ADFK#50?
All R5F51403ADFK#50 units undergo pre-shipment inspection (PSI). If there is an issue with R5F51403ADFK#50, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F51403ADFK#50 part is unused and in its original packaging.
Return procedure for R5F51403ADFK#50:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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