Renesas R5F51403AGFK#10
- Part No.:
- R5F51403AGFK#10
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
R5F51403AGFK#10.pdf
- Description:
- IC MCU 32BIT 64KB FLASH 64LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:1,946
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F51403AGFK#10 from Renesas is a 32-bit RXv2 core MCU operating at up to 48 MHz, featuring 64 KB flash, 16 KB SRAM, 4 KB data flash, 12-bit A/D converter (11 channels), two 8-bit D/A channels, CAN 2.0B interface, and capacitive touch sensing (32 keys). It targets low-power industrial control and consumer HMI applications requiring IEC60730 compliance and extended temperature operation.
For engineers reviewing the R5F51403AGFK#10 datasheet, R5F51403AGFK#10 pinout, R5F51403AGFK#10 application, or R5F51403AGFK#10 equivalent, key selection criteria include its −40°C to +105°C operating range, LQFP-64 (0.8 mm pitch) package, integrated AES/RNG encryption option (not enabled in this variant), real-time clock omission, and CAN module presence - all confirmed for this specific part number per Renesas R01DS0379EJ0120 Rev.1.20.
Technical Context
The R5F51403AGFK#10 implements the RXv2 CPU core with IEEE-754-compliant 32-bit FPU, 204 CoreMark score at 48 MHz, and on-chip divider completing in two cycles. Its memory subsystem includes no-wait-state SRAM and flash accessible at up to 48 MHz with one-wait-cycle access above 32 MHz.
Peripherals are orchestrated via Event Link Controller (ELC) enabling interrupt-free module triggering and linked operation during CPU sleep. Clock management supports multiple sources - HOCO (48 MHz ±1%), sub-clock (32.768 kHz), and PLL - with independent domain clocks (ICLK, PCLKB, FCLK) and CAC for accuracy monitoring.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit CISC Harvard architecture with 5-stage pipeline, 204 CoreMark @ 48 MHz |
| Max Operating Frequency | 48 MHz with ±1% HOCO accuracy; supports ICLK = FCLK or PCLKB × n (n = 1,2,4,8,16,32,64) |
| Memory | 64 KB on-chip flash (programmable at 1.8 V), 16 KB SRAM (no wait states), 4 KB data flash (1M erase/program cycles) |
| Analog Peripherals | 12-bit S12ADE A/D converter (11 external + 1 internal channels, 0.67 µs min conversion), two 8-bit D/A channels, temperature sensor |
| Communication | 1× CAN 2.0B (1 Mbps), 3× SCIg (asynchronous/clock-sync/smart card), 1× SCIh (LIN support), 1× RIIC (400 kbps), 1× RSPI (16 Mbps) |
| Package & Temp | LQFP-64 (PLQP0064GA-A), 14 × 14 mm, 0.8 mm pitch; operating range −40°C to +105°C (G-grade) |
| Power | Single 1.8–5.5 V supply; 58 µA/MHz active current; 0.25 µA software standby (typ.); 6.2 µs wake-up from standby |
Pinout & Package
Package: PLQP0064GA-A - 64-pin LQFP, 14 × 14 mm body, 0.8 mm pitch, exposed pad not specified, RoHS compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / VSS | Power supply / Ground | Dual power domains: VCC powers digital/analog logic; VSS is common reference; decoupling required per datasheet layout guidelines |
| XTAL / EXTAL | Main crystal oscillator interface | Supports 1–20 MHz external crystals; EXTAL accepts external clock input; used for high-accuracy system timing |
| XCIN / XCOUT | Sub-clock oscillator interface | Connects 32.768 kHz crystal for RTC and low-power timing; enables calendar mode and snooze-mode operation |
| RES# | Active-low reset input | Asynchronous hardware reset; initiates power-on reset sequence and clears CPU registers and peripheral states |
| MTIOC0A–MTIOC4D | MTU2 waveform I/O | 16-bit multi-function timer pins supporting PWM, complementary output, phase counting, and A/D trigger generation |
| RXD12 / TXD12 / SCK12 | SCIh serial interface | Full-duplex UART/I2C/SPI-capable channel with LIN protocol support; enables automotive diagnostics and bus communication |
| CAN_TX / CAN_RX | CAN 2.0B physical layer interface | Dedicated differential pair for ISO11898-1 compliant CAN bus; supports 1 Mbps transfer with 16 mailboxes and error handling |
| AD00–AD10 | A/D converter analog inputs | 11-channel 12-bit sampling; each channel supports programmable sampling time and disconnection detection |
| DA00 / DA01 | Digital-to-analog outputs | Two independent 8-bit voltage-output DACs (0 V to AVCC0); usable for sensor biasing or analog actuator control |
| CTSU00–CTSU31 | Capacitive touch sensing inputs | 32-key self-capacitance support; enables button/slider/knob HMI without external components |
Key Features
| Feature | Design Value |
|---|---|
| IEC60730 Class B Support | Integrated self-test functions for A/D, IWDT, clock accuracy (CAC), RAM (via DOC), and analog input disconnection detection |
| Low-Power Operation | Four distinct low-power modes (sleep, deep sleep, software standby, snooze); 0.25 µA standby current with LPT running |
| Event-Driven Architecture | ELC enables 48 event sources to trigger peripheral actions (e.g., timer start, A/D conversion) without CPU intervention or interrupts |
| Hardware Encryption Option | AESA (AES-128/256) and RNGA available in B-variant parts; R5F51403AGFK#10 is A-variant (encryption disabled) |
| Robust Clock System | Multiple oscillators (HOCO, LOCO, sub-clock, PLL), oscillation stop detection, and CAC for real-time frequency validation against reference |
Applications
| Industrial Motor Control | Smart Appliance HMI |
|---|---|
Use Scenario: Brushless DC motor commutation and sensorless position estimation in HVAC blowers or pump drives. IC Role / Device Role / Timing Role: Primary controller executing FOC algorithms using RXv2 FPU, generating complementary PWM via MTU2, and sampling current/voltage via 12-bit A/D with 0.67 µs conversion. Use Value: Enables precise torque control and efficiency optimization within −40°C to +105°C ambient, supported by IEC60730-compliant self-diagnostics. | Use Scenario: Touch-enabled user interface for washing machines or ovens with proximity wake-up and gesture recognition. IC Role / Device Role / Timing Role: Capacitive touch sensing unit (CTSU2SL) scanning 32 keys in self-capacitance mode while managing display backlight via D/A outputs and real-time cycle timing. Use Value: Eliminates mechanical buttons and external touch controllers; operates reliably across wide temperature ranges with built-in noise immunity. |
| Automotive Body Electronics | Energy Monitoring Gateway |
Use Scenario: Door module controlling window lift, mirror adjustment, and interior lighting with LIN/CAN interconnect. IC Role / Device Role / Timing Role: SCIh channel implements LIN 2.2 protocol for body network communication; CAN module interfaces with main ECU; MTU2 generates PWM for LED dimming. Use Value: Single-chip solution meets AEC-Q100 stress requirements (G-grade temp), reduces BOM count, and supports diagnostic message scheduling. | Use Scenario: Smart meter data concentrator aggregating current/voltage readings from shunt sensors and communicating via RS485/CAN. IC Role / Device Role / Timing Role: 12-bit A/D converter samples dual-channel analog inputs with programmable sampling time; RSPI handles high-speed SPI flash logging; RTC (not present) omitted - uses external time source. Use Value: High-precision metrology-grade sampling (0.67 µs) and deterministic communication enable Class 0.5 accuracy certification under IEC62053. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F51403ADFK#30 | Same package (LQFP-64), identical peripherals, but rated for −40°C to +85°C (D-grade); no encryption module | Suitable for commercial indoor equipment where extended temperature is unnecessary | Select when ambient operating temperature does not exceed +85°C and cost sensitivity favors D-grade qualification |
| R5F51405AGFK#30 | 128 KB flash / 32 KB RAM / 8 KB data flash; same G-grade temp, package, and peripheral set | Required for firmware with larger code footprint or enhanced data logging needs | Choose when application demands >64 KB flash for bootloader, OTA updates, or complex control algorithms |
Compared with R5F51403AGFK#10, R5F51403ADFK#30 offers identical functionality at lower thermal rating, while R5F51405AGFK#30 provides scalable memory headroom - both retain CAN, CTSU, and IEC60730 features without PCB changes.
Availability
R5F51403AGFK#10 is available at Aetrix Electronics and suitable for industrial motor control, smart appliance HMI, automotive body electronics, and energy monitoring gateways requiring stable component supply across extended temperature ranges.
Supply support for R5F51403AGFK#10 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for industrial, automotive, and enterprise markets.
The RX140 Group is designed for cost-sensitive, low-power embedded applications demanding functional safety (IEC60730), rich analog integration, and capacitive touch - targeting white goods, building automation, and entry-level automotive modules.
FAQ
What is the maximum operating frequency and core type of the R5F51403AGFK#10?
The R5F51403AGFK#10 features a 32-bit RXv2 CPU core with a maximum operating frequency of 48 MHz, achieving 204 CoreMark performance. Its HOCO delivers ±1% accuracy at 48 MHz, and the on-chip PLL supports flexible clock synthesis from 4–12 MHz inputs. This frequency is fully supported across its −40°C to +105°C operating range.
Does the R5F51403AGFK#10 include a real-time clock (RTC) module?
No, the R5F51403AGFK#10 does not include a real-time clock (RTCB) module. Per Table 1.2 in R01DS0379EJ0120 Rev.1.20, RTC is only available in 80-pin and certain 64-pin variants (e.g., R5F51406x) with ≥128 KB ROM. This part has 64 KB ROM and belongs to the "Products with 64-Kbyte ROM" group where RTC is explicitly marked "Not supported".
What is the capacitive touch sensing capability of the R5F51403AGFK#10?
The R5F51403AGFK#10 integrates CTSU2SL supporting up to 32 keys in self-capacitance mode. As confirmed in Table 1.2, this 64-pin LQFP variant with 64 KB ROM provides 32 CTSU channels - sufficient for touch sliders, keypads, or proximity wake-up in appliances and industrial panels without external ICs.
Is hardware encryption available on the R5F51403AGFK#10?
No, the R5F51403AGFK#10 is an "A"-variant part, meaning the AESA and RNGA encryption modules are not implemented. Per Table 1.3 and Figure 1.1, the "A" in the part number denotes "Encryption module not included." For AES-128/256 or true random number generation, select a "B"-variant such as R5F51403BGFK#30.
Which communication interfaces are supported by the R5F51403AGFK#10?
The R5F51403AGFK#10 supports 1× CAN 2.0B (1 Mbps), 3× SCIg (asynchronous/clock-sync/smart card), 1× SCIh (LIN-compliant), 1× RIIC (I2C/SMBus, 400 kbps), and 1× RSPI (SPI, 16 Mbps). It lacks the second SCI channel found in higher-ROM variants, and no RTC or USB is integrated - all confirmed in Table 1.2 of the official datasheet.
R5F51403AGFK#10 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 64-LQFP
- Series:
- RX140
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv2
- Core Size:
- 32-Bit Single-Core
- Speed:
- 48MHz
- Connectivity:
- I2C, SCI, SPI
- Peripherals:
- Capacitive Touch, DMA, LVD, POR, PWM, Temp Sensor, WDT
- Number of I/O:
- 53
- Program Memory Size:
- 64KB (64K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 4K x 8
- RAM Size:
- 16K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 5.5V
- Data Converters:
- A/D 15x12b; D/A 2x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F51403AGFK#10 FAQ
1.How can I place an order for R5F51403AGFK#10 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F51403AGFK#10 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F51403AGFK#10 reliable?
The price and inventory of R5F51403AGFK#10 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F51403AGFK#10 is usually 5 days.
3.What payment methods are accepted for R5F51403AGFK#10?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F51403AGFK#10 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F51403AGFK#10?
R5F51403AGFK#10 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F51403AGFK#10 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F51403AGFK#10?
For technical support, including R5F51403AGFK#10 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F51403AGFK#10 requirements.
6.How does Aetrix verify that R5F51403AGFK#10 is sourced from the original manufacturer or authorized distributors?
All R5F51403AGFK#10 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F51403AGFK#10 meets industry standards.
7.What is the process for return or replacement of R5F51403AGFK#10?
All R5F51403AGFK#10 units undergo pre-shipment inspection (PSI). If there is an issue with R5F51403AGFK#10, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F51403AGFK#10 part is unused and in its original packaging.
Return procedure for R5F51403AGFK#10:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F51403AGFK#10 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

