Renesas R5F51405AGFM#30
- Part No.:
- R5F51405AGFM#30
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
R5F51405AGFM#30.pdf
- Description:
- IC MCU 32BIT 128MB FLASH 64LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:630
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F51405AGFM#30 from Renesas is a 32-bit RXv2 core MCU operating at up to 48 MHz, featuring 128 KB flash, 32 KB SRAM, 8 KB data flash, integrated FPU, 12-bit A/D converter (15 channels), two 8-bit D/A channels, CAN 2.0B interface, and capacitive touch sensing (32 keys). It targets industrial control panels requiring real-time responsiveness, low-power operation, and IEC60730-compliant safety functions.
For engineers reviewing the R5F51405AGFM#30 datasheet, R5F51405AGFM#30 pinout, R5F51405AGFM#30 application, or R5F51405AGFM#30 equivalent, key selection criteria include its 64-pin LFQFP-0.5 mm package, –40°C to +105°C extended temperature rating, on-chip AES/RNG encryption option, and support for event-driven peripheral coordination via ELC without CPU wake-up.
Technical Context
The R5F51405AGFM#30 implements the RXv2 CISC Harvard architecture with 5-stage pipeline and variable-length instructions, enabling 204 CoreMark at 48 MHz. Its on-chip FPU complies with IEEE-754 single-precision, and the 32-bit hardware divider executes in two clock cycles.
Power management includes four low-power modes, with software standby consuming 0.25 µA (typ.) and 6.2 µs wake-up time using HOCO 32 MHz. Clock generation integrates PLL, HOCO (48 MHz ±1%), LOCO, sub-clock (32.768 kHz), and IWDT-dedicated 15 kHz oscillator, all configurable via CAC for accuracy monitoring.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit, 48 MHz max - enables deterministic real-time execution with 204 CoreMark performance |
| Memory | 128 KB flash / 32 KB SRAM / 8 KB data flash - supports field firmware updates and parameter storage with 1M erase/write cycles |
| Analog Peripherals | 12-bit S12ADE A/D (15 ch, 0.67 µs conv.) + dual 8-bit D/A - meets precision sensor interfacing and actuator control timing |
| Communication | CAN 2.0B (1 Mbps) + SCI ×5 + RIIC ×1 + RSPI ×1 - provides robust industrial bus connectivity and flexible serial expansion |
| Timing & Control | MTU2a (6×16-bit) + CMT (2×16-bit) + LPT (16-bit) - delivers motor PWM, capture/compare, and RTC-free low-power timing |
| Security & Safety | AESA (128/256-bit AES) + RNGA + IEC60730 self-test assist - satisfies functional safety diagnostics for Class B compliance |
| Package & Temp | PLQP0064KB-C (64-pin LFQFP, 10×10 mm, 0.5 mm pitch), –40°C to +105°C - suitable for harsh industrial environments |
Pinout & Package
Package: PLQP0064KB-C - 64-pin Low-Profile Quad Flat Package, 10 mm × 10 mm body, 0.5 mm lead pitch, exposed thermal pad.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / VSS | Power supply / Ground | Dual power domains: VCC powers digital/analog logic; VSS reference for all I/O and analog circuits |
| XTAL / EXTAL | Main clock oscillator interface | Supports external crystal (1–20 MHz) or clock input for precise system timing |
| XCIN / XCOUT | Sub-clock oscillator interface | Connects 32.768 kHz crystal for RTC calendar mode and low-power wake-up source |
| RES# | Active-low reset input | Asynchronous hardware reset with internal pull-up; initiates full system initialization sequence |
| MTIOC0A–MTIOC4D | MTU2 waveform I/O | Configurable PWM, complementary output, phase counting, or input capture across six timer channels |
| RXDX12 / TXDX12 | SCIh extended serial interface | Enables LIN protocol frame handling and start-frame detection for automotive-grade communication |
| SCL0 / SDA0 | I2C bus interface | Open-drain pins supporting SMBus fast-mode (400 kbps) with built-in arbitration and clock stretching |
| RSCAN_TX / RSCAN_RX | CAN physical layer interface | Dedicated differential pair pins compliant with ISO11898-1; require external transceiver for bus connection |
| CTSU0–CTSU31 | Capacitive touch sensing inputs | Supports mutual capacitance matrix (8×4) for up to 32 keys with automatic noise cancellation |
| AD00–AD14 | A/D converter analog inputs | 15-channel 12-bit SAR ADC with per-channel sampling time control and disconnection detection |
| DA0 / DA1 | Digital-to-analog outputs | Two independent 8-bit voltage-output DACs (0 V to AVCC0) for analog signal generation |
| FINED | FINE debug interface | Single-wire on-chip debugging port supporting breakpoints, watchpoints, and real-time trace |
Key Features
| Feature | Design Value |
|---|---|
| Event Link Controller (ELC) | Direct hardware triggering of 48 peripheral events without CPU intervention - reduces latency and power in sleep modes |
| Capacitive Touch Sensing Unit (CTSU2SL) | 32-key mutual capacitance support with automatic correction and judgment - eliminates need for external touch controller IC |
| Data Transfer Controller (DTC) | Five transfer modes including block and repeat - enables zero-CPU DMA transfers between peripherals and memory |
| Real-Time Clock Backup | RTC operates in software standby using sub-clock - maintains calendar time during ultra-low-power operation |
| IEC60730 Safety Assist | Hardware-accelerated RAM test, A/D self-diagnostic, clock accuracy monitoring - reduces software overhead for Class B certification |
| Multi-Function Pin Controller (MPC) | Per-pin function reassignment via register - simplifies PCB layout reuse across RX140 variants |
Applications
| Industrial HMI Panel | Smart Sensor Node |
|---|---|
Use Scenario: Touch-enabled operator interface for PLC-controlled machinery with local alarm logging and parameter adjustment. IC Role / Device Role / Timing Role: Main controller executing real-time UI rendering, CAN bus polling, and capacitive touch scan at 100 Hz. Use Value: Integrated CTSU2SL handles 32-key matrix without external IC; ELC synchronizes touch scan with A/D conversion for consistent response. | Use Scenario: Battery-powered environmental monitor measuring temperature, humidity, and gas concentration with wireless upload. IC Role / Device Role / Timing Role: System-on-chip managing sensor acquisition, low-power scheduling, and secure data encryption before transmission. Use Value: Software standby current of 0.25 µA extends battery life; AESA/RNGA enable end-to-end encrypted payload generation. |
| Motor Drive Feedback Unit | IEC60730-Compliant Appliance Controller |
Use Scenario: Compact feedback module for BLDC motor control, capturing hall sensor edges and generating PWM gate signals. IC Role / Device Role / Timing Role: Real-time timing engine using MTU2a for 6-channel complementary PWM and input capture with <1 µs jitter. Use Value: Phase-counting mode and double-trigger A/D support precise rotor position estimation and current sampling synchronization. | Use Scenario: Washing machine main board performing motor control, water level sensing, and safety-critical fault detection. IC Role / Device Role / Timing Role: Safety-certified controller executing periodic RAM tests, clock accuracy checks, and A/D disconnection diagnostics. Use Value: Hardware-assisted IEC60730 functions reduce certified code footprint by >40% versus software-only implementations. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F51405ADFM#30 | Same package and memory (128 KB/32 KB), but rated for –40°C to +85°C only; no encryption module | Suitable for commercial-grade industrial equipment where extended temperature and security are not required | Select when cost sensitivity outweighs need for high-temp operation or AES/RNG acceleration |
| R5F51406AGFM#30 | 256 KB flash / 64 KB SRAM / 8 KB data flash; identical package, temp range, and peripheral set | Required for applications needing larger firmware image size or extended runtime data logging buffers | Choose when future firmware growth or enhanced data buffering justifies higher memory density |
Compared with R5F51405ADFM#30, the R5F51405AGFM#30 adds extended temperature support and optional encryption, while R5F51406AGFM#30 doubles flash/SRAM capacity without altering pinout or peripheral functionality - enabling scalable design reuse.
Availability
R5F51405AGFM#30 is available at Aetrix Electronics and suitable for industrial HMI panels, smart sensor nodes, motor feedback units, and IEC60730-compliant appliance controllers requiring stable component supply across extended temperature ranges.
Supply support for R5F51405AGFM#30 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for industrial, automotive, and IoT markets.
The RX140 Group is designed for cost-sensitive, low-power industrial and consumer applications requiring real-time performance, functional safety support, and rich analog/peripheral integration - with R5F51405AGFM#30 targeting extended-temperature edge devices.
FAQ
What is the maximum operating frequency and core architecture of the R5F51405AGFM#30?
The R5F51405AGFM#30 features a 32-bit RXv2 CPU core with a maximum operating frequency of 48 MHz. It achieves 204 CoreMark performance at this speed and uses a CISC Harvard architecture with a 5-stage pipeline and variable-length instructions. The core includes an on-chip FPU compliant with IEEE-754 single-precision and a hardware 32-bit divider that completes operations in two clock cycles. These capabilities make the R5F51405AGFM#30 well-suited for deterministic real-time control tasks in industrial applications.
Does the R5F51405AGFM#30 support CAN communication, and what version is implemented?
Yes, the R5F51405AGFM#30 integrates a CAN module compliant with ISO11898-1, supporting both standard and extended frames at up to 1 Mbps. It includes 16 mailboxes for flexible message filtering and prioritization. The CAN peripheral is fully hardware-accelerated and operates independently of the CPU when configured with ELC triggers, allowing efficient bus handling during low-power modes. This implementation makes the R5F51405AGFM#30 suitable for industrial automation networks where deterministic messaging and robust error handling are essential.
What are the analog capabilities of the R5F51405AGFM#30, particularly regarding A/D and D/A converters?
The R5F51405AGFM#30 includes a 12-bit successive approximation A/D converter (S12ADE) with 15 external input channels and a minimum conversion time of 0.67 µs at 48 MHz ADCLK. It also features two independent 8-bit D/A converters with voltage output ranging from 0 V to AVCC0. The A/D supports scan modes, per-channel sampling time control, self-diagnostic functions, and analog input disconnection detection - critical for sensor integrity monitoring in safety-critical systems. These analog resources are fully integrated into the R5F51405AGFM#30's signal chain without requiring external components.
How does the R5F51405AGFM#30 support low-power operation in industrial applications?
The R5F51405AGFM#30 offers four low-power consumption modes: sleep, deep sleep, software standby, and snooze. In software standby mode, it draws just 0.25 µA (typ.) at 25°C and recovers in 6.2 µs using the HOCO 32 MHz clock. The low-power timer (LPT) continues operating during software standby to maintain timing functions, and the sub-clock oscillator drives the RTC for calendar tracking. These features allow the R5F51405AGFM#30 to serve as the primary controller in battery-backed or energy-harvesting industrial nodes while maintaining responsiveness and timekeeping accuracy.
Is the R5F51405AGFM#30 qualified for functional safety standards like IEC60730?
Yes, the R5F51405AGFM#30 includes dedicated hardware features to assist IEC60730 Class B compliance, including self-diagnostic functions for the A/D converter, clock frequency accuracy measurement circuit (CAC), independent watchdog timer (IWDT), and RAM test assistance via the data operation circuit (DOC). These accelerators reduce software verification burden and improve diagnostic coverage. While the R5F51405AGFM#30 itself is not pre-certified, its integrated safety mechanisms are explicitly documented in the hardware manual to support customer-led certification efforts for household and industrial appliances.
R5F51405AGFM#30 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 64-LQFP
- Series:
- RX140
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv2
- Core Size:
- 32-Bit Single-Core
- Speed:
- 48MHz
- Connectivity:
- CANbus, I2C, SCI, SPI
- Peripherals:
- Capacitive Touch, DMA, LVD, POR, PWM, Temp Sensor, WDT
- Number of I/O:
- 53
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 32K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 5.5V
- Data Converters:
- A/D 15x12b; D/A 2x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F51405AGFM#30 FAQ
1.How can I place an order for R5F51405AGFM#30 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F51405AGFM#30 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F51405AGFM#30 reliable?
The price and inventory of R5F51405AGFM#30 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F51405AGFM#30 is usually 5 days.
3.What payment methods are accepted for R5F51405AGFM#30?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F51405AGFM#30 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F51405AGFM#30?
R5F51405AGFM#30 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F51405AGFM#30 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F51405AGFM#30?
For technical support, including R5F51405AGFM#30 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F51405AGFM#30 requirements.
6.How does Aetrix verify that R5F51405AGFM#30 is sourced from the original manufacturer or authorized distributors?
All R5F51405AGFM#30 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F51405AGFM#30 meets industry standards.
7.What is the process for return or replacement of R5F51405AGFM#30?
All R5F51405AGFM#30 units undergo pre-shipment inspection (PSI). If there is an issue with R5F51405AGFM#30, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F51405AGFM#30 part is unused and in its original packaging.
Return procedure for R5F51405AGFM#30:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F51405AGFM#30 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

