Renesas R5F51406BGFL#30
- Part No.:
- R5F51406BGFL#30
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 48-LQFP
- Datasheet:
-
R5F51406BGFL#30.pdf
- Description:
- IC MCU 32BIT 256KB FLASH 48LFQFP
- Quantity:
- Payment:

- Shipping:

Inventory:750
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F51406BGFL#30 from Renesas is a 32-bit RXv2 core MCU operating at up to 48 MHz, featuring 256 KB on-chip flash, 64 KB SRAM, 8 KB data flash, integrated CAN 2.0B module (1 Mbps), 12-bit A/D converter (11 external channels), and hardware AES-128/256 encryption. It targets industrial control nodes requiring secure, low-power, real-time I/O and communication in extended temperature environments.
For engineers reviewing the R5F51406BGFL#30 datasheet, R5F51406BGFL#30 pinout, R5F51406BGFL#30 application, or R5F51406BGFL#30 equivalent, this page delivers verified specifications, package mapping to PLQP0048KB-B (48-pin LFQFP, 7 × 7 mm, 0.5 mm pitch), functional pin roles, and two validated alternative parts for design flexibility.
Technical Context
The R5F51406BGFL#30 implements the RXv2 CPU core with IEEE-754-compliant 32-bit FPU, 204 CoreMark score at 48 MHz, and ultra-compact variable-length instruction set. Its memory subsystem includes zero-wait-state SRAM, 1–wait-state flash access above 32 MHz, and background operation (BGO) for 4 KB data flash.
Peripherals are orchestrated via Event Link Controller (ELC) and Multi-function Pin Controller (MPC), enabling interrupt-free timer-triggered A/D conversion, PWM waveform generation, and low-power snooze-mode operation with 6.2 µs wake-up from software standby using HOCO 32 MHz clock.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit CISC Harvard architecture with 5-stage pipeline, 204 CoreMark @ 48 MHz |
| Max Operating Frequency | 48 MHz - enables real-time motor control loop execution within sub-µs timing budgets |
| Memory | 256 KB flash (1–wait @ >32 MHz), 64 KB SRAM (no wait), 8 KB data flash (1M erase cycles, BGO) |
| Analog Peripherals | 12-bit S12ADE A/D converter (11 external + 1 internal channel, 0.67 µs conversion), 2× 8-bit D/A outputs |
| Communication | CAN 2.0B (1 Mbps, 16 mailboxes), 3× SCIg, 2× SCIk, 1× SCIh, 1× RIIC (400 kbps), 1× RSPI (16 Mbps) |
| Security & Temp | AESA hardware accelerator (AES-128/256, ECB/CBC/CTR), RNGA, TEMPSA sensor, unique 32-byte ID |
| Power & Temp | 1.8–5.5 V supply; –40 to +105°C (G-grade); 0.25 µA software standby current (typ.) |
Pinout & Package
Package: PLQP0048KB-B - 48-pin Low-Profile Quad Flat Package, 7 mm × 7 mm body, 0.5 mm pitch, exposed thermal pad.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / VSS | Power supply / Ground | Dual power domains support noise-isolated analog/digital operation; VCL decoupling required for internal LDO stability |
| XTAL / EXTAL | Main clock oscillator interface | Supports 1–20 MHz crystal or external clock; enables precise timing for RTC and CAN bit rate accuracy |
| MTIOC0A–D, MTIOC1A–B | MTU2 waveform I/O | 6-channel 16-bit timer outputs supporting complementary PWM, phase counting, and A/D trigger sync |
| RXD1/TXD1, RXD5/TXD5 | SCI asynchronous serial I/O | Two independent SCI channels with fine-adjustable baud rate (0–255/255) for legacy protocol interfacing |
| CAN_TX / CAN_RX | CAN physical layer interface | Differential signaling pins compliant with ISO 11898-1; require external transceiver for bus connection |
| AD00–AD10 | Analog input channels | 11 dedicated external A/D inputs with per-channel sampling time configuration and disconnection detection |
| DA0 / DA1 | Digital-to-analog outputs | 8-bit voltage-output DACs (0–AVCC0) usable for sensor biasing or analog feedback generation |
| RES# | Active-low reset input | Asynchronous hardware reset with debouncing support; initiates full system initialization sequence |
Key Features
| Feature | Design Value |
|---|---|
| Hardware AES Accelerator | Enables secure firmware updates and encrypted sensor data transmission without CPU overhead (128/256-bit keys, ECB/CBC/CTR) |
| Event Link Controller (ELC) | Allows direct peripheral-to-peripheral triggering (e.g., MTU → A/D start) without CPU intervention or interrupt latency |
| Capacitive Touch Sensing Unit | Supports up to 24 self-capacitance keys or 12×12 mutual-capacitance matrix - ideal for sealed industrial HMI panels |
| IEC60730 Compliance Support | Includes RAM test assistance (DOC), A/D self-diagnostic, clock accuracy measurement (CAC), and IWDT disconnection detection |
| Low-Power Timer (LPT) | 16-bit timer running during software standby mode using sub-clock or IWDT oscillator - enables periodic wake-up without full CPU activation |
Applications
| Industrial Motor Control Node | Secure Smart Sensor Hub |
|---|---|
Use Scenario: Compact PLC I/O module controlling BLDC motors with position feedback and fieldbus connectivity. IC Role / Device Role / Timing Role: Main controller executing closed-loop PID, managing CAN-based command dispatch, and synchronizing A/D sampling with PWM switching. Use Value: 48 MHz RXv2 core + MTU2 complementary PWM + 0.67 µs A/D enables <10 µs control loop latency; CAN 1 Mbps supports deterministic motion coordination. | Use Scenario: Battery-powered environmental sensor node aggregating temperature, humidity, and vibration data with encrypted cloud upload. IC Role / Device Role / Timing Role: System-on-chip host managing sensor interfaces, AES-encrypted data packaging, and low-duty-cycle wireless transmission scheduling. Use Value: 0.25 µA software standby + LPT wake-up + hardware RNG/AES reduces energy per telemetry cycle by >40% vs. software-only crypto implementations. |
| Extended-Temp Human-Machine Interface | Automotive Body Control Module (BCM) Subsystem |
Use Scenario: Touch-enabled operator panel for HVAC or lighting control in factory environments with ambient temperatures up to +105°C. IC Role / Device Role / Timing Role: Capacitive touch processor with real-time button response, local LED dimming control, and CAN diagnostics interface. Use Value: CTSU2SL supports 24-key self-capacitance layout immune to moisture; G-grade temp rating ensures reliability in uncooled enclosures. | Use Scenario: Secondary control unit for interior lighting, door lock actuation, and window lift monitoring in passenger vehicles. IC Role / Device Role / Timing Role: Safety-aware peripheral manager handling LIN-compatible SCIh, watchdog supervision, and voltage monitoring across multiple rails. Use Value: Dual LVD circuits (14-level programmable), IEC60730 diagnostic features, and –40 to +105°C operation meet ASIL-B readiness requirements for non-critical BCM functions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F51406ADFL#30 | No AES/RNG hardware; same 256 KB flash, 64 KB RAM, 48-pin LFQFP package, D-grade (–40 to +85°C) | Suitable for cost-sensitive industrial controls where cryptographic acceleration is unnecessary | Select when security compliance (e.g., IEC 62443) is not required and ambient temperature stays ≤+85°C |
| R5F51405BGFL#30 | 128 KB flash / 32 KB RAM / 8 KB data flash; identical encryption, CAN, A/D, and package; G-grade | Fits simpler sensor nodes or actuators with reduced firmware footprint and memory bandwidth needs | Choose when application code size is <128 KB and lower memory bandwidth suffices for real-time tasks |
Compared with R5F51406BGFL#30, R5F51406ADFL#30 removes hardware crypto but retains full peripheral set for commercial-temp use, while R5F51405BGFL#30 halves flash/RAM capacity but keeps extended-temp and security features - enabling tiered BOM strategies without PCB redesign.
Availability
R5F51406BGFL#30 is available at Aetrix Electronics and suitable for industrial motor control nodes, secure smart sensor hubs, extended-temperature HMIs, and automotive BCM subsystems requiring stable component supply across long production lifecycles.
Supply support for R5F51406BGFL#30 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for industrial, automotive, and IoT markets.
The RX140 Group is designed for cost-optimized, secure, and low-power general-purpose embedded applications - emphasizing IEC60730 compliance, extended temperature operation, and integrated communication peripherals including CAN and capacitive touch.
FAQ
What is the maximum operating frequency and core type of the R5F51406BGFL#30?
The R5F51406BGFL#30 features a 32-bit RXv2 CPU core with a maximum operating frequency of 48 MHz, achieving 204 CoreMark performance. It includes an IEEE-754-compliant 32-bit floating-point unit, 32-bit multiply-accumulate instructions, and a two-cycle hardware divider - all confirmed in the R01DS0379EJ0120 Rev.1.20 datasheet. This enables deterministic real-time processing for motor control and sensor fusion tasks.
Does the R5F51406BGFL#30 include hardware encryption capabilities?
Yes, the R5F51406BGFL#30 integrates a hardware AES accelerator (AESA) supporting 128- and 256-bit keys in ECB, CBC, and CTR modes, plus a true random number generator (RNGA). These modules are explicitly enabled in the "B"-grade variant per Table 1.3 of R01DS0379EJ0120, distinguishing it from "A" variants like R5F51406ADFL#30 which omit encryption hardware.
What package type and pin count does the R5F51406BGFL#30 use?
The R5F51406BGFL#30 uses the PLQP0048KB-B package: a 48-pin Low-Profile Quad Flat Package with 7 mm × 7 mm body size and 0.5 mm pitch. This is confirmed by Figure 1.1 (part number decoding) and Table 1.3 in R01DS0379EJ0120, where "FL" denotes LFQFP/48/0.50, and "G" indicates –40 to +105°C operation.
How many A/D converter channels does the R5F51406BGFL#30 support, and what is its conversion speed?
The R5F51406BGFL#30 includes a 12-bit S12ADE A/D converter with 11 external input channels and one internal channel (temperature sensor), as specified in Table 1.2 for 48-pin variants. Minimum conversion time is 0.67 µs per channel when ADCLK runs at 48 MHz - verified on page 4 of R01DS0379EJ0120 under "12-bit A/D converter (S12ADE)".
Is CAN functionality available on the R5F51406BGFL#30, and what standard does it comply with?
Yes, the R5F51406BGFL#30 integrates a single-channel RSCAN CAN module compliant with ISO 11898-1 (CAN 2.0B), supporting standard and extended frames at up to 1 Mbps. This is documented in the "Communication functions" section (page 4) and Table 1.2, which confirms CAN availability for all 48-pin RX140 products including R5F51406BGFL#30.
R5F51406BGFL#30 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 48-LQFP
- Series:
- RX140
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- RXv2
- Core Size:
- 32-Bit Single-Core
- Speed:
- 48MHz
- Connectivity:
- CANbus, I2C, SCI, SPI
- Peripherals:
- AES, Capacitive Touch, DMA, LVD, POR, PWM, Temp Sensor, TRNG, WDT
- Number of I/O:
- 39
- Program Memory Size:
- 256KB (256K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 64K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 5.5V
- Data Converters:
- A/D 11x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F51406BGFL#30 FAQ
1.How can I place an order for R5F51406BGFL#30 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F51406BGFL#30 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F51406BGFL#30 reliable?
The price and inventory of R5F51406BGFL#30 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F51406BGFL#30 is usually 5 days.
3.What payment methods are accepted for R5F51406BGFL#30?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F51406BGFL#30 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F51406BGFL#30?
R5F51406BGFL#30 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F51406BGFL#30 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F51406BGFL#30?
For technical support, including R5F51406BGFL#30 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F51406BGFL#30 requirements.
6.How does Aetrix verify that R5F51406BGFL#30 is sourced from the original manufacturer or authorized distributors?
All R5F51406BGFL#30 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F51406BGFL#30 meets industry standards.
7.What is the process for return or replacement of R5F51406BGFL#30?
All R5F51406BGFL#30 units undergo pre-shipment inspection (PSI). If there is an issue with R5F51406BGFL#30, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F51406BGFL#30 part is unused and in its original packaging.
Return procedure for R5F51406BGFL#30:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F51406BGFL#30 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

