Renesas R5F523E5JGFN#50
- Part No.:
- R5F523E5JGFN#50
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 80-LQFP
- Datasheet:
-
R5F523E5JGFN#50.pdf
- Description:
- RX23E-B 128LFQFP80 125KSPS, ANAL
- Quantity:
- Payment:

- Shipping:

Inventory:4,377
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
R5F523E5JGFN#50 from Renesas is a 32-bit RXv2 microcontroller optimized for high-precision analog sensing in industrial measurement systems. It integrates a 24-bit delta-sigma ADC (125 kSPS max, ±5 V input range), rail-to-rail programmable gain instrumentation amplifier (gain = 1–128), on-chip excitation current sources (50–1000 µA), and a 2.5 V low-drift voltage reference (8 ppm/°C). The device operates at up to 32 MHz, features 128 KB flash, 16 KB SRAM, and supports CAN, SCI, I²C, and RSPI interfaces - deployed in load cell signal conditioning and precision weight scale controllers.
For engineers reviewing the R5F523E5JGFN#50 datasheet, R5F523E5JGFN#50 pinout, R5F523E5JGFN#50 application, or R5F523E5JGFN#50 equivalent, key selection criteria include its integrated 24-bit DSAD with simultaneous 50/60 Hz rejection, ±5 V HVAIN input capability, LCD driver support, and G-grade (–40°C to +105°C) thermal rating for harsh industrial environments.
Technical Context
The R5F523E5JGFN#50 implements the RXv2 CPU core with IEEE 754-compliant 32-bit FPU and DSP extensions, enabling real-time floating-point sensor data processing. Its analog subsystem centers on the DSADB module synchronized to PCLKC (≤16 MHz), featuring fourth- and fifth-order sinc digital filters, offset/gain calibration, and disconnect detection assist for ±5 V differential inputs.
Timing is managed via independent clock domains: ICLK (CPU/system, ≤32 MHz), PCLKA (MTU2a), PCLKC (DSAD), and PCLKD (S12AD). The ELC enables event-triggered ADC conversion and PWM generation without CPU intervention, while the integrated LSW (10 Ω max) supports direct excitation of bridge sensors.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RXv2 32-bit CISC Harvard architecture, 32 MHz max, 64 DMIPS @ 32 MHz |
| Flash / RAM / Data Flash | 128 KB on-chip flash (no-wait @ 32 MHz), 16 KB SRAM (no-wait), 8 KB data flash (1M erase cycles) |
| 24-bit Delta-Sigma ADC | 8-channel differential input, 125 kSPS max sampling rate, ±5 V input range, simultaneous 50/60 Hz rejection at 10/54 SPS |
| PGA & Reference | Rail-to-rail PGA (gain = 1–128), 2.5 V voltage reference (±10 mA, 8 ppm/°C drift) |
| Excitation Sources | Two programmable current sources (50–1000 µA), matching ±0.2%, drift 5 ppm/°C |
| Operating Temp / Supply | –40°C to +105°C (G-grade), single 1.8–5.5 V supply, AVCC0 = 4.5–5.5 V for analog operation |
| Peripherals | CAN (1 ch, ISO 11898-1, 1 Mbps), SCI (6 ch), I²C (1 ch), RSPI (1 ch), LCD controller (36×8 COM/SEG), 16-bit DAC (1 ch) |
Pinout & Package
Package: PLQP0080KB-B - 80-pin LFQFP, 12 × 12 mm, 0.5 mm pitch, exposed pad (thermal pad).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / VSS | Power supply / Ground | Core logic supply (1.8–5.5 V); dedicated analog ground (AVSS0) required for DSAD accuracy |
| HVAIN0–HVAIN3 | Analog input | ±5 V tolerant high-voltage differential inputs for bridge sensor conditioning |
| AVCC0 / AVSS0 | Analog power / ground | Separate 4.5–5.5 V analog supply; mandatory for full DSAD performance and ±5 V input operation |
| IEXC0 / IEXC1 | Excitation current output | Programmable current sources (50–1000 µA) for resistive sensor biasing; matched and low-drift |
| VREFH / VREFL | ADC reference | External reference inputs for DSAD; internal 2.5 V reference available as alternative |
| COM0 / COM1 | Common-mode input | High-voltage common-mode inputs supporting ±10 V common-mode range (HVCOM pins) |
| RTCXT1 / RTCXT2 | Real-time clock oscillator | 32.768 kHz crystal connection for calendar mode; optional external crystal or internal oscillator |
| TXD0 / RXD0 | SCI0 serial interface | Asynchronous UART interface for host communication or configuration; supports bit-rate modulation |
Key Features
| Feature | Design Value |
|---|---|
| Integrated 24-bit DSAD with sinc filtering | Enables high-resolution weight measurement with simultaneous 50/60 Hz line-noise rejection at selectable data rates (3.8 SPS–125 kSPS) |
| Rail-to-rail PGA (gain = 1–128) | Preserves dynamic range across sensor output variations without external amplification; supports low-noise front-end design |
| On-chip excitation current sources | Eliminates need for external precision current sources; enables compact, calibrated 4-wire RTD or load cell interfaces |
| LCD controller (36×8 COM/SEG) | Direct drive of industrial segment displays without external drivers; reduces BOM count and layout complexity |
| Event Link Controller (ELC) | Hardware-triggered ADC sampling and PWM updates during CPU sleep, reducing system latency and power consumption |
| G-grade temperature range (–40°C to +105°C) | Ensures reliable operation in industrial enclosures, motor control cabinets, and outdoor weighing terminals |
Applications
| Industrial Weighing Terminal | Strain Gauge Signal Conditioner |
|---|---|
Use Scenario: Digital platform scale with 0.001% resolution and auto-calibration. IC Role / Device Role / Timing Role: Primary signal processor and ADC controller; synchronizes excitation, sampling, filtering, and display update via ELC and RTC. Use Value: Achieves <1 µV RMS noise floor and ±0.005% linearity using on-chip PGA, DSAD, and 2.5 V reference - eliminating external precision op-amps and references. |
Use Scenario: DIN-rail mounted strain gauge amplifier for structural monitoring. IC Role / Device Role / Timing Role: Analog front-end controller with programmable gain, excitation, and digital filtering; manages CAN bus reporting of calibrated force values. Use Value: Delivers 24-bit effective resolution at 10 SPS with built-in 50/60 Hz rejection - enabling single-chip replacement of discrete analog signal chains. |
| Process Transmitter Interface | High-Accuracy Pressure Sensor Module |
Use Scenario: 4–20 mA HART-enabled pressure transmitter with local LCD readout. IC Role / Device Role / Timing Role: Sensor interface MCU with integrated DSAD, 16-bit DAC (for loop current control), and SCI-based HART modem interface. Use Value: Combines analog acquisition, digital signal processing, and communication in one die - reducing component count and improving long-term stability over temperature. |
Use Scenario: MEMS pressure sensor module with factory-trimmed calibration and temperature compensation. IC Role / Device Role / Timing Role: Precision ADC controller with internal temperature sensor, excitation sourcing, and EEPROM-backed calibration storage (data flash). Use Value: Uses on-chip DOC and CRC for in-field self-test and calibration integrity verification - meeting IEC 60730 Class B requirements without external components. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-precision analog microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F523E5JDFN#50 | D-grade (–40°C to +85°C); identical analog/peripheral spec except operating temperature | Suitable for indoor or climate-controlled industrial equipment where extended thermal range is unnecessary | Select for cost-sensitive designs with ambient temp ≤+85°C; shares same pinout and firmware compatibility |
| R5F523E5JGFN#30 | Same G-grade specs; differs only in packaging - #30 = tray (LFQFP), #50 = embossed tape (LFQFP) | No functional difference; choice driven by assembly process (SMT reel vs. tray feed) | Choose #50 for automated high-volume pick-and-place; #30 for low-volume prototyping or manual assembly |
Compared with R5F523E5JDFN#50, the R5F523E5JGFN#50 enables deployment in uncooled enclosures near motors or power electronics; compared with R5F523E5JGFN#30, the #50 variant provides optimized logistics for surface-mount production lines without altering electrical or thermal behavior.
Availability
R5F523E5JGFN#50 is available at Aetrix Electronics and suitable for industrial weighing terminals, strain gauge conditioners, process transmitters, and high-accuracy pressure sensor modules requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for R5F523E5JGFN#50 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, and power solutions for industrial, automotive, and IoT applications.
The RX23E-B Group targets high-precision measurement systems, integrating metrology-grade analog peripherals with robust real-time processing - designed specifically for load cells, RTDs, and bridge-based sensors in industrial automation.
FAQ
What is the maximum sampling rate of the 24-bit delta-sigma ADC in R5F523E5JGFN#50?
The R5F523E5JGFN#50 supports a maximum sampling rate of 125 kSPS for its 24-bit delta-sigma ADC (DSADB). This rate is achievable with reduced resolution and filter settings; for full 24-bit effective resolution, typical use cases operate at 3.8–10 SPS with sinc filtering enabled. The modulator clock runs at 4 MHz (typical), and oversampling ratios range from 32 to 1,048,576 depending on configuration.
Does R5F523E5JGFN#50 support ±10 V analog inputs?
No - the R5F523E5JGFN#50 supports ±5 V input range on its HVAIN pins, as indicated by its "J" package code (per Figure 1.1). While the device includes HVCOM pins capable of ±10 V common-mode voltage, the differential input range remains ±5 V. For ±10 V full-scale operation, the "K" or "L" variants (e.g., R5F523E5KGFN#50) must be selected.
What is the purpose of the low-side switch (LSW) in R5F523E5JGFN#50?
The low-side switch (LSW) in the R5F523E5JGFN#50 provides a 10 Ω (max) on-resistance path to ground for controlled sensor excitation sequencing. It enables safe power-down of bridge sensors between measurements, reducing self-heating errors and enabling zero-offset calibration cycles - critical for high-stability weigh scale applications.
Can R5F523E5JGFN#50 operate without an external crystal?
Yes - the R5F523E5JGFN#50 includes on-chip high-speed and low-speed oscillators. The main system clock can run from the internal high-speed oscillator (HSIO) at up to 32 MHz, eliminating the need for an external crystal in cost-sensitive or space-constrained designs. However, for RTC calendar mode or precise timing-critical ADC sampling, the 32.768 kHz sub-clock oscillator (with external crystal) is recommended.
Is the LCD controller in R5F523E5JGFN#50 compatible with standard segment displays?
Yes - the R5F523E5JGFN#50's LCD controller supports 36 segment × 8 common outputs, compatible with standard industrial segment LCDs used in panel meters and weighing indicators. It offers internal voltage boosting and capacitor-split drive methods, allowing direct connection to passive LCD glass without external bias circuitry or driver ICs.
R5F523E5JGFN#50 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 80-LQFP
- Series:
- RX23E-B
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- RXv2
- Core Size:
- 32-Bit
- Speed:
- 32MHz
- Connectivity:
- CANbus, I2C, SCI, SPI, UART/USART
- Peripherals:
- DMA, LCD, LVD, POR, PWM, WDT
- Number of I/O:
- 43
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 8K x 8
- RAM Size:
- 16K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 5.5V
- Data Converters:
- A/D 8x12b SAR, 8x24b Sigma-Delta; D/A 1x16b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
R5F523E5JGFN#50 FAQ
1.How can I place an order for R5F523E5JGFN#50 through Aetrix?
Please submit a Request for Quotation (RFQ) for R5F523E5JGFN#50 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for R5F523E5JGFN#50 reliable?
The price and inventory of R5F523E5JGFN#50 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for R5F523E5JGFN#50 is usually 5 days.
3.What payment methods are accepted for R5F523E5JGFN#50?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for R5F523E5JGFN#50 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for R5F523E5JGFN#50?
R5F523E5JGFN#50 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your R5F523E5JGFN#50 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for R5F523E5JGFN#50?
For technical support, including R5F523E5JGFN#50 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your R5F523E5JGFN#50 requirements.
6.How does Aetrix verify that R5F523E5JGFN#50 is sourced from the original manufacturer or authorized distributors?
All R5F523E5JGFN#50 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that R5F523E5JGFN#50 meets industry standards.
7.What is the process for return or replacement of R5F523E5JGFN#50?
All R5F523E5JGFN#50 units undergo pre-shipment inspection (PSI). If there is an issue with R5F523E5JGFN#50, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The R5F523E5JGFN#50 part is unused and in its original packaging.
Return procedure for R5F523E5JGFN#50:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
R5F523E5JGFN#50 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

